The Si5383-EVB is used for evaluating the Si5383 Network Synchronizer
Clock for SyncE/1588 and Stratum 3/3E applications.
The Si5383 contains three independent DSPLLs in a single IC
with programmable jitter attenuation bandwidth on a per DSPLL
basis. The Si5383-EVB supports three independent differential
input clocks, two independent CMOS input clocks, and seven independent output clocks via onboard SMA connectors. The
Si5383-EVB can be controlled and configured via a USB connection to a host PC running Silicon Labs’ next generation Clock
Builder Pro™ (CBPro™) software tool. Test points are provided
on-board for external monitoring of supply voltages.
EVB FEATURES
• Powered from USB port or external +5 V
power supply via screw terminals
•
Onboard 48 MHz XTAL and included
SiOCXO1-EB reference board allows
standalone or holdover mode of operation
on the Si5383
• CBPro™ GUI programmable V
supplies allow each of the seven outputs
to have its own supply voltage selectable
from 3.3, 2.5, or 1.8 V
• CBPro™ GUI allows control and
measurement of voltage, current, and
power of VDD and all 7 VDDO supplies
• Status LEDs for power supplies and
control/status signals of Si5383
• SMA connectors for input clocks, output
clocks and optional external timing
reference clock
DDO
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UG256: Si5383 Evaluation Board User's Guide
Si5383-EVB Functional Block Diagram, Support Documentation, and ClockBuilder Pro™ Software
1. Si5383-EVB Functional Block Diagram, Support Documentation, and ClockBuilder Pro™ Software
Below is a functional block diagram of the Si5383-EVB. This EVB can be connected to a PC via the main USB connector for programming, control, and monitoring. See 2. Quick Start and Jumper Defaults for more information.
Figure 1.1. Si5383-EVB Functional Block Diagram
All Si5383 EVB schematics, BOMs, User's Guides, and software can be found online at the following link:http://www.silabs.com/prod-
ucts/clocksoscillators/pages/Si538x-4x-evb.aspx
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UG256: Si5383 Evaluation Board User's Guide
2. Quick Start and Jumper Defaults
1. Install ClockBuilder Pro desktop software from EVB support web page given in Section 1.
2. Connect the USB cable from Si5383-EVB to PC with ClockBuilder Pro software installed.
3. Connect the SIOCXO1-EB to the reference input using the included SMA cable.
4. Leave the jumpers as installed from the factory, and launch the ClockBuilder Pro software.
5. You can use ClockBuilder Pro to create, download, and run a frequency plan on the Si5383-EVB.
6. For the Si5383 data sheet, go to http://www.silabs.com/timing
Quick Start and Jumper Defaults
Table 2.1. Si5383 EVB Jumper Defaults
LocationTypeI = Installed O =
Open
LocationTypeI = Installed O =
1
Open
JP22 pinIJP213 pinO
JP32 pinIJP222 pinO
JP42 pinIJP232 pinO
JP53 pinIJP243 pinO
JP132 pinO (Jumper sup-
JP252 pinO
plied)
JP142 pinOJP263 pinO
JP152 pinOJP272 pinO
JP163 pinOJP283 pinO
JP173 pinOJP292 pinO
JP182 pinOJP31-J342 pinProbe Points
JP192 pinOJ483x2 Hdr3 installed
JP203 pinOJ225x2 HdrO
Note:
1.
Refer to the Si5383 EVB schematics for the functionality associated with each jumper.
2. J31-J34 are intended to be probe points and jumpers should not be installed.
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UG256: Si5383 Evaluation Board User's Guide
Status LEDs
3. Status LEDs
Table 3.1. Si5383 EVB Status LEDs
LocationSilkscreenColorStatus Function Indication
D11+5V PWR, EXT USBGreenMain USB +5V present
D12READYGreenMCU Ready
D13BUSYGreenMCU Busy
D5INTRBBlueSi5383 Interrupt Active
D7LOL_REFBBlueLoss of Reference Lock
D8LOL_ABBlueLoss of Lock, DSPLL A
D18LOL_DCBlueLoss of Lock, DSPLL C
D19LOL_DBBlueLoss of Lock, DSPLL D
D11 is illuminated when the USB+5V supply voltage is present. D12 and D13 are illuminated when the MCU is either Ready or Busy,
respectively. D5 is illuminated when the Si5383's interrupt alarm is asserted. D7, D8, D18, and D19 are illuminated when the associated
PLL is not locked, D7 is the Reference PLL, D8 is for PLLA, D18 is for PLLC, and D19 is for PLLD.
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Figure 3.1. Si5383-EVB LED Locations
UG256: Si5383 Evaluation Board User's Guide
External Crystal Oscillator Input (XA/XB)
4. External Crystal Oscillator Input (XA/XB)
An on board 48 MHz XTAL is used in combination with the internal oscillator to produce an ultra-low jitter reference clock for the
DSPLL. The Si5383-EVB can also accommodate an external reference clock, such as a crystal oscillator, instead of a crystal. To evaluate the device with an external crystal oscillator, C93 and C94 must be populated and XTAL Y1 removed (see figure below). A crystal
oscillator's output can then be applied to SMA connectors J26 and J25. The figure below is used for a differential input such as
LVPECL, LVDS, etc. See the Si5383 data sheet for more details on connecting a single ended versus differential input clock.
Note: Using an external crystal oscillator can result in reduced phase jitter performance and is not recommended for this reason.
Figure 4.1. XAXB Input Terminations
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UG256: Si5383 Evaluation Board User's Guide
Clock Input and Output Circuits
5. Clock Input and Output Circuits
5. Clock and Reference Input Circuits (IN0/IN0B-IN2/IN2B, IN3, IN4 and REF/REFB)
The Si5383-EVB has eight SMA connectors (REF/REFB, IN0/IN0B-IN2/IN2B) for receiving external differential signals. IN0/IN0B, IN1/
IN1B and IN2/IN2B are differential clock inputs, which single ended clocks may also be applied.
The REF/REFB differential input clock is intended to support a TCXO or OCXO, such as the included SiOCXO1-EB, which determines
the Si5383's wander and holdover over performance. (Please note that this input clock is different from the optional reference clock that
may be applied at XA/XB.)
All differential inputs are terminated as shown in the figure below. The only exception is that the terminating 49.9Ω resistor for REF is
not installed. This is labelled R40 on the EB in the figure below. The reason for this exception is that single-ended TCXOs and OCXOs
typically cannot drive a 50 Ω load. Note that input clocks are ac-coupled and 50 Ω terminated. Single-ended clocks can be used by
appropriately driving one side of the differential pair with the single-ended clock. For details on how to configure inputs as single-ended,
please refer to the Si5383 data sheet.
Figure 5.1. REF/REFB Input Terminations
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UG256: Si5383 Evaluation Board User's Guide
Clock Input and Output Circuits
Figure 5.2. Differential Clock Input Terminations
In
addition, the Si5383-EVB supports two SMA connectors (IN3, IN4) for receiving external single-ended LVCMOS clocks, such as PPS
inputs. Each of these clocks connects to its respective Si5383 pins via a single installed 0 Ω resistor with a 4.7 K Ω pull down resistor.
Alternatively, R217, R218, R219, R220, C139, and C140 can be modified such as to attenuate a 5V swing.
Figure 5.3. IN3 and IN4, CMOS Input Terminations
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5.1 Clock Output Circuits (OUTx/OUTxB)
UG256: Si5383 Evaluation Board User's Guide
Clock Input and Output Circuits
Twelve
output drivers, six differential pairs (OUT0/OUT0B - OUT4/OUT4B and OUT6/OUT6B), are AC coupled to their respective SMA
connectors and two output drivers are optimized for a 1 Hz/CMOS output, which is OUT5/OUT5B. If dc coupling is required, the ac
coupling capacitors can be replaced with a resistor of appropriate value. The Si5383-EVB provides pads for optional output termination
resistors and/or low frequency capacitors. Note that components with a schematic "NI" designation is "not installed" and are normally
not populated on the Si5383-EVB and provide locations on the PCB for optional dc/ac terminations by the end user.
Figure 5.4. Output Clock Termination Circuit
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Figure 5.5. OUT5 Termination Circuit
UG256: Si5383 Evaluation Board User's Guide
Using the Si5383 EVB and Installing ClockBuilder Pro (CB Pro) Desktop Software
6. Using the Si5383 EVB and Installing ClockBuilder Pro (CB Pro) Desktop Software
6.1 Installing ClockBuilder Pro (CB Pro) Desktop Software
To install the CB Pro software on any Windows 7 (or above) PC:
Go to http://www.silabs.com/CBPro and download ClockBuilder Pro software.
Installation instructions and the user's guide for ClockBuilder can be found at the download link shown above. Please follow the instructions as indicated.
Note: ClockBuilder Pro software may periodically be updated and it's recommended to allow these updates as requested. Additional
tools and features, as well as frequency plan optimization can be included in updates.
6.2 Connecting the EVB to Your Host PC
Once ClockBuilder Pro software is installed, connect to the EVB with a USB cable as shown below.
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Figure 6.1. EVB Connection Diagram
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