Silicon Laboratories Si5348-E User Manual

UG362: Si5348-E Evaluation Board User's
Guide

The Si5348-E-EVB is used for evaluating the Si5348 Network Synchronizer Clock for
SyncE/1588 and Stratum
white 1 inch x 0.187 inch label with the text “SI5348-E-EB” in the lower left-hand corner
of the board. (For ordering purposes only, the terms “EB” and “EVB” refer to the board
and the kit respectively. In this document, the terms are synonymous in context.) The
Si5348 contains three independent DSPLLs in a single IC with programmable jitter at­tenuation bandwidth on a per DSPLL basis. The Si5348-E-EVB supports three inde­pendent differential input clocks, two independent CMOS input clocks, and seven inde­pendent output clocks via onboard SMA connectors. The Si5348-E-EVB can be con­trolled and configured via a USB connection to a host PC running Silicon Labs’ next
generation Clock Builder Pro™ (CBPro™) software tool. Test points are provided on­board for external monitoring of supply voltages.

The device revision is distinguished by a white 1 inch x 0.187 inch label with the text
“SI5348-E-EB” installed in the lower left hand corner of the board. (For ordering purpo­ses only, the terms “EB” and “EVB” refer to the board and the kit respectively. For the
purpose of this document, the terms are synonymous in context.

This kit comes with an OCXO board SiOCXO1-EB as well as a TCXO board SiTCXO1­EB. The OCXO or the TCXO are used on the reference input (REF) of the Si5348 to
evaluate the holdover stability of the network synchronizer clock. Both boards are not
needed at the same time, but they are both included in the kit to provide a comparison
of the resulting performance.

3/3E applications. The device revision is distinguished by a

EVB FEATURES

• Powered from USB port or external +5 V
power supply via screw terminals

• Included SiOCXO1-EB reference OCXO
board allows for evaluation in standalone
and holdover mode.

• Included SiTCXO1-EB reference TCXO
board allows for evaluation in standalone
and holdover mode.

•

CBPro™ GUI programmable VDD supply
allows device supply voltages from 3.3,

2.5, or 1.8 V

• CBPro™ GUI programmable V
supplies allow each of the seven outputs

to have its own supply voltage selectable
from 3.3, 2.5, or 1.8 V

• CBPro™ GUI allows control and
measurement of voltage, current, and
power of VDD and all 8 VDDO supplies

• Status LEDs for power supplies and
control/status signals of Si5348

• SMA connectors for input clocks, output
clocks and optional external timing
reference clock

DDO

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Figure .1. Si5348-E-EVB

Figure .2. SiOCXO1-EB (left) SiTCXO1-EB (right)

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UG362: Si5348-E Evaluation Board User's Guide

Si5348-E-EVB Functional Block Diagram, Support Documentation, and ClockBuilderPro™ Software

1. Si5348-E-EVB Functional Block Diagram, Support Documentation, and ClockBuilderPro™ Software

Below is a functional block diagram of the Si5348-E-EVB. This EVB can be connected to a PC via the main USB connector for pro­gramming, control, and monitoring. See 2. Quick Start and Jumper Defaults for more information.

USB +5V

Connector

Ext +5V

Connector

USB Aux +5V

Connector

Ext Aux +5V

Connector

C8051F380

Peripherals

Optional External

XAXB Ref Input

5–250 MHz TCXO/OCXO

or REFCLK

Input Clock 0

Input Clock 1

Input Clock 2

Input Clock 3

Input Clock 4

MCU

+

{
{
{
{
{

Power only

Power only

SPI

Conn

XAXB

Crystal/Term

Input

Termination

Input

Termination

Input

Termination

Input

Termination

+5V

+5V_Aux

VDDMCU
I2C

I2C/SPI Bus

Control/

Status

INTR
Alarm_Status

XA
XB

REF_IN

REF_INB

CLKIN_0

CLKIN_0B

CLKIN_1

CLKIN_1B

CLKIN_2

CLKIN_2B

CLKIN_3

CLKIN_4

Power Supply

VDD_Core

VDD_Core

VDDO_0

VDD_3.3

VDDO_0

VDD_3.3

VDDO_1

VDDO_2

VDDO_1

VDDO_2

Si5348

VDDO_3

VDDO_4

VDDO_5

VDDO_3

VDDO_4

VDDO_5

VDDO_6 VDDO_6

CLKOUT_0

CLKOUT_0B

CLKOUT_1

CLKOUT_1B

CLKOUT_2

CLKOUT_2B

CLKOUT_3

CLKOUT_3B

CLKOUT_4

CLKOUT_4B

CLKOUT_5

CLKOUT_5B

CLKOUT_6

CLKOUT_6B

Output

Termination

Output

Termination

Output

Termination

Output

Termination

Output

Termination

Output

Termination

Output

Termination

Output Clock 0

}

Output Clock 1

}

Output Clock 2

}

Output Clock 3

}

Output Clock 4

}

Output Clock 5

}

Output Clock 6

}

Figure 1.1. Si5348-E-EVB Functional Block Diagram

All Si5348 schematics, BOMs, User’s Guides, and software can be found online at the following link: http:www.silabs.com/products/

clocksoscillators/pages/si538x-4x-evb.aspx

The SiOCXO1-EB User's Guide is located at: https://www.silabs.com/documents/public/user-guides/UG123.pdf

The SiTCXO1-EB User's Guide is located at: https://www.silabs.com/documents/public/user-guides/ug364-sitcxo1-evb-ug.pdf

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UG362: Si5348-E Evaluation Board User's Guide

Quick Start and Jumper Defaults

2. Quick Start and Jumper Defaults

1. Install ClockBuilderPro desktop software from EVB support web page given in Section 2.

2. Connect USB cable from Si5348-E-EVB to PC with ClockBuilderPro software installed.

3. Connect the SIOCXO1-EB or SiTCXO1-EB to the reference input (REF) on the Si5348 using the included SMA connector.

4. Leave the jumpers as installed from the factory, and launch the ClockBuilderPro software.

5. You can use ClockBuilderPro to create, download, and run a frequency plan on the Si5348-E-EVB.

6. For the Si5348 data sheet, go to https://www.silabs.com/documents/public/data-sheets/si5348-e-datasheet.pdf.

7. For the Si5348 reference manual, go to http://www.silabs.com/documents/public/reference-manuals/si5348-e-family.pdf.

Table 2.1. Si5348-E EVB Jumper Defaults*

Location Type I = Installed O =

Open

JP1 2 pin I JP23 2 pin O

JP2 2 pin I JP24 2 pin O

JP3 2 pin I JP25 2 pin O

JP4 2 pin I JP26 2 pin O

JP5 2 pin O JP27 2 pin O

JP6 2 pin O JP28 2 pin O

JP7 2 pin I JP29 2 pin O

JP8 2 pin O JP30 2 pin O

JP9 2 pin O JP31 2 pin O

JP10 2 pin I JP32 2 pin O

JP13 2 pin O JP33 2 pin O

JP14 2 pin I JP34 2 pin O

JP15 3 pin 1 to 2 JP35 2 pin O

JP16 3 pin 1 to 2 JP36 2 pin O

JP17 2 pin O JP38 3 pin All open

Location Type I = Installed O =

Open

JP18 2 pin O JP39 2 pin O

JP19 2 pin O JP40 2 pin O

JP20 2 pin O JP41 2 pin O

JP21 2 pin O

JP22 2 pin O J36 5x2 Hdr All 5 installed

Note: Refer to the Si5348-E-EVB schematics for the functionality associated with each jumper.

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3. Status LEDs

Location Silkscreen Color Status Function Indication

D27 5VUSBMAIN Blue Main USB +5 V present

D22 3P3V Blue DUT +3.3 V is present

D26 VDD DUT Blue DUT VDD Core voltage present

D25 INTR Red MCU INTR (Interrupt) active

D21 READY Green MCU Ready

D24 BUSY Green MCU Busy

D5 LOL_T0B Blue Loss of Lock - DSPLL C

D6 LOL_T4B Blue Loss of Lock - DSPLL D

D8 LOS2B Blue Loss of Signal at IN2

D11 INTRB Blue Si5348 Interrupt Active

UG362: Si5348-E Evaluation Board User's Guide

Status LEDs

Table 3.1. Si5348-E EVB Status LEDs

D12 LOS1B Blue Loss of Signal at IN1

D13 LOL_AB Blue Loss of Lock DSPLL A

D14 LOS0B Blue Loss of Signal at IN0

D27, D22, and D26 are illuminated when USB +5 V, Si5348-E-EVB +3.3 V, and Si5348 VDD or supply voltages, respectively, are
present. D25, D21,
inputs IN0, IN1, and IN2, respectively. LEDs D13, D5, and D6 indicate loss of lock for one of three internal DSPLLs (A, C, and D) re­spectively. D11 indicates Si5348 interrupt output is active (as configured by Si5348 register programming). LED locations are highligh­ted below with LED function name indicated on board silkscreen.

and D24 are status LEDs showing on-board MCU activity. LEDs D14, D12, and D8 indicate loss of signal at clock

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Figure 3.1. Si5348-E-EVB LED Locations

UG362: Si5348-E Evaluation Board User's Guide

External Reference Input (XA/XB)

4. External Reference Input (XA/XB)

An external timing reference (48 MHz XTAL) is used in combination with the internal oscillator to produce an ultra-low jitter reference
clock for the DSPLL and for providing a stable reference for the free-run and holdover modes. The Si5348-E-EVB can also accommo­date an external reference clock instead of a crystal. To evaluate the device with an external REFCLK, C111 and C113 must be popula­ted and XTAL Y1 removed (see figure below). The REFCLK can then be applied to SMA connectors J39 and J40.

Figure 4.1. External Reference Input Circuit

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UG362: Si5348-E Evaluation Board User's Guide

Clock Input and Output Circuits

5. Clock Input and Output Circuits

5.1 Clock Input Circuits (REF/REFB, IN0/IN0B-IN2/IN2B, IN3, IN4)

The Si5348-E-EVB has eight SMA connectors (REF/REFB, IN0/IN0B–IN2/IN2B) for receiving external differential clock signals. The
REF/REFB differential input clock is intended to support a TCXO or OCXO, such as the included SiOCXO1-EB or the included SiTC­XO1-EB, which determines the Si5348’s wander performance. (Please note that this input clock is different from the optional reference
clock that may be applied at XA/XB.) All differential input clocks are terminated as shown in the figure below. The only exception is that
the terminating 49.9 Ω resistor for REF is not installed. This is R84 corresponding to IN0's R76 in the figure below. The reason for this
exception is that single-ended TCXOs and OCXOs typically cannot drive a 50 Ω load. Note that input clocks are ac-coupled and 50 Ω
terminated. This represents four differential input clock pairs. Single-ended clocks can be used by appropriately driving one side of the
differential pair with a single-ended clock. For details on how to configure inputs as single-ended, please refer to the Si5348 data sheet
or reference manual.

Figure 5.1. Differential Input Clock Termination Circuit

In addition, the Si5348-E-EVB supports two SMA connectors (IN3, IN4) for receiving external single-ended LVCMOS clocks. Each of
these clocks connects
the EVB.

to its respective Si5348 pins via a single installed 0 Ω resistor. There are no other termination components on

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5.2 Clock Output Circuits (OUTx/OUTxB)

UG362: Si5348-E Evaluation Board User's Guide

Clock Input and Output Circuits

Each of the

14 output drivers (seven differential pairs, OUT0/OUT0B—OUT6/OUT6B) is ac-coupled to its respective SMA connector.
The output clock termination circuit is shown in the figure below. The output signal will have no dc bias. If dc coupling is required, the ac
coupling capacitors can be replaced with a resistor of appropriate value. In particular, if differential pair OUT6/OUT6B is configured for 1
Hz output, then the AC coupling output capacitors, C166 and C168, each need to be replaced by a 0 Ω resistor. (These capacitors are
the respective counterparts of the OUT0/OUT0B output capacitors, C25 and C27, in the figure below.) The Si5348-E-EVB provides
pads for optional output termination resistors and/or low-frequency capacitors. Note that components with schematic “NI” designation
are not normally populated on the Si5348-E-EVB and provide locations on the PCB for optional dc/ac terminations by the end user.

Figure 5.2. Output Clock Termination Circuit

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