Silicon Laboratories Si5328-EVB User Manual
Si5328-EVB FOR SYNCE
Top (U11 TCXO Plastic Cover Removed) Bottom
1. Introduction
Si5328-EVB
The Si5328-EVB provides a platform for evaluating Silicon Laboratories' Si5328 Any-Frequency Precision Clock
Timing IC. The Si5328 is controlled by a microprocessor or MCU (micro-controller unit) via an I
The Si5328 is a jitter attenuator with a loop bandwidth ranging from 0.05 to 6 Hz. When combined with a
low-wander, low-jitter reference oscillator, the Si5328 meets all of the wander, MTIE, TDEV, and other
requirements listed in ITU-T G.8262/Y.1362 and commonly referred to as “SyncE” or “Synchronous Ethernet”.
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C or SPI interface.
Figure 1. Si5328-EVB
2. Applications
The Si5328 Any-Frequency Precision Clock has a comprehensive feature set for SyncE applications, including
any-frequency synthesis, multiple clock inputs, multiple clock outputs, a programmable loop bandwidth supporting
G.8262 options EEC1 and EEC2, alarm and status outputs, hitless switching between input clocks, programmable
output clock signal format (LVPECL, LVDS, CML, CMOS), and output phase adjustment between output clocks.
For more details, consult the Silicon Laboratories timing products web site at www.silabs.com/timing.
The evaluation board (EVBs) has an MCU (C8051F340) that supports USB communications with a PC host. The
Si5328 is controlled and monitored through the serial port (either SPI or I
the Any-Frequency Precision Clock device that performs voltage-level translation. Ribbon headers and SMA
connectors are included so that external clock in, clock out, and status pins can be easily accessed by the user.
The user also has the option of bypassing the MCU and controlling the parts from an external serial device.
Onboard termination is included so that the user can evaluate single-ended or differential as well as ac or dc
coupled clock inputs and outputs. A separate and optional DUT (Device Under Test) power supply connector is
included so that the Any-Frequency Precision Clocks can be run at either 1.8, 2.5 or 3.3 V, while the USB MCU
remains at 3.3 V powered by the USB connector. LEDs are provided for convenient monitoring of key status
signals.
Rev. 0.1 7/13 Copyright © 2013 by Silicon Laboratories Si5328-EVB
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C). A CPLD sits between the MCU and
Si5328-EVB
3. Features
The Si5328-EVB includes the following:
USB cable
EVB circuit board including an Si5328 and a TCXO reference oscillator.
4. Si5316-EVB, Si5319-EVB, Si5322/23-EVB, Si5324-EVB, Si5325/26-EVB,
Si5327-EVB, and Si5328-EVB Quick Start
1. Download and install the DSPLLsim software package from out web site at:
http://www.silabs.com/products/clocksoscillators/Pages/Si5328-EVB.aspx
2. Connect a USB cable from the EVB to the PC where the software was installed.
3. Install USB driver.
4. Launch software by clicking on Start
and selecting one of the programs.
5. Functional Description
The Si5328-EVB software allows for a complete and simple evaluation of the functions, features, and performance
of the Si5328 Any-Frequency Precision Clocks.
5.1. Block Diagram
Figure 2 is a block diagram of the evaluation board. The MCU communicates to the host PC over a USB
connection. The MCU controls and monitors the Si532x through the CPLD. The CPLD, among other tasks,
translates the signals at the MCU voltage level of 3.3 V to the Si532x's voltage level, which is nominally 3.3, 2.5, or
1.8 V. The user has access to all of the Si532x's pins using the various jumper settings as well as through the host
PC via the MCU and CPLD.
ProgramsSilicon LaboratoriesPrecision Clock EVB Software
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Figure 2. Si5328-EVB Block Diagram
Si5328-EVB
5.2. Si5328 Input and Output Clocks
The Si5328 has two differential input s that ar e ac terminate d to 50 and then ac coupled to the part. Single-ended
operation can be implemented by simply not connecting to one of the two of the differential pairs bypassing the
unused input to ground with a capacitor. When operating with clock inputs of 1 MHz or less in frequency, the
appropriate dc blocking capacitors (C39, C41, C34, and C36) located on the bottom of the board should be
replaced with 0 resistors. It may also be necessary to remove the 50 ac termination to ground and use source
series termination located at the driver. If this approach is used, the onboard ac termination should be removed
(e.g. R46 or C40). The reason for this is that the capacitive reactance of the ac coupling capacitors becomes
significant at low frequencies. It is also important that the CKIN signal meet the minimum rise time of 11 ns (CKNtrf)
even though the input frequency is low.
Two jumpers are provided to assist in monitoring the Si5328 power: When R27 is removed, J20 can be used to
measure the device current. J20 can be used at any time to monitor the supply voltage at the device.
The Si5328 requires an external TCXO/OCXO reference so that it can operate as an ultra-narrowband jitter
attenuator with a loop bandwidth as low as 0.05. The rang e of accep t able re ference fre quencies is describe d in the
Any-Frequency Precision Clocks Family Reference Manual (Si53xxRM.pdf). The EVB is shipped with a Rakon
TCXO that was used for the G.8262 compliance tests.
The Si5328-EVB can be used with the on-board TCXO or an external reference oscillator. If the on-board TCXO
is in use, its Vdd can be either 3.3 V or the DUT Vdd, with the default connection being to Vdd.
If an external reference oscillator is in use, it can be either single-ended or differential. To use an external oscillator,
make the following changes:
1. Remove R64 so that the TCXO power is removed
2. Remove R62 to isolate the output of the TCXO
3. Install R61 to establish a connection to J2
4. Change R9 to a 50 resistor for pr op e r term i na tio n
For single-ended operation, connect the reference signal to J2 and leave J1 open.
5.3. External Control and Status Headers
J17 is a ten pin ribbon header that is provided so that an external processor can control the Si5328 over either the
SPI or I
J14 is another ten pin ribbon header that brings out all of the status outputs from the Si5328. Note that some pins
are shared and serve as both inputs and outputs, depending on how the device is configured. For users who wish
to remotely access the input and output pin settings as well as serial ports with external hardware, both of these
headers can be connected to ribbon cables.
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C bus. J17 can also be used to control an external Si5328 with the onboard MCU.
5.4. CPLD and Power
This CPLD is required for the MCU to control the Si5328. The CPLD provides two main functions: it translates the
voltage level from 3.3 V (the MCU voltage) to the Si5328 voltage (either 1.8, 2.5, or 3.3 V). The MCU
communicates to the CPLD with the SPI signa ls SS_CPLD_B (slave select), MISO (master in, slave out), MOSI
(master out, slave in), and SCLK. The MCU can talk to CPLD-resident registers that are connected to pins that
control the Si5328's pins, mainly for pin control mode. When the MCU wishes to access an Si532 8 register, the SPI
signals are passed through the CPLD, while being level translated, to the Si5328. The CPLD is an EE device that
retains its code and is loaded through the JTAG port (J27). The core of the CPLD runs at 1.8 V, which is provided
by voltage regulator U6. The CPLD also logically connects many of the LEDs to the appropriate Si5328 pins.
Rev. 0.1 3
Si5328-EVB
MCU CPLD Si5328
SS_CPLD_B
SCLK
MOSI
MISO
SS_B
SCLK
SDI
SDO
DUT_PWR
+3.3 V
Figure 3. SPI Mode Serial Data Flow
This EVB can be powered solely by the USB port if the Si5328 and the TCXO are both operating at 3.3 V. The
factory default powers the entire board with 3.3 V from the USB connection. If a different Si5328 voltage is desired,
the jumper at J19 can be moved so that it is between pins J13.1 and J13.2. Si5328 power is then supplied at J30.
There are eight LEDs, as described in Table 1.
The Evaluation board has a serial port connector (J17) that supports the following:
Control by the MCU/CPLD of an Any-Frequency part on an external target board.
Control of the Si5328 that is on the Eval board through an external SPI or I
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C port.
For details, see J17 (Table 4).
Though they are not needed on this Evaluation Board because the CPLD has low output leakage current, some
applications will require the use of external pullup and pulldown resistors when three level pins are being driven by
external logic drivers.
5.5. MCU
The MCU is responsible for connecting the evaluation board to the PC so that PC resident softwa re can be used to
control and monitor the Si5328. The USB connector is J3 and the debug port, by which the MCU is flashed, is J24.
The reset switch, SW1, resets the MCU, but not the CPLD. The MCU is a self-c ontained USB mast er and ru ns all
of the code required to control and monitor the Si5328.
U4 contains a unique serial number for each board and U3 is an EEPROM that is used to store configuration
information for the board. The board powe rs up in free ru n mode with a con figuration that is outlin ed in "Appendix—
Powerup and Factory Default Settings" on page 15.
U3 configures the EVB for a specific frequency plan as described in "Appendix—Powerup and Factory Default
Settings" on page 15.
LVPECL outputs will not function at 1.8 V. If the Si532x part is to be operate at 1.8 V, the output format
needs to be changed by altering the SFOUT register bits.
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Si5328-EVB
6. Connectors and LEDs
6.1. LEDs
There are eight LEDs on the board which provide a quick and convenient means of determining board status.
Table 1. LED Status and Description
LED Color Label
D1 Green 3.3 V
D2 Green DUT_PWR
D5 Red LOL
D4 Red C1B
D6 Red C2B
D3 Green CA
D7 Yellow CPLD
D8 Yellow MCU
Rev. 0.1 5
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