Silicon Laboratories Si53108-EVB,Si53112 User Manual

Si53108-EVB

Si53108 EVALUATION BOARD USER’S GUIDE

Description

The Si53108-EVB can be used to evaluate the Si53108­A01AGM, an 8-output PCIe Gen1/2/3 buffer that can
operate in either fanout or zero delay mode.

Features

 10-inch traces to evaluate signal integrity
 The signal traces of the input and outputs have a

single-ended impedance of 50 ohms, and diffe rential
impedance of 100 ohms.

 The series resistance on the outputs are set to

match to this impedance design.

 DC pin controls per data sheet specification.
 Ability to measure input to output propagation delay.
 Ability to measure PCIe clock jitter.
 Ability to program features of Si53108-A01AGM via

2

I

C interface.

Rev. 0.1 Copyright © 2014 by Silicon Laboratories Si53108-EVB

Si53108-EVB

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1. Schematics

2 Rev. 0.1

Figure 1. Schematic 1

Si53108-EVB

Figure 2. Schematic 2

Rev. 0.1 3