Silicon Laboratories C8051F12X User Manual

C8051F12x-DK

C8051F12X DEVELOPMENT KIT USER’S GUIDE

1. Kit Contents

The C8051F12x Development Kit contains the following items:

• C8051F120 Target Board

• C8051Fxxx Development Kit Quick-Start Guide

• C8051F12x Development Kit User’s Guide (this document)

• Silicon Laboratories IDE and Product Information CD-ROM. CD content includes:

• Silicon Laboratories Integrated Development Environment (IDE)

• Keil 8051 Development Tools (macro assembler, linker, evaluation ‘C’ compiler)

• Source code examples and register definition files

• Documentation

• AC to DC Power Adapter

• Debug Adapter. Items include:

• EC2 Serial Adapter (RS232 to Debug Interface)

• RS232 Serial Cable

• 7” Ribbon Cable
OR

• USB Debug Adapter (USB to Debug Interface)

• USB Cable

2. Hardware Setup using an EC2 Serial Adapter

Connect the target board to a PC running the Silicon Laboratories IDE via the Serial Adapter as shown in Figure 1.

1. Connect one end of the RS232 serial cable to a serial (COM) port on the PC.

2. Connect the other end of the RS232 serial cable to the DB-9 connector on the Serial Adapter.

3. Connect the Serial Adapter to the JTAG connector on the target board using the 10-pin ribbon cable.

4. Connect the AC/DC power adapter to power jack P1 on the target board.

Notes:

•Use the Reset button in the IDE to reset the target when connected using an EC2 Serial Adapter.

• Remove power from the target board and the EC2 before connecting or disconnecting the ribbon cable from
the target board. Connecting or disconnecting the cable when the devices have power can damage the
device and/or the EC2.

AC/DC
Adapter

PC

Serial Port

Serial
Cable

Serial

Adapter

Ribbon

Cable

Target

Board

Figure 1. Hardware Setup using an EC2 Serial Adapter

Rev. 0.6 5/05 Copyright © 2005 by Silicon Laboratories C8051F12x-DK

C8051F12x-DK

3. Hardware Setup using a USB Debug Adapter

The target board is connected to a PC running the Silicon Laboratories IDE via the USB Debug Adapter as shown
in Figure 2.

1. Connect the USB Debug Adapter to the JTAG connector on the target board with the 10-pin ribbon cable.

2. Connect one end of the USB cable to the USB connector on the USB Debug Adapter.

3. Connect the other end of the USB cable to a USB Port on the PC.

4. Connect the AC/DC power adapter to power jack P1 on the target board.

Notes:

• Use the Reset button in the IDE to reset the target when connected using a USB Debug Adapter.

• Remove power from the target board and the USB Debug Adapter before connecting or disconnecting the
ribbon cable from the target board. Connecting or disconnecting the cable when the devices have power can
damage the device and/or the USB Debug Adapter.

AC/DC

Adapter

PC

USB Port

USB

Cable

USB

Debug

Adapter

Ribbon Cable

Target Board

Figure 2. Hardware Setup using a USB Debug Adapter

4. Software Setup

The included CD-ROM contains the Silicon Laboratories Integrated Development Environment (IDE), Keil software
8051 tools and additional documentation. Insert the CD-ROM into your PC’s CD-ROM drive. An installer will auto­matically launch, allowing you to install the IDE software or read documentation by clicking buttons on the Installa­tion Panel. If the installer does not automatically start when you insert the CD-ROM, run autorun.exe found in the
root directory of the CD-ROM. Refer to the readme.txt file on the CD-ROM for the latest information regarding
known IDE problems and restrictions.

5. Silicon Laboratories Integrated Development Environment

The Silicon Laboratories IDE integrates a source-code editor, source-level debugger and in-system Flash program­mer. The use of third-party compilers and assemblers is also supported. This development kit includes the Keil
Software A51 macro assembler, BL51 linker and evaluation version C51 ‘C’ compiler. These tools can be used
from within the Silicon Laboratories IDE.

5.1. System Requirements

The Silicon Laboratories IDE requirements:

• Pentium-class host PC running Microsoft Windows 98SE or later.

• One available COM or USB port.

• 64 MB RAM and 40 MB free HD space recommended.

2 Rev. 0.6

C8051F12x-DK

5.2. Assembler and Linker

A full-version Keil A51 macro assembler and BL51 banking linker are included with the development kit and are
installed during IDE installation. The complete assembler and linker reference manual can be found under the Help
menu in the IDE or in the “SiLabs\MCU\hlp” directory (A51.pdf).

5.3. Evaluation C51 ‘C’ Compiler

An evaluation version of the Keil C51 ‘C’ compiler is included with the development kit and is installed during IDE
installation. The evaluation version of the C51 compiler is the same as the full professional version except code
size is limited to 4 kB and the floating point library is not included. The C51 compiler reference manual can be
found under the Help menu in the IDE or in the “SiLabs\MCU\hlp” directory (C51.pdf).

5.4. Using the Keil Software 8051 Tools with the Silicon Laboratories IDE

To perform source-level debugging with the IDE, you must configure the Keil 8051 tools to generate an absolute
object file in the OMF-51 format with object extensions and debug records enabled. You may build the OMF-51
absolute object file by calling the Keil 8051 tools at the command line (e.g. batch file or make file) or by using the
project manager built into the IDE. The default configuration when using the Silicon Laboratories IDE project
manager enables object extension and debug record generation.
Keil 8051 Tools Into the Silicon Laboratories IDE
CD-ROM for additional information on using the Keil 8051 tools with the Silicon Laboratories IDE.

To build an absolute object file using the Silicon Laboratories IDE project manager, you must first create a project. A
project consists of a set of files, IDE configuration, debug views, and a target build configuration (list of files and tool
configurations used as input to the assembler, compiler, and linker when building an output object file).

in the “SiLabs\MCU\Documentation\Appnotes” directory on the

Refer to Applications Note

AN104 -

Integrating

The following sections illustrate the steps necessary to manually create a project with one or more source files, build
a program and download the program to the target in preparation for debugging. (The IDE will automatically create a
single-file project using the currently open and active source file if you select
defined.)

Build/Make Project

before a project is

5.4.1. Creating a New Project

1. Select Project->New Project to open a new project and reset all configuration settings to default.

2. Select File->New File to open an editor window. Create your source file(s) and save the file(s) with a rec-

ognized extension, such as .c, .h, or .asm, to enable color syntax highlighting.

3. Right-click on “New Project” in the Project Window. Select Add files to project. Select files in the file

browser and click Open. Continue adding files until all project files have been added.

4. For each of the files in the

build, right-click on the file name and select
appropriate (based on file extension) and linked into the build of the absolute object file.

Note:

If a project contains a large number of files, the “Group” feature of the IDE can be used to organize.
Right-click on “New Project” in the
groups or add customized groups. Right-click on the group name and choose
to be added. Continue adding files until all project files have been added.

Project Window

Project Window

that you want assembled, compiled and linked into the target

Add file to build

. Select

. Each file will be assembled or compiled as

Add Groups to project

Add file to group

. Add pre-defined

. Select files

Rev. 0.6 3

C8051F12x-DK

5.4.2. Building and Downloading the Program for Debugging

1. Once all source files have been added to the target build, build the project by clicking on the Build/Make
Project button in the toolbar or selecting Project->Build/Make Project from the menu.

Note: After the project has been built the first time, the Build/Make Project command will only build the

files that have been changed since the previous build. To rebuild all files and project dependencies, click
on the Rebuild All button in the toolbar or select Project->Rebuild All from the menu.

2.

Before connecting to the target device, several connection options may need to be set.

Connection Options

the adapter that was included with the kit in the “Serial Adapter” section. Next, the correct “Debug Interface”
must be selected.
made, click the OK button to close the window.

window by selecting

C8051F12x

family devices use the JTAG debug interface. Once all the selections are

Options->Connection Options...

in the IDE menu. First, select

Open the

3. Click the

4. Download the project to the target by clicking the Download Code button in the toolbar.

Note: To enable automatic downloading if the program build is successful select Enable automatic con-
nect/download after build in the Project->Target Build Configuration dialog. If errors occur during the

build process, the IDE will not attempt the download.

5. Save the project when finished with the debug session to preserve the current target build configuration,
editor settings and the location of all open debug views. To save the project, select Project->Save Project

As... from the menu. Create a new name for the project and click on Save.

Connect

button in the toolbar or select

Debug->Connect

from the menu to connect to the device.

6. Example Source Code

Example source code and register definition files are provided in the “SiLabs\MCU\Examples\
during IDE installation. These files may be used as a template for code development. Example applications include
a blinking LED example which configures the green LED on the target board to blink at a fixed rate.

6.1. Register Definition Files

Register definition files C8051F120.inc and C8051F120.h define all SFR registers and bit-addressable control/
status bits. They are installed into the “SiLabs\MCU\Examples\C8051F12x” directory during IDE installation. The
register and bit names are identical to those used in the C8051F12x data sheet. Both register definition files are
also installed in the default search path used by the Keil Software 8051 tools. Therefore, when using the Keil 8051
tools included with the development kit (A51, C51), it is not necessary to copy a register definition file to each
project’s file directory.

C8051F12x

” directory

6.2. Code Banking Files

In order to utilize code banking in a project there are two files that will need to be changed. You can either custom
edit L51_bank.a51 and startup.a51 or use the copies installed into the “IDEfiles\C51\Lib” directory during IDE
installation. Both of these files MUST be added to your project and linked with your project in order for code bank­ing to function properly. For more information on code banking, please see Application Note AN130 - Code Bank-

ing Using the Keil 8051 Tools.

6.3. Blinking LED Example

The example source files blink.asm and blinky.c show examples of several basic C8051F12x functions. These
include; disabling the watchdog timer (WDT), configuring the Port I/O crossbar, configuring a timer for an interrupt
routine, initializing the system clock, and configuring a GPIO port. When compiled/assembled and linked this pro­gram flashes the green LED on the C8051F120 target board about five times a second using the interrupt handler
with a C8051F120 timer.

4 Rev. 0.6

C8051F12x-DK

7. Target Board

The

C8051F12x
preliminary software development. Numerous input/output (I/O) connections are provided to facilitate prototyping
using the target board. Refer to

P1 Power connector (accepts input from 7 to 15 VDC unregulated power adapter)
J1 Connects SW2 to P3.7 pin
J3 Connects LED D3 to P1.6 pin
J4 JTAG connector for Debug Adapter interface
J5 DB-9 connector for UART0 RS232 interface
J6 Connector for UART0 TX (P0.0)
J8 Connector for UART0 RTS (P4.0)
J9 Connector for UART0 RX (P0.1)
J10 Connector for UART0 CTS (P4.1)
J11 Analog loopback connector
J12-J19 Port 0 - 7 connectors
J20 Analog I/O terminal block
J22 VREF connector
J23 VDD Monitor Disable
J24 96-pin Expansion I/O connector

Development Kit includes a target board with a

Figure 3

for the locations of the various I/O connectors.

C8051F120

device pre-installed for evaluation and

J24

Port 4

Pin 2

Pin 1

Pin 2

Pin 1

J20

Port 7

Port 0 Port 2

C8051

F12X

J11

J22

Pin 1

Port 3Port 6Port 5

Port 1

J23

Pin 1

Pin 2

PWR

J3

J8J10

P1.6

J1

J9J6

J5

P1

J4

RESET

P3.7

JTAG

Pin 1

Figure 3. C8051F120 Target Board

Pin 1

Rev. 0.6 5