SILAN SC8521 Datasheet

Silan Semiconductors
SC8521
INFRARED REMOTE CONTROL TRANSMITTER RC5
DESCRIPTION
The SC8521 can be used in infrared remote control transmitters. It generates output pulses, in accordance with the RC5 protocol, when a key is pressed. The IC does not contain a software programmable processor. However, it does contain a ROM in which the codes that have to be transmitted are stored. The oscillator frequency may be optionally chosen as 432KHz. For 432KHz additional external capacitors must be connected.When a key in the key-matrix is pressed a driveline will be connected to a sense line. This causes the oscillator to start and a corresponding code will be generated conforming to the RC5 protocol.
Seven drive lines (
DR0toDR6
to SN7) may be connected via the key matrix to scan the keys.
When two or more keys are activated simultaneously no transmission will take place.
FEATURES
RC5 protocolMaximum of 56 keys (20-pin version)Option of multi-system or single system transmitter
-- Multi-system: maximum 8 system, selection by key
-- Single system: maximum 8 different systems per IC, selection by jumper wire or switch.
) and eight sense lines (SN0
SOP-20
Power-down and key wake-upHigh output current (45mA)Oscillator frequency of 432KHzMultiple key protectionOption of 25% or 33% duty factor
ORDERING INFORMATION
SOP-20
SC8521
Package
PIN CONFIGURATIONS
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
XTAL1
XTAL2
SN7
SN0
SN1
SN2
SN3
SN6
SN4
SN5
1
2
3
4
5
6
7
8
9
10
20
VDD
19
Lout
18
VSS
DR6
17
16
DR0
15
DR1
SC8521
14
DR2
13
DR3
12
DR4
11
DR5
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BLOCK DIAGRAM
XTAL1 XTAL2
SC8521
432kHZ
1 2
SN0 SN1 SN2 SN3 SN4 SN5 SN6 SN7 DR0 DR1 DR2 DR3 DR4 DR5 DR6
4 5 6 7 9
10
8
3 16 15 14 13 12 11 17
OSCILLATOR
KEY SCANNING
TIMING GENERATOR AND CONTROL
1K x 8 ROM
PULSE GENERATOR
SHIFT REGISTER
20 18
V
DD
V
SS
19
Lout
OUTPUT DRIVER
ABSOLUTE MAXIMUM RATING
Characteristic Symbol Value Unit
Supply Voltage V PowerDissipation P Thermal Derating Storage Temperature T Operating Temperature T
DD
D
K
STG OPR
5V 25 mW 10
-65 ~ +150
-20 ~ +80
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
REV: 1.3 2002.03.01
2
mW/°C
°C °C
Silan Semiconductors
SC8521
ELECTRICAL CHARACTERISTICS
(Tamb=25°C, unless otherwise specified)
Symbol Parameter Test condition Min Type Max Unit
Operating supply voltage V Supply current I Quiescent current IDD(q) Operating ambient temperature T
Sense lines (input only and will have a weak internal pull-up resistance)
LOW level input voltage V HIGH level input voltage V Pull-up resistance Rpu VDD=3V 50 -- 100
Driver lines (output only; open drain; maximum on-resistance when LOW)
Maximum on-resistance Ron VDD=3V -- -- 2
Output drive (has a weak pull-up resistance)
Source current Isink VDD=3V; VO=1.5V 3.5 4.5 5.5 mA
DD
DD
VDD=3V; TA=25°C V
=3V; TA=25°C
DD
A
IL IH
2.2 -- 4.5 V
-- -- 2 mA
-- -- 1
-10 -- +50
-- -- 0.3V
0.7V
DD
-- -- V
DD
PIN DESCRIPTION
20-pin dual in-line and small outline package (SO-20)
Pin No. Symbol Description
1 XTAL1 Oscillator input 2 XTAL2 Oscillator output 3 SN7 Sense line 7 for key matrix 4 SN0 Sense line 0 for key matrix 5 SN1 Sense line 1 for key matrix 6 SN2 Sense line 2 for key matrix 7 SN3 Sense line 3 for key matrix 8 SN6 Sense line 6 for matrix 9 SN4 Sense line 4 for matrix
10 SN5 Sense line 5 for matrix 11
12 13 14 15 16
DR5
DR4 DR3 DR2
DR1
DR0
Drive line 5 for key matrix (active LOW) Drive line 4 for key matrix (active LOW)
Drive line 3 for key matrix (active LOW) Drive line 2 for key matrix (active LOW) Drive line 1 for key matrix (active LOW)
Drive line 0 for key matrix (active LOW)
µA °C
V
K
K
To be continued
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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Silan Semiconductors
(Continued)
Pin No. Symbol Description
17 18 VSS Ground
19 Lout Output signal 20 VDD Power supply
DR6
FUNCTION DESCRIPTION
1. Key numbering for matrix is gi ven in tables 1
Table1 key numbering for 20-pin package
Driver lines
DR5
DR4 DR3 DR2
DR1 DR0 DR6
SN0 SN7 SN1 SN2 SN3 SN6 SN4 SN5
0:BANK0 1 2 3 4 5 6 7
8:BANK19 101112131415 16:BANK2 17 18 19 20 21 22 23 24:BANK3 25 26 27 28 29 30 31 32:BANK4 33 34 35 36 37 38 39 40:BANK5 41 42 43 44 45 46 47 48:BANK6 49 50 51 52 53 54 55
SN0 connected GND, send BANK7 code. BANK0----7 see the following code table.
Drive line 6 for key matrix (active LOW)
Sense lines
SC8521
When the keys have been scanned the key-number of the activated key serves as the address of the ROM to obtain the required codeword. Consequently,key numbers 6, 7, 14, 15, 22, 23, 30, 31, 38, 39 and 40 to 55 will not be addressed.
The ROM contains 8 banks of 64 code words. Thus for each key a maximum of 8 different code words may be generated. With multi-system use, 8 different systems (e.g. TV, VCR, tuner, CD etc.) may be selected. Apart from the system bits the command bits may also be different in different banks (true multi-function keys). Selection can be performed using the keys. For each key three bank selected bits are present that determine which bank will be selected for the next key.
For each key an ‘inhibit’ bit is also present. When this bit is at logic 1 at an address in a given bank, and when the corresponding key is pressed (when this bank has been selected) no transmission will take place.
A single system option is available however, whereby instead of keys jumper wire and/or a switch may be used for bank selection. Using this option it is possible to program different transmitter models in one IC and select the required bank by means of jumper wire. Instead of a jumper wire a side-switch may also be used to change the
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
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generated code temporarily (select different bank) to obtain multi-function keys. With this option the jumper wires
SC8521
or switch must be connected between sense line SN0 and one of the drivelines
DR0toDR6
or ground. This
means that SN0 cannot be used to connect keys and the maximum number of keys will be 49 keys for a 20-pin package.
It is not possible to use a combination of jumper wires and selection keys for bank selection in one unit. The output of the ROM is loaded into a shift register that provides the input bits for the pulse generator. This pulse generator drives the output pin.
2. Timing generator
A schematic diagram of the timing generator is illustrated the oscillator frequency is 432KHz. The timing generator is stopped when no key is activated and started again when a key is pressed.
The output of the oscillator (CLK1) is divided by 12 for 432KHz. Selection is achieved using a mask option. The output of the divider is CLK2 which is used for clocking of the control timer. The frequency of CLK2 is 36 KHz and the inverse is used to generate the output pulses in the subcarrier frequency. By mask option the duty factor can be chosen to be 25% or 33%.
The control timer has a length of 4096 subcarrier (pulse) periods. This is equal to the transmission repletion time. A bit time is equal to 64 pulses and the repetition time is 64 bit times. The control timer provides the timing of the key scanning, the ROM access and the code transmission. When the control timer has arrived at a certain state and no key has been pressed for at least 28 ms, a stop signal will be generated which will stop the oscillator. All drivelines will then be set to logic 0. As soon as a key is pressed one of the sense lines will become logic 0. This will generate a start signal, which will restart the oscillator.
no key
end control
start input
STOP
Q
CLK1
432 kHz INV
CLK2
CONTROL
DIVIDE-BY-4096
432kHz
OSCILLATOR DIVIDE BY 12
SQ
CLK
R
CLR
Timer schematic diagram
HANGZHOU SILAN MICROELECTRONICS JOINT-STOCK CO.,LTD
5
pulse
C0
TIMER
C11
REV: 1.3 2002.03.01
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