SF1530
High Performance Current Mode PWM Controller
FEATURES |
GENERAL DESCRIPTION |
Proprietary “Zero OCP/OPP Recovery Gap” Control
Built-in Soft Start Function
All Pins Floating Protection
Very Low Startup Current
High Voltage CMOS Process with Excellent ESD Protection
Frequency Reduction and Burst Mode Control for Energy Saving
Current Mode Control
Built-in Frequency Shuffling
Programmable Switching Frequency
Built-in Synchronous Slope Compensation
Cycle-by-Cycle Current Limiting
Built-in Leading Edge Blanking (LEB)
Constant Power Limiting
Audio Noise Free Operation
VDD OVP & Clamp
VDD Under Voltage Lockout (UVLO)
APPLICATIONS
Offline AC/DC Flyback Converter for
AC/DC Adaptors
Open-frame SMPS
Set-Top Box Power Supplies
ATX Standby Power
TYPICAL APPLICATION
SF1530 is a high performance, low cost, highly integrated current mode PWM controller for offline flyback converter applications.
PWM switching frequency with shuffling is externally programmable, which can reduce conduction EMI emission of a power supply. When the output power demands decrease, the IC automatically decreases switching frequency for high power conversion efficiency. When the current set-point falls below a given value, e.g. the output power demand diminishes, the IC enters into burst mode and provides excellent efficiency without audio noise.
The IC can achieve “Zero OCP/OPP Recovery Gap” using SiFirst’s proprietary control algorithm. Meanwhile, the OCP/OPP variation versus universal line input is compensated.
The IC has built-in synchronized slope compensation to prevent sub-harmonic oscillation at high PWM duty output. The IC also has built-in soft start function to soften the stress on the MOSFET during power on period.
SF1530 integrates functions and protections of Under Voltage Lockout (UVLO), VCC Over Voltage Protection (OVP), Cycle-by-cycle Current Limiting (OCP), All Pins Floating Protection, Over Load Protection (OLP), RT Pin Short-to-GND Protection, Gate Clamping, VCC Clamping, Leading Edge Blanking (LEB).
SF1530 is available in SOT23-6, SOP-8 and DIP-8 packages.
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DC Out |
AC IN |
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6 |
5 |
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GATE |
VDD |
CS |
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SF1530 |
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GND |
FB |
RT |
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1 |
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3 |
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TL431 |
©SiFirst Technology |
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www.sifirsttech.com |
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- 1 - |
SF1530_DS_V1.0 |
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SF1530 |
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Pin Configuration |
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1 |
8 |
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GND |
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GND |
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1 |
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6 |
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GATE |
GATE |
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DIP8 |
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FB |
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SOT23-6 |
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VDD |
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2 |
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FB |
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2 |
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5 |
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VDD |
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3 |
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4 |
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CS |
NC |
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3 |
6 |
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NC |
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RT |
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CS |
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4 |
5 |
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RT |
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Ordering Information |
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Part Number |
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Top Mark |
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Package |
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Tape & Reel |
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SF1530LGT |
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.30YWW |
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SOT26 |
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Green |
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Yes |
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SF1530DP |
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SF1530DP |
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DIP8 |
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RoHS |
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Marking Information
YWW: Year&Week code
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©SiFirst Technology |
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www.sifirsttech.com |
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- 2 - |
SF1530_DS_V1.0
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SF1530 |
Block Diagram |
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Oscillator with |
S |
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Frequency Shuffling |
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Soft Gate |
GATE |
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Q |
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Driver |
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RT |
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R |
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Zero OCP Recovery |
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Gap Control |
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Frequency |
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Reduction Control |
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RT short/floating |
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protection |
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CS floating |
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protection |
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Trimmed Voltage & |
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LEB |
Current Reference |
Internal |
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CS |
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blocks |
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OCP |
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Soft start |
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VDD |
POR |
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9V/14V |
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5.3V |
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Slope |
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compensation |
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FB |
VDD OVP
Burst Mode
Control
27.5V
33V
GND |
OLP |
43ms Delay |
3.7V
Pin Description
Pin Num |
Pin Name |
I/O |
Description |
1 |
GND |
P |
Ground |
2 |
FB |
I |
Voltage feedback pin. The loop regulation is achieved by connecting a |
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photo-coupler to this pin. PWM duty cycle is determined by this pin voltage |
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and the current sense signal at Pin 3. |
3 |
RT |
I |
Set the switching frequency by connecting a resistor between RT and |
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GND. This pin has floating/short-to-GND protection. |
4 |
CS |
I |
Current sense input pin. |
5 |
VDD |
P |
IC power supply pin. |
6 |
GATE |
O |
Totem-pole gate driver output to drive the external MOSFET. |
Absolute Maximum Ratings (Note 1)
Parameter |
Value |
Unit |
VDD DC Supply Voltage |
33 |
V |
VCC DC Clamp Current |
10 |
mA |
GATE pin |
20 |
V |
FB, RT, CS voltage range |
-0.3 to 7 |
V |
Package Thermal Resistance (SOT-26) |
250 |
oC/W |
Package Thermal Resistance (DIP-8) |
90 |
oC/W |
Package Thermal Resistance (SOP-8) |
150 |
oC/W |
Maximum Junction Temperature |
150 |
oC |
Operating Temperature Range |
-40 to 85 |
oC |
©SiFirst Technology |
www.sifirsttech.com |
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- 3 - |
SF1530_DS_V1.0
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SF1530 |
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Storage Temperature Range |
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-65 to 150 |
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oC |
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Lead Temperature (Soldering, 10sec.) |
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260 |
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oC |
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ESD Capability, HBM (Human Body Model) |
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3 |
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kV |
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ESD Capability, MM (Machine Model) |
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250 |
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V |
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Recommended Operation Conditions (Note 2) |
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Parameter |
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Value |
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Unit |
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Supply Voltage, VDD |
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11 to 25 |
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V |
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Operating Frequency |
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50 to 130 |
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kHz |
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Operating Ambient Temperature |
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-40 to 85 |
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oC |
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ELECTRICAL CHARACTERISTICS |
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(TA = 25OC, RT=100K ohm, VDD=18V, if not otherwise noted) |
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Symbol |
Parameter |
Test Conditions |
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Min |
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Typ |
Max |
Unit |
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Supply Voltage |
Section (VDD Pin) |
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UVLO(ON) |
VDD Under Voltage |
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13 |
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14 |
15 |
V |
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Lockout Exit (Startup) |
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UVLO(OFF) |
VDD Under Voltage |
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8 |
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9 |
10 |
V |
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Lockout Enter |
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I_Startup |
VDD Start up Current |
VDD =12.5V, Measure |
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5 |
20 |
uA |
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current into VDD |
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I_VDD_Op |
Operation Current |
VFB=3V,CL=1nF |
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2.5 |
3.5 |
mA |
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VDD_OVP |
VDD Over Voltage |
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25 |
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27.5 |
30 |
V |
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Protection trigger |
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VDD_Clamp |
VDD Zener Clamp |
I(VDD ) = 15 mA |
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33 |
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V |
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Voltage |
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T_Softstart |
Soft Start Time |
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3 |
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mSec |
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Feedback Input |
Section(FB Pin) |
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VFB_Open |
FB Open Voltage |
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5.3 |
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V |
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IFB_Short |
FB short circuit |
Short FB pin to GND, |
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1.1 |
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mA |
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current |
measure current |
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AVCS |
PWM Input Gain |
VFB / Vcs |
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2.0 |
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V/V |
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VFB_min_duty |
FB under voltage gate |
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1.0 |
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V |
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clock is off. |
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VTH_PL |
Power Limiting FB |
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3.7 |
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V |
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Threshold Voltage |
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TD_PL |
Power limiting |
Note 3 |
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43 |
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mSec |
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Debounce Time |
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ZFB_IN |
Input Impedance |
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5 |
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Kohm |
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Current Sense |
Input Section (CS Pin) |
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Vth_OC_min |
Internal current |
Zero duty cycle |
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0.70 |
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0.75 |
0.80 |
V |
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limiting threshold |
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T_blanking |
SENSE Input Leading |
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250 |
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nSec |
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Edge Blanking Time |
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TD_OC |
Over Current |
CL=1nF at GATE, |
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70 |
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nSec |
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Detection and Control |
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Delay |
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Oscillator Section |
(RT Pin) |
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FOSC |
Normal Oscillation |
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60 |
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65 |
70 |
KHZ |
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Frequency |
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RT_range |
Operating RT Range |
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50 |
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100 |
150 |
Kohm |
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V_RT_open |
RT open voltage |
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2.0 |
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V |
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∆F(shuffle)/Fosc |
Frequency shuffling |
Note 4 |
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-4 |
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4 |
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% |
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range |
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∆f_Temp |
Frequency |
-20oC to 100 oC (Note 4) |
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5 |
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% |
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Temperature Stability |
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∆f_VDD |
Frequency Voltage |
VDD = 12-25V, |
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5 |
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% |
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©SiFirst Technology |
www.sifirsttech.com |
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- 4 - |
SF1530_DS_V1.0