SiFirst SF1530DP, SF1530LGT Schematic [ru]
High Performance Current Mode PWM Controller
FEATURES
◆ Proprietary “Zero OCP/OPP Recovery Gap”
Control
◆ Built-in Soft Start Function
◆ All Pins Floating Protection
◆ Very Low Startup Current
◆ High Voltage CMOS Process with Excellent
ESD Protection
◆ Frequency Reduction and Burst Mode Control
for Energy Saving
◆ Current Mode Control
◆ Built-in Frequency Shuffling
◆ Programmable Switching Frequency
◆ Built-in Synchronous Slope Compensation
◆ Cycle-by-Cycle Current Limiting
◆ Built-in Leading Edge Blanking (LEB)
◆ Constant Power Limiting
◆ Audio Noise Free Operation
◆ VDD OVP & Clamp
◆ VDD Under Voltage Lockout (UVLO)
APPLICATIONS
Offline AC/DC Flyback Converter for
◆ AC/DC Adaptors
◆ Open-frame SMPS
◆ Set-Top Box Power Supplies
◆ ATX Standby Power
SF1530
GENERAL DESCRIPTION
SF1530 is a high performance, low cost, highly
integrated current mode PWM controller for offline
flyback converter applications.
PWM switching frequency with shuffling is externally
programmable, which can reduce conduction EMI
emission of a power supply. When the output power
demands decrease, the IC automatically decreases
switching frequency for high power conversion
efficiency. When the current set-point falls below a
given value, e.g. the output power demand
diminishes, the IC enters into burst mode and
provides excellent efficiency without audio noise.
The IC can achieve “Zero OCP/OPP Recovery Gap”
using SiFirst’s proprietary control algorithm.
Meanwhile, the OCP/OPP variation versus universal
line input is compensated.
The IC has built-in synchronized slope compensation
to prevent sub-harmonic oscillation at high PWM duty
output. The IC also has built-in soft start function to
soften the stress on the MOSFET during power on
period.
SF1530 integrates functions and protections of Under
Voltage Lockout (UVLO), VCC Over Voltage
Protection (OVP), Cycle-by-cycle Current Limiting
(OCP), All Pins Floating Protection, Over Load
Protection (OLP), RT Pin Short-to-GND Protection,
Gate Clamping, VCC Clamping, Leading Edge
Blanking (LEB).
SF1530 is available in SOT23-6, SOP-8 and DIP-8
packages.
TYPICAL APPLICATION
AC IN
GATE
GND
5 46
VDD
SF1530
FB
2
DC Out
CS
RT
31
TL431
©SiFirst Technology www.sifirsttech.com
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SF1530_DS_V1.0
SF1530
Pin Configuration
GND
FB
NC
RT
GND
FB
RT
1
SOT23-6
2
3
6
GATE
GATE
1
8
DIP8
VDD
5
VDD
NC
4
CS
2
3
4
7
6
5CS
Ordering Information
Part Number Top Mark Package Tape & Reel
SF1530LGT .30YWW SOT26 Green Yes
SF1530DP SF1530DP DIP8 RoHS
Marking Information
YWW: Year&Week code
©SiFirst Technology www.sifirsttech.com
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SF1530_DS_V1.0
Block Diagram
RT
Zero OCP Recovery
RT short/floating
protection
Trimmed Voltage &
Current Reference
VDD
9V/14V
33V
Gap Control
POR
27.5V
Internal
blocks
VDD OVP
GND
Oscillator with
Frequency Shuffling
OLP
Reduction Control
OCP
Burst Mode
Control
43ms Delay
S
R
Frequency
Q
CS floating
protection
Soft start
Slope
compensation
Soft Gate
Driver
3.7V
SF1530
GATE
LEB
CS
5.3V
FB
Pin Description
Pin Num Pin Name I/O Description
1 GND P Ground
2 FB I Voltage feedback pin. The loop regulation is achieved by connecting a
photo-coupler to this pin. PWM duty cycle is determined by this pin voltage
and the current sense signal at Pin 3.
3 RT I Set the switching frequency by connecting a resistor between RT and
GND. This pin has floating/short-to-GND protection.
4 CS I Current sense input pin.
5 VDD P IC power supply pin.
6 GATE O Totem-pole gate driver output to drive the external MOSFET.
Absolute Maximum Ratings (Note 1)
Parameter Value Unit
VDD DC Supply Voltage 33 V
VCC DC Clamp Current 10 mA
GATE pin 20 V
FB, RT, CS voltage range -0.3 to 7 V
Package Thermal Resistance (SOT-26) 250
Package Thermal Resistance (DIP-8) 90
Package Thermal Resistance (SOP-8) 150
Maximum Junction Temperature 150
Operating Temperature Range -40 to 85
o
C/W
o
C/W
o
C/W
o
C
o
C
©SiFirst Technology www.sifirsttech.com
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SF1530_DS_V1.0
Storage Temperature Range -65 to 150
Lead Temperature (Soldering, 10sec.) 260
SF1530
o
C
o
C
ESD Capability, HBM (Human Body Model) 3 kV
ESD Capability, MM (Machine Model) 250 V
Recommended Operation Conditions (Note 2)
Parameter Value Unit
Supply Voltage, VDD 11 to 25 V
Operating Frequency 50 to 130 kHz
Operating Ambient Temperature -40 to 85
o
C
ELECTRICAL CHARACTERISTICS
(TA = 25
O
C, RT=100K ohm, VDD=18V, if not otherwise noted)
Symbol Parameter Test Conditions Min Typ Max Unit
Supply Voltage Section (VDD Pin)
UVLO(ON) VDD Under Voltage
Lockout Exit (Startup)
UVLO(OFF) VDD Under Voltage
Lockout Enter
I_Startup VDD Start up Current VDD =12.5V, Measure
I_VDD_Op Operation Current VFB=3V,CL=1nF 2.5 3.5 mA
VDD_OVP
VDD Over Voltage
Protection trigger
VDD_Clamp VDD Zener Clamp
Voltage
T_Softstart Soft Start Time 3 mSec
13 14 15 V
8 9 10 V
5 20 uA
current into VDD
25 27.5 30 V
I(V
) = 15 mA 33 V
DD
Feedback Input Section(FB Pin)
V
Open FB Open Voltage 5.3
FB_
V
IFB_Short FB short circuit
current
A
VCS
PWM Input Gain ΔV
VFB_min_duty FB under voltage gate
Short FB pin to GND,
1.1 mA
measure current
/ΔVcs 2.0 V/V
FB
1.0 V
clock is off.
VTH_PL Power Limiting FB
3.7 V
Threshold Voltage
TD_PL Power limiting
Note 3 43 mSec
Debounce Time
ZFB_IN Input Impedance 5 Kohm
Current Sense Input Section (CS Pin)
Vth_OC_min Internal current
limiting threshold
T_blanking SENSE Input Leading
Edge Blanking Time
TD_OC Over Current
Detection and Control
Delay
Zero duty cycle 0.70 0.75 0.80 V
250 nSec
CL=1nF at GATE, 70 nSec
Oscillator Section (RT Pin)
F
Normal Oscillation
OSC
Frequency
RT_range Operating RT Range 50 100 150 Kohm
V_RT_open RT open voltage 2.0 V
∆F(shuffle)/Fosc Frequency shuffling
range
∆f_Temp Frequency
Temperature Stability
∆f_VDD Frequency Voltage VDD = 12-25V, 5 %
60 65 70 KHZ
Note 4 -4 4 %
-20oC to 100oC (Note 4) 5 %
©SiFirst Technology www.sifirsttech.com
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SF1530_DS_V1.0
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