Siemens HYM641010GS-60, HYM641010GS-70, HYM641020GS-60, HYM641020GS-70 Datasheet

1M × 64-Bit Dynamic RAM Module HYM 641010GS-60/-70

HYM 641020GS-60/-70

Advanced Information

• 1 048 576 words by 64-bit organization

• Fast access and cycle time

60 ns access time

110 ns cycle time (-60 version)

70 ns access time

130 ns cycle time (-70 version)

• Fast page mode capability with

40 ns cycle time (-60 version) 45 ns cycle time (-70 version)

• Single + 5 V (± 10 %) supply

• Low power dissipation

max. 9680 mW acti ve (-60 version) max. 8800 mW acti ve (-70 version)

CMOS – 451 mW standby TTL – 550 mW standby

• CAS-before-RAS refresh, RAS-only-refresh

• Byte Write Capability

• 16 decoupling capacitors mounted on substrate

• All inputs, outputs and clock fully TTL compatible

• 4 Byte interleave enabled, Dual Address inputs ( A0/B0)

• Buffered inputs except RAS and DQ

• 168 pin, dual read-out, Single in-Line Mem ory Module

• Utilizes sixteen 1M × 4 -DRA Ms (HYB 514400BJ/BT) and

four BiCMOS 8-bi t buffers/l ine drivers 74ABT244

• Two version : HYM 641010GS with SOJ-components (8.89 mm module thickness)

HYM 641020GS with TSOPII-components (4.06 mm module thickness)

• 1024 refresh cycles / 16 ms

• Optimized for use in byte-write non-parity applications

• Gold contact pads,double sided mo dule wi th 25.35 mm (1000 mil) height

Semiconductor Group 1

1 12.95

HYM 641010/20GS-60/-70

1M x 64 Module

The HYM 641010/20GS-60/-70 is a 8 MByte DRAM module organized as 1 048 576 words by 64bit in a 168-pin, dual read-out, s ingle-in- line package com prising s ixteen HYB 514400BJ/BT 1M × 4 DRAMs in 300 mil wide SOJ or TSOPII - packages mounted together with sixteen 0.2 µF ceramic decoupling capacitors on a PC board. All inputs except RAS four BiCMOS 8-bit buffers/line drivers.

Each HYB 514400BJ/BT is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to modul e assembly. After assembl y onto the board, a further set of electrical tests is performed.

The density and speed of the module can be detected by the use of presence detect pins.

Ordering Infor mation Type Ordering Code Package Descriptions

HYM 641020GS-60 Q67100 - Q2003 L-DIM-168-1 60 ns DRAM module HYM 641020GS-70 on request L-DIM-168-1 70 ns DRAM module

and DQ are buffered by using

HYM 641010GS-60 Q67100 - Q2002 L-DIM-168-1 60 ns DRAM module HYM 641010GS-70 on request L-DIM-168-1 70 ns DRAM module

Pin Names

A0-A9,B0 Address Input DQ0 - DQ63 Data Input/Output RAS0

, RAS2 Row Address Strobe

CAS0

- CAS7 Column Address Str obe

WE0

, WE2 Read / Write Input

OE0

, OE2 Output Enable Vcc Power (+5 Volt) Vss Ground PD1 - PD8 Presence Detect Pins PDE Presence Detect Enable ID0 , ID1 ID indentification bit N.C. No Connection

Presence-Detect and ID-pin Truth Table:

Module ID0 ID1 PD1 PD2 PD3 PD4 PD5 PD6 PD7 PD8 HYM 641010/20GS-60 Vss Vss 0 0 100111 HYM 641010/20GS-70 Vss Vss 0 0 100011

Note: 1 = hi gh l eve l ( dri v er output), 0 = l ow l e vel ( dri v er o ut put ) f or P DE active ( ground) . For PDE at a high level

all PD terminals are in tri-state.

Semiconductor Group 2

Pin Configu ration

PIN # Symbol PIN # Symbol PIN # Symbol PIN # Symbol

1 VSS 43 VSS 85 VSS 127 VSS 2 DQ0 44 OE2 86 DQ32 128 NC 3 DQ1 45 RAS2 87 DQ33 129 NC 4 DQ2 46 CAS4 88 DQ34 130 CAS5 5 DQ3 47 CAS6 89 DQ35 131 CAS7 6 VCC 48 WE2 90 VCC 132 PDE 7 DQ4 49 VCC 91 DQ36 133 VCC 8 DQ5 50 NC 92 DQ37 134 NC 9 DQ6 51 NC 93 DQ38 135 NC 10 DQ7 52 DQ16 94 DQ39 136 DQ48 11 NC 53 DQ17 95 NC 137 DQ49 12 VSS 54 VSS 96 VSS 138 VSS 13 DQ8 55 DQ18 97 DQ40 139 DQ50 14 DQ9 56 DQ19 98 DQ41 140 DQ51 15 DQ10 57 DQ20 99 DQ42 141 DQ52 16 DQ11 58 DQ21 100 DQ43 142 DQ53 17 DQ12 59 VCC 101 DQ44 143 VCC 18 VCC 60 DQ22 102 VCC 144 DQ54 19 DQ13 61 NC 103 DQ45 145 NC 20 DQ14 62 NC 104 DQ46 146 NC 21 DQ15 63 NC 105 DQ47 147 NC 22 NC 64 NC 106 NC 148 N C 23 VSS 65 DQ23 107 VSS 149 DQ55 24 NC 66 NC 108 NC 150 N C 25 NC 67 DQ24 109 NC 151 DQ55 26 VCC 68 VSS 110 VCC 152 VSS 27 WE0 69 DQ25 111 NC 153 DQ57 28 CAS0 70 DQ26 112 CAS1 154 DQ58 29 CAS2 71 DQ27 113 CAS3 155 DQ59 30 RAS0 72 DQ28 114 NC 156 DQ60 31 OE0 73 VCC 115 NC 157 VCC 32 VSS 74 DQ29 116 VSS 158 DQ61 33 A0 75 DQ30 117 A1 159 DQ62 34 A2 76 DQ31 118 A3 160 DQ63 35 A4 77 NC 119 A5 161 NC 36 A6 78 VSS 120 A7 162 VSS 37 A8 79 PD1 121 A9 163 PD2 38 NC 80 PD3 122 NC 164 PD4 39 NC 81 PD5 123 NC 165 PD6 40 VCC 82 PD7 124 VCC 166 PD8 41 NC 83 ID0 125 NC 167 ID1 42 NC 84 VCC 126 B0 168 VCC

HYM 641010/20GS-60/-70

1M x 64 Module

Semiconductor Group 3

HYM 641010/20GS-60/-70

1M x 64 Module

RAS0

WE0 OE0 CAS0

DQ0-DQ3

DQ4-DQ7

CAS1

DQ8-DQ11

DQ12-DQ15

CAS2 CAS6

I/O1-I/O4

RAS2

WE2

OE2

CAS4

DQ32-DQ35

DQ36-DQ39

CAS5

DQ40-DQ43

DQ44-DQ47

I/O1-I/O4

D10

I/O1-I/O4

D11

DQ16-DQ19

DQ20-DQ23

CAS3 CAS7

DQ24-DQ27

DQ28-DQ31

A0 B0 A1-A9

I/O1-I/O4

D0 - D7 D8 - D15 D0 - D17

Block Diagram

DQ48-DQ51

DQ52-DQ55

DQ56-DQ59

DQ60-DQ63

Vcc

Vss

I/O1-I/O4

D12

I/O1-I/O4

D13

I/O1-I/O4

D14

I/O1-I/O4

D15

D0-D15 , buffers

Semiconductor Group 4

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