Semiconductor Group 591
1M × 36-Bit Dynamic RAM Module
(2M × 18-Bit Dynamic RAM Module)
Advanced Information
HYM 361120/40S/GS-60/-70
• 1 048 576 words by 36-bit organization
(alternative 2 097 152 words by 18-bit)
• Fast access and cycle time
60 ns access time
110 ns cycle time (-60 version)
70 ns access time
130 ns cycle time (-70 version)
• Fast page mode capability with
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
• Single + 5 V (± 10 %) supply
• Low power dissipation
max. 6820 mW active (-60 version)
max. 6160 mW active (-70 version)
CMOS – 66 mW standby
TTL – 132 mW standby
• CAS-before-RAS refresh, RAS-only-refresh,
Hidden refresh
Ordering Information
Type Ordering Code Package Descriptions
HYM 361140S-60 Q67100-Q959 L-SIM-72-8 DRAM module (access time 60 ns)
HYM 361140S-70 Q67100-Q958 L-SIM-72-8 DRAM module (access time 70 ns)
HYM 361120S-60 Q67100-Q942 L-SIM-72-3 DRAM module (access time 60 ns)
HYM 361120S-70 Q67100-Q741 L-SIM-72-3 DRAM module (access time 70 ns)
HYM 361140GS-60 Q67100-Q1019 L-SIM-72-8 DRAM module (access time 60 ns)
HYM 361140GS-70 Q67100-Q651 L-SIM-72-8 DRAM module (access time 70 ns)
HYM 361120GS-60 Q67100-Q961 L-SIM-72-3 DRAM module (access time 60 ns)
HYM 361120GS-70 Q67100-Q960 L-SIM-72-3 DRAM module (access time 70 ns)
Semiconductor Group 591 06.94
• 12 decoupling capacitors mounted on
substrate
• All inputs, outputs and clock fully TTL
compatible
• 72 pin Single in-Line Memory Module
• Utilizes four 1M × 1-DRAMs and eight
1M × 4-DRAMs in 300 mil SOJ packages
• 1024 refresh cycles/16 ms
• Tin-Lead contact pads (S - version)
• Gold contact pads (GS - version)
• HYM 321140S: single sided module with
31.75 mm (1250 mil) height
• HYM 321120S: double sided module with
25.40 mm (1000 mil) height