Siemens HYM328000GD-50, HYM328000GD-60 Datasheet

8M × 32-Bit Dynamic RAM Module SMALL OUTLINE MEMORY MODULE
Preliminary Information
8 388 608 words by 32-bit organization
Fast access and cycle time
50 ns access time
60 ns access time
Fast page mode capability with
35 ns cycle time (-50 version) 40 ns cycle time (-60 version)
Single + 3.3 V (± 0.3 V) supply
Low power dissipation
max. 2016 mW active (-50 version) max. 1728 mW active (-60 version)
HYM 328000GD-50/-60
LVCMOS – 3.6 mW standby LVTTL – 28.8 mW standby
CAS-before-RAS refresh, RAS-only-refresh, Self Refresh
4 decoupling capacitors mounted on substrate
All inputs, outputs and clock fully TTL compatible
72 pin, dual read-out, one bank, Small Outline DIMM Module
Utilizes four 8M × 8 -DRAMs (HYB 3165800T)
4096 refresh cycles / 64 ms
Gold contact pad
Semiconductor Group 187 11.94
HYM328000GD-50/-60
8M x 32 SO-DIMM
The HYM 328000GD -50/-60 is a 32 MByte DRAM module organized as 8 388 608 words by 32-bit in a 72-pin, dual read-out, small outline package comprising four HYB 3165800T 8M × 8 DRAMs in 500 mil wide TSOPII-34 - packages mounted together with four 0.2 µF ceramic decoupling capacitors on a PC board. Each HYB 3165800T is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed.
The density and speed of the module can be detected by the use of presence detect pins. These modules are ideal for portable systems applications where high memory capacity is needed.
Ordering Information Type Ordering Code Package Descriptions
HYM 328000GD -50 on request L-DIM-72-2 50 ns DRAM module HYM 328000GD -60 on request L-DIM-72-2 60 ns DRAM module
Pin Names
A0-A11 Row Address Input A0-A10 Column Address Inputs DQ0 - DQ31 Data Input/Output RAS0, RAS2 Row Address Strobe CAS0 - CAS3 Column Address Strobe WE Read / Write Input Vcc Power (+3.3 Volt) Vss Ground PD1 - PD7 Presence Detect Pins N.C. No Connection
Presence-Detect and ID-pin Thruth Table *:
Module PD1 PD2 PD3 PD4 PD5 PD6 PD7 HYM 328000GD -50 VSS VSS NC NC VSS VSS NC HYM 328000GD -60 VSS VSS NC NC NC NC NC
note: PD1 .. PD4 : configuration
PD5 .. PD6 : speed
PD7 : refresh mode (NC = normal refresh)
* acccording to JEDEC letter ballot JC-42.5-95 Item #646/651
Semiconductor Group 188
Pin Configuration
PIN Name PIN NAME PIN NAME PIN NAME
1 VSS 37 DQ16 2 DQ0 38 DQ17 3 DQ1 39 VSS 4 DQ2 40 5 DQ3 41 7 DQ5 43
9 DQ7 45 NC 10 VCC 46 NC 11 PD1 47 13 A1 49 DQ18 14 A2 50 DQ19 15 A3 51 DQ20 16 A4 52 DQ21 17 A5 53 DQ22 18 A6 54 DQ23 19 A10 55 NC 20 NC 56 DQ24 21 DQ8 57 DQ25 22 DQ9 58 DQ26 23 DQ10 59 DQ28 24 DQ11 60 DQ27 25 DQ12 61 VCC 26 DQ13 62 DQ29 27 DQ14 63 DQ30 28 A7 64 DQ31 29 A11 65 NC 30 VCC 66 PD2 31 A8 67 PD3 32 A9 68 PD4 33 NC 69 PD5 34 35 DQ15 71 PD7 36 NC 72 VSS
Front Side
CAS2 6 DQ4 42 CAS3 CAS1 8 DQ6 44 RAS0
WRITE 12 A0 48 NC
RAS2 70 PD6
Back Side
CAS0
HYM328000GD-50/-60
8M x 32 SO-DIMM
Pin2
Pin72
Pin1
Pin71
Semiconductor Group 189
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