Siemens HYM324000GD-50, HYM324000GD-60 Datasheet

4M × 32-Bit Dynamic RAM Module SMALL OUTLINE MEMORY MODULE
Preliminary Information
4 0194 034 words by 32-bit organization
Fast access and cycle time
50 ns access time
60 ns access time
Fast page mode capability with
35 ns cycle time (-50 version) 40 ns cycle time (-60 version)
Single + 3.3 V (± 0.3 V) supply
Low power dissipation
max. 1008 mW active (-50 version) max. 864 mW active (-60 version)
HYM 324000GD-50/-60
LVCMOS – 1.8 mW standby TTL – 14.4 mW standby
CAS-before-RAS refresh, RAS-only-refresh. Self Refresh
2 decoupling capacitors mounted on substrate
All inputs, outputs and clock fully TTL compatible
72 pin, dual read-out, one bank, Small Outline DIMM Module
Utilizes two 4M × 16 -DRAMs (HYB 3165160T)
4096 refresh cycles / 64 ms
Gold contact pad
Semiconductor Group 181 11.94
HYM324000GD-50/-60
4M x 32 SO-DIMM
The HYM 324000GD -50/-60 is a 16 MByte DRAM module organized as 4 194 304 words by 32-bit in a 72-pin, dual read-out, small outline package comprising two HYB 3165160T 4M× 16 DRAMs in 500 mil wide TSOPII-54 - packages mounted together with two 0.2 µF ceramic decoupling capacitors on a PC board. Each HYB 3165160T is described in the data sheet and is fully electrically tested and processed according to Siemens standard quality procedure prior to module assembly. After assembly onto the board, a further set of electrical tests is performed.
The density and speed of the module can be detected by the use of presence detect pins. These modules are ideal for portable systems applications where high memory capacity is needed.
Ordering Information Type Ordering Code Package Descriptions
HYM 324000GD -50 on request L-DIM-72-1 50 ns DRAM module HYM 324000GD -60 on request L-DIM-72-1 60 ns DRAM module
Pin Names
A0-A11 Row Address Input A0-A9 Column Address Inputs DQ0 - DQ31 Data Input/Output RAS0, RAS2 Row Address Strobe CAS0 - CAS3 Column Address Strobe WE Read / Write Input Vcc Power (+3.3 Volt) Vss Ground PD1 - PD7 Presence Detect Pins N.C. No Connection
Presence-Detect and ID-pin Thruth Table *):
Module PD1 PD2 PD3 PD4 PD5 PD6 PD7 HYM 324000GD -50 NC NC VSS NC VSS VSS NC HYM 324000GD -60 NC NC VSS NC NC NC NC
note: PD1 .. PD4 : configuration
PD5 .. PD6 : speed
PD7 : refresh mode (NC = normal refresh) *) according to JEDEC letter ballot JC-42.5-95 Item #646/651
Semiconductor Group 182
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