Siemens HYM322035GS-50, HYM322035GS-60, HYM322035GS-70, HYM322035S-50, HYM322035S-60 Datasheet
...
2M x 32-Bit Dynamic RAM Module HYM 322035S/GS-50/-60/-70
Advanced Information
• 2 097 152 words by 32-bit organization
• 1 memory bank
• Fast access and cycle time
50 ns access time
84 ns cycle time (-50 version)
60 ns access time
104 ns cycle time (-60 version)
70 ns access time
124 ns cycle time (-70 version)
• Hyper page mode - EDO capability
35 ns cycle time (-50 version)
40 ns cycle time (-60 version)
45 ns cycle time (-70 version)
• Single + 5 V (± 10 %) supply
• Low power dissipation
max. 2640 mW acti ve (-50 version)
max. 2420 mW acti ve (- 60 vers ion)
max. 2200 mW acti ve (- 70 vers ion)
CMOS – 22 mW standby
TTL –44 mW standby
• CAS-before-RAS refresh
-only-refresh
RAS
Hidden-refresh
• 4 decoupling capacitors mounted on substrate
• All inputs, outputs and clocks fully TTL compatible
• 72 pin Single in-Line Memory Module (L-SIM- 72-9 ) with 20.32 mm (800 mil) height
• Utilizes fo ur 2M × 8 -DRAMs in 400 mil SOJ packages
• 2048 refresh cycles / 32 ms with 11/10 addressing
• Optimized for use in byte-write non-parity applications
• Tin-Lead contact pads (S-version)
• Gold contact pads (GS - version)
Semiconductor Group 1
Semicunductor Group 2.96
HYM 322035S/GS-50/-60/-70
2M × 32-Bit EDO-Module
The HYM 322035S/GS-50/-60/-70 is a 8 MByte DRAM module organized as 2 097 152 words by
32-bit in a 72-pin single-in-l ine package compr ising four HYB 5117805BSJ 2M × 8 EDO-D RAM s
in 400 mil wide SOJ-packages mounted together with four 0.2 µF ceramic decoupling capacitors on
a PC board.
Each HYB 5117805BSJ is described in the data sheet and is fully electrical tested and processed
according to SIEMENS standard quality procedure prior to module assembly. After assembly onto
the board, a further set of electrical tests is performed.
The speed of the module can be detected by the use of four presence detect pins.
The common I/O feature on the HYM 322035S/GS-60/-70 dictates the use of ear ly write cyc les.
Ordering Information
Type Ordering Code Package Description
HYM 322035S-50 L-SIM-72-9 EDO-DRAM Module
(access time 50 ns)
HYM 322035S-60 L-SIM-72-9 EDO-DRAM Module
(access time 60 ns)
HYM 322035S-70 L-SIM-72-9 EDO-DRAM Module
(access time 70 ns)
HYM 322035GS-50 L-SIM-72-9 EDO-DRAM Module
(access time 50 ns)
HYM 322035GS-60 L-SIM-72-9 EDO-DRAM Module
(access time 60 ns)
HYM 322035GS-70 L-SIM-72-9 EDO-DRAM Module
(access time 70 ns)
Semiconductor Group 2
Pin Configuration
VSS 1 DQ0 2
DQ16 3 DQ1 4
DQ17 5 DQ2 6
DQ18 7 DQ3 8
DQ19 9 VCC 10
N.C. 11 A0 12
A1 13 A2 14
A3 15 A4 16
A5 17 A6 18
A10 19 DQ4 20
DQ20 21 DQ5 22
DQ21 23 DQ6 24
DQ22 25 DQ7 26
DQ23 27 A7 28
N.C. 29 VCC 30
A8 31 A9 32
N.C. 33 RAS2
N.C. 35 N.C. 36
34
HYM 322035S/GS-50/-60/-70
2M × 32-Bit EDO-Module
Pin Names
A0R-A10R Row Address Inputs
A0C-A9C Column Address Inputs
DQ0-DQ31 Data Input/Output
CAS0
- CAS3 Column Address Strobe
RAS0
, RAS2 Row Address Stro be
WE
V
CC
V
SS
PD Presence Detect Pin
N.C. No Connection
Read/Write Input
Power (+ 5 V)
Ground
N.C. 37 N.C. 38
VSS 39 CAS0
41 CAS3 42
CAS2
CAS1
43 RAS0 44
N.C. 45 N.C. 46
47 N.C. 48
WE
DQ8 49 DQ24 50
DQ9 51 DQ25 52
DQ10 53 DQ26 54
DQ11 55 DQ27 56
DQ12 57 DQ28 58
VCC 59 DQ29 60
DQ13 61 DQ30 62
DQ14 63 DQ31 64
DQ15 65 N.C. 66
PD0 67 PD1 68
PD2 69 PD3 70
N.C. 71 VSS 72
40
Presence Detect Pins
-50 -60 -70
PD0 N.C. N.C. N.C.
PD1 N.C. N.C. N.C.
PD2
PD3
V
V
SS
SS
N.C.
V
SS
N.C. N.C.
Semiconductor Group 3
Loading...