Siemens HYB514800BJ-60, HYB514800BJ-70, HYB514800BJ-80 Datasheet
Semiconductor Group 125 01.95
512kx8-Bit Dynamic RAM
Advanced Information
• 512 288 words by 8-bit organization
• 0 to 70 ˚C operating temperature
• Fast access and cycle time
RAS access time:
60 ns (-60 version)
70 ns (-70 version)
80 ns (-80 version)
CAS access time:
20 ns
Cycle time:
110 ns (-60 version)
130 ns (-70 version)
150 ns (-80 version)
• Fast page mode cycle time
45 ns (-60 version)
45 ns (-70 version)
50 ns (-80 version)
• Single + 5 V (± 10 %) supply with a
built-in
V
bb
generator
Ordering Information
Type Ordering Code Package Descriptions
HYB 514800BJ-60 Q67100-Q849 P-SOJ-28-2 DRAM
(access time 60 ns)
HYB 514800BJ-70 Q67100-Q850 P-SOJ-28-2 DRAM
(access time 70 ns)
HYB 514800BJ-80 Q67100-Q851 P-SOJ-28-2 DRAM
(access time 80 ns)
HYB 514800BJ -60/-70/-80
• Low power dissipation
max. 605 mW active (-60 version)
max. 550 mW active (-70 version)
max. 468 mW active (-80 version)
• Standby power dissipation:
11 mW standby standby (TTL)
5.5 mW max.standby (CMOS)
• Output unlatched at cycle end allows two-
dimensional chip selection
• Read, write, read-modify write, CAS-before-
RAS refresh, RAS-only refresh, hidden
refresh, fast page mode capability
• All inputs and outputs TTL-compatible
• 1024 refresh cycles / 16 ms
• Plastic Packages: P-SOJ-28-2 400 mil width
Semiconductor Group 126
The HYB 514800BJ is the new generation dynamic RAM organized as 512 288 words by 8-bit. The
HYB 514800BJ utilizes CMOS silicon gate process as well as advances circuit techniques to
provide wide operation margins, both internally and for the system user. Multiplexed address inputs
permit the HYB 514800BJ to be packed in a standard plastic 400mil wide P-SOPJ-28 package. This
package size provides high system bit densities and is compatible with commonly used automatic
testing and insertion equipment. System oriented feature include single + 5 V (± 10 %) power
supply, direct interfacing with high performance logic device families such as Schottky TTL.
Pin Definitions and Functions
Pin Configuration
(top view)
A0-A8,A9R Address Input
RAS Row Address Strobe
CAS Column Address Strobe
WRITE Read/Write Input
OE Output Enable
IO1 - IO8 Data Input/Output
N.C. No Connection
V
CC
Power Supply (+ 5 V)
V
SS
Ground (0 V)
P-SOJ-28-2 ( 400 mil width)
HYB 514800BJ -60/-70/-80
512k x 8 DRAM
Semiconductor Group 127
Block Diagram
HYB 514800BJ -60/-70/-80
512k x 8 DRAM
Semiconductor Group 128
Absolute Maximum Ratings
Operating temperature range ............................................................................................0 to 70 ˚C
Storage temperature range......................................................................................– 55 to + 150 ˚C
Soldering temperature ............................................................................................................260 ˚C
Soldering time.............................................................................................................................10 s
Input/output voltage ........................................................................................................– 1 to + 7 V
Power Supply voltage.....................................................................................................– 1 to + 7 V
Data out current (short circuit) ................................................................................................50mA
Note:
Stresses above those listed under "Absolute Maximum Ratings" may cause permanent
damage of the device. Exposure to absolute maximum rating conditions for extended periods
may affect device reliability.
DC Characteristics
T
A
= 0 to 70 ˚C, VSS = 0 V, VCC = 5 V ± 10 %, tT = 5 ns
Parameter Symbol Limit Values Unit Test
Condition
min. max.
Input high voltage
V
ih
2.4 6.5 V
1)
Input low voltage V
il
– 1.0 0.8 V
1)
Output high voltage (I
OUT
= – 5 mA) V
oh
2.4 – V
1)
Output low voltage (I
OUT
= 4.2 mA) V
ol
– 0.4 V
1)
Input leakage current, any input
(0 V <
V
in
< 7, all other input = 0 V)
I
I(L)
– 10 10 µA
1)
Output leakage current
(DO is disabled, 0 <
V
OUT
< VCC)
I
o(L)
– 10 10 µA
1)
Average VCC supply current
-60 version
-70 version
-80 version
I
CC1
–
–
–
110
100
90
mA
2) 3)
Standby VCC supply current
(RAS = CAS =
V
ih
)
I
CC2
–2mA–
Average
V
CC
supply current during RAS-only
refresh cycles -60 version
-70 version
-80 version
I
CC3
–
–
–
110
100
90
mA
2)
Average VCC supply current during fast page
mode operation -60 version
-70 version
-80 version
I
CC4
–
–
–
70
60
50
mA
2) 3)
HYB 514800BJ -60/-70/-80
512k x 8 DRAM
Semiconductor Group 129
Standby VCC supply current
(RAS = CAS =
V
CC
– 0.2 V)
I
CC5
–1mA
1)
Average VCC supply current during
CAS before RAS refresh mode
-60 version
-70 version
-80 version
I
CC6
–
–
–
110
100
90
mA
2)
DC Characteristics (cont’d)
T
A
= 0 to 70 ˚C, VSS = 0 V, VCC = 5 V ± 10 %, tT = 5 ns
Parameter Symbol Limit Values Unit Test
Condition
min. max.
HYB 514800BJ -60/-70/-80
512k x 8 DRAM
Semiconductor Group 130
AC Characteristics
4)
T
A
= 0 to 70 ˚C; VCC = 5 V ± 10 %; tT = 5 ns
Parameter Symbol Limit Values Unit
-60 -70 -80
min. max. min. max. min. max.
Random read or write
time
t
RC
110 – 130 – 150 – ns
Read-write cycle time
t
RWC
165 – 185 – 205 – ns
Fast page mode
cycle time
t
PC
45 – 45 – 50 – ns
Fast page mode
read/write cycle time
t
PRWC
100 – 100 – 105 – ns
Access time from
RAS
6) 11)
t
RAC
–60–70–80ns
Access time from
CAS
6) 11)
t
CAC
–20–20–20ns
Access time from
column address
6) 12)
t
AA
–30–35–40ns
Access time from
CAS precharge
6)
t
CPA
–40–40–45ns
CAS to output in
low-Z
6)
t
CLZ
0–0–0–ns
Output buffer turn-off
delay from CAS
7)
t
OFF
020020020ns
Transition time
(rise and fall)
5)
t
T
350350350ns
RAS precharge time
t
RP
40 – 50 – 60 – ns
RAS pulse width
t
RAS
60 10000 70 10000 80 10000 ns
RAS pulse width in
fast page mode
t
RASP
60 200000 70 200000 80 200000 ns
CAS pulse width
t
CAS
20 10000 20 10000 20 10000 ns
RAS hold time
t
RSH
20 – 20 – 20 – ns
CAS hold time
t
CSH
60 – 70 – 80 – ns
RAS hold time from
CAS precharge
(Fast page mode)
t
RHCP
40 – 45 – 50 – ns
CAS precharge to
WRITE delay time
(FPM read-modify-write)
t
CPWD
60 – 65 – 70 – ns
HYB 514800BJ -60/-70/-80
512k x 8 DRAM
Semiconductor Group 131
RAS to CAS
delay time
11)
t
RCD
20 40 20 50 20 60 ns
RAS to column
address delay
time
12)
t
RAD
15 30 15 35 15 40 ns
CAS to RAS
precharge time
t
CRP
5–5–10–ns
CAS precharge time
t
CP
10 – 10 – 10 – ns
Row address setup
time
t
ASR
0–0–0–ns
Row address hold
time
t
RAH
10 – 10 – 10 – ns
Column address
setup time
t
ASC
0–0–0–ns
Column address hold
time
t
CAH
15 – 15 – 15 – ns
Column address to
RAS lead time
t
RAL
30 – 35 – 40 – ns
Read command
setup time
t
RCS
0–0–0–ns
Read command hold
time
8)
t
RCH
0–0–0–ns
Read command hold
time ref. to RAS
8)
t
RRH
0–0–0–ns
Write command hold
time
t
WCH
10 – 15 – 15 – ns
Write command hold
time ref. to RAS
t
WCR
50 – 55 – 60 – ns
Write command
pulse width
t
WP
10 – 15 – 15 – ns
Write command to
RAS lead time
t
RWL
20 – 20 – 20 – ns
Write command to
CAS lead time
t
CWL
20 – 20 – 20 – ns
Data setup time
9)
t
DS
0–0–0–ns
AC Characteristics (cont’d)
4)
T
A
= 0 to 70 ˚C; VCC = 5 V ± 10 %; tT = 5 ns
Parameter Symbol Limit Values Unit
-60 -70 -80
min. max. min. max. min. max.
HYB 514800BJ -60/-70/-80
512k x 8 DRAM
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