Following standards were applied to this product, in order to achieve compliance
with the electromagnetic compatibility:
- Immunity in accordance with EN 50082-1: 1992
- Emmitions in accordance with EN 55022: 1987 Class B.
FCC Notice:
This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of
FCC Rules. These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy. If not installed and used properly, in
strict accordance with the manufacturer’s instructions, may cause harmful interference to radio communications.
However, there is no guarantee that interference will not occur in a particular installation. If this equipment does cause
interference to radio or television reception, which can be determined by turning the equipment off and on, the user is
encouraged to try to correct the interference by one or more of the following measures :
Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/television technician for help and for additional suggestions.
The user may find the following booklet prepared by the Federal Communications Commission helpful “How to Identify
and Resolve Radio-TV Interference Problems.” This booklet is available from the U.S. Government Printing Office.
Washington, DC 20402, Stock 004-000-00345-4
FCC Warning
The user is cautioned that changes or modifications not expressly approved by the manufacturer could void the user’s
authority to operate this equipment.
Note : In order for an installation of this product to maintain compliance with the limits for a Class B device, shielded
cables and power cord must be used.
NOTICE
Copyright 1996.
All Right Reserved
Manual Ver 1.0
All information, documentation, and specifications contained in this manual are subject to change without
prior notification by the manufacturer.
The author assumes no responsibility for any errors or omissions which may appear in this document nor
does it make a commitment to update the information contained herein.
TRADEMARKS
Intel is a registered trademark of Intel Corporation
Pentium™ Pro Processor is a registered trademark of Intel Corporation
PC/AT is a registered trademark of International Business Machine Corporation.
PS/2 is a registered trademark of IBM Corporation.
All other brand and product names referred to in this manual are trademarks or registered trademarks of
HOT-613 mainboard is a highly integrated IBM PC/AT compatible system board. The design
will accept dual or single Intel 180MHz or 200 MHz Pentium Pro processors with size of
256KB and 512KB cache. The memory subsystem is designed to support up to 512 MB of
EDO, Burst EDO, and Fast Page Mode DRAM Module in standard 72-pin SIMM socket. A
type 8 Pentium processor socket provides access to future processor enhancements.
HOT-613 mainboard provides a new level of I/O integration. Intel's 82440FX PCIset chipset
provides increased integration and improved performance over other chipset designs. The
82440FX PCIset chipset provides an integrated Bus Mastering IDE controller with two high
performance IDE interfaces for up to four IDE devices.
The onboard Super I/O controller provides the standard PC I/O functions: floppy interface,
two FIFO serial ports, an IrDA device port and a SPP/EPP/ECP capable parallel port.
Up to four PCI local bus slots provide a high bandwidth data path for data-movement
intensive functions such as graphics, and up to three ISA slots complete the I/O function.
The HOT-613 mainboard provides the foundation for cost effective, high performance, highly
expandable platforms, which deliver the latest in Pentium Pro processor and I/O standard.
User's Manual 4
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Chapter1 Introduction
Specification
CPU
Supports dual or single 180MHz or 200MHz Pentium™ Pro CPU on ZIF
socket 8.
Note : HOT-613 main board doesn't support older Pentium ™ Pro processors without
VID (Voltage Identification) supported
VRMs
Provide two VRM headers for external VRMs.
Chipset
Features Intel's i440FX PCIset with super I/O subsystems.
Memory
Supports four 72-pin SIMMs of 4MB, 8MB, 16MB, 32MB, 64MB, and
128MB to form a memory size from 8MB to 512MB.
Supports Fast Page Mode (FPM), Extended Data Output (EDO), and
Burst Extended Data Output (BEDO) DRAM Module.
Supports Error Checking and Correcting (ECC) function, when using
parity DRAM modules can detect and correct 1 bit memory errors.
Cache Memory
Support Pentium™ Pro's built-in 256KB or 512KB level 2 cache so that
no external cache chips are required.
Power Management Function
Provides four power management modes : Full on, Doze, Standby, and
Suspend.
Supports Microsoft APM 1.2.
Provides EPMI (External Power Management Interrupt) pin
Expansions
32-bit PCI bus slot x 4
16-bit ISA bus slot x 3
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2-channel PCI IDE port support up to 4 IDE devices.
- PIO Mode 4, DMA Mode 2 transfers up to 22 MB/sec
- Integrated 8 x 32-bit buffer for PCI IDE burst transfers
One floppy port
One parallel port
EPP (Enhanced Parallel Port), and
ECP (Extended Capabilities Port) high performance parallel port.
Two serial ports
- Supports 16C550 compatible UARTS.
- Supports IrDA (Infrared) communication.
One PS/2 mouse port
Two USB (Universal Serial Bus) ports
System BIOS
Award 4.51PG Pentium Pro™ PCI BIOS
Support DMI (Desktop Management Interface)
Board Design
ATX form factor 305mm x 240mm
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Chapter2 Hardware Configuration
Jumpers
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CPU Clock Speed Selection
HOT-613 mainboard features a clock generator to provide adjustable System Bus Clocks
and PCI Bus Clocks. JP8 and JP9 are 2-pin jumper that determine the System Bus Clock
from 50 MHz to 66 MHz and PCI Bus Clock from 25MHz to 33MHz.
HOT-613 mainboard also provides Jumper JP4, JP5, JP6, and JP8 to figure the CPU Core
Clock multiplier. By inserting or removing jumper caps on those jumpers, the user can
change the System Bus Clock/CPU Core Clock ratio from 1 : 2 to 1 : 4.
System Bus Clock & PCI Bus Clock Selection - JP8, JP9
System Bus Clock50 MHz60 MHz66 MHz
PCI Bus Clock
CPU Freque ncy Multiplier Selection - JP4, J P 5 , JP6, JP7
Fre quency
Multiplier
25 MHz30 MHz33 MHz
2 X2.5 X3 X3.5 X4 X
Pentium Pro Processor Freque ncy Refere nce Table
Pentium Pro
180 MHz60 MHz3 X
200 MHz66 MHz3 XFactory Default
System Bus
Clock - JP8,
JP9
Multiplier - JP4,
JP5, JP6, JP7
Remark
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Onboard Voltage Regulators
HOT-613 mainboard is designed with onboard voltage regulator to
provide VIO power for onboard chipset and Pentium™ Pro
processor. HOT-613 needs external VRMs to provide power for
VCORE of Pentium™ Pro processor.
Pentium™ Pro processors required different voltages. Current
processors (marked "Pentium™ Pro") support VID and will
automatically adjust the voltage regulator so that no jumper
settings are required and provided on
HOT-613.
HOT-613 doesn't support older Pentium Pro processors without VID supported .
Clear CMOS - JP17
This jumper clears the CMOS data stored in the DALLAS R.T.C device. To clear the
CMOS data please follow one of list steps:
Onboard DALLAS DS12887A:
1) Turn off the PC,
2) Insert the jumper cap on JP17 for a while,
3) Remove the jumper cap from JP17,
4) Turn on the PC.
Selection JP17
Normal Operation
Onboard DALLAS DS12B887:
1) Turn off the PC,
2) Insert the jumper cap on JP17,
3) Turn on the PC for a while,
4) Turn off the PC,
3) Remove the jumper cap from JP17,
4) Turn on the PC.
User's Manual 9
Clear CMOS
Page 10
Flash EEPROM Jumper - JP15
HOT-613 mainboard supports two types of flash EEPROM, 5 volt and 12 volt. By
setting up jumper JP15, you can update both types of flash EEPROM with new system
BIOS files as they come available.
Normal, JP15 was set by factory, the user need not to change.
JP15 Pin 2-3 Close for 5V
JP15 Pin 1-2 Close for 12V
BIOS UPGRADES
Flash memory makes distributing BIOS upgrades easy. A new version of the BIOS can
be installed from a diskette.
Please note the following when making the BIOS updates.
** Flash utility can't work under protected/virtual mode. Memory manager
like QEMM.386, EMM386 should not be loaded. (or Simply bypass allconfig.sys and autoexec.bat on system boot up.
** Flash utility supports both 5V and 12V Flash EEPROM.
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Connectors & Sockets
Connectors
ITEMFUNCTION
JP12On-board PCI Primary IDE Connector
JP13On-board PCI Secondary IDE Connector
CN1On-board Floppy Controller Connector
CN2On-board Parallel Port Connector
CN4On-board Serial port-1 Connector
CN3On-board Serial Port-2 Connector
JP29IrDA Connector - * Note 1
J6, J7USB Connectors - * Note 2
KB1PS/2 Keyboard Connector
PS1PS/2 Mouse Connector - * Note 3
J11PC Speaker Connector
J12Power LED & Keylock Connector
JP24Hardware Reset Switch Connector
JP36Power Management LED Connector
JP21On-board IDE Read/Write LED Connector
JP25, JP3712 V Cooling Fan Power Connectors - * Note 4
JP22EPMI Connector
JP34ATX Power Switch Connector
Note 1: JP29 - Infrared module connector
The main board provides a 5-pin infrared connector - JP29 as an optional
infrared module for wireless transmitting and receiving. Only first 4 pins are
available, left 3 pins are reserved for future use.
Note 2: J6, J7 - USB connectors
The main board provides two sets USB (Universal Serial Bus) connectors
- J6 and J7 for USB devices use.
Note 3: Dual FAN - 12V cooling fan power connectors
The main board provides dual on-board 12V cooling fan power connector for
cooling fan. Please make sure the red wire connect to +12V and black wire
connect to ground (GND).
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Chapter3 Memory Configuration
The HOT-613 mainboard provides four 72-pin SIMM(Single In-line Memory Module)
sockets that make it possible to install up to 512MB of RAM. The SIMM socket support
4MB, 8MB, 16MB, 32MB, 64MB, and 128MB Fast Page Mode(FPM), EDO(Extended
Data Output), and Burst EDO(BEDO).
HOT-613 mainboard supports memory Error Checking and Correcting (ECC) function.
To support ECC, the user must use true (opposed to phantom parity generated by TTL
chips) 36-bit parity-type SIMMs.
The four SIMM sockets are arranged in two banks of two sockets each. Each bank provides
a 72-bit(with parity) or 64-bit(without parity) wide data path. Both SIMMs in a bank must
be of the same memory size and type, although the different types of memory may differ
between banks.
HOT-613 BIOS ROM has a built-in Setup program that allows users to modify the basic
system configuration. This type of information is stored in battery-backed RAM so that it
retains the Setup information when the power is turned off.
Entering Setup
Power on the computer and press <Del> immediately will allow you to enter Setup.
The other way to enter Setup is to power on the computer, when the below message
appear briefly at the bottom of the screen during the POST (Power On Self Test),
press <Del> key or simultaneously press <Ctrl>,<Alt>, and <Esc> keys.
TO ENTER SETUP BEFORE BOOT PRESS CTRL-ALT-ESC OR DEL KEY
If the message disappears before you respond and you still wish to enter Setup, restart
the system to try again by turning it OFF the ON or pressing the "RESET" button on
the system case. You may also restart by simultaneously press <Ctrl>,<Alt>, and
<Delete> keys. If you do not press the keys at the correct time and the system does
not boot, an error message will be displayed and you will again be asked to,
PRESS F1 TO CONTINUE, CTRL-ALT-ESC OR DEL TO ENTER SETUP
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The Main Menu
Standard CMOS setup
This setup page includes all the items in a standard compatible BIOS.
BIOS features setup
This setup page includes all the items of Award special enhanced features.
Chipset features setup
This setup page includes all the items of chipset features.
Power Management Setup
This setup page includes all the items of Power Management features.
PNP/PCI Configuration setup
This item specifies the value (in units of PCI bus blocks) of the latency timer for the PCI
bus master and the IRQ level for PCI device. Power-on with BIOS defaults
Load BIOS Defaults
BIOS defaults loads the values required by the system for the maximum performance.
However, you may change the parameter through each Setup Menu.
Load Setup Defaults
Setup defaults loads the values required by the system for the O.K. performance.
However, you may change the parameter through each Setup Menu.
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Integrated Peripherals
This setup page includes all the items of peripheral features.
IDE HDD auto detection
Automatically configure IDE hard disk drive parameters.
Supervisor Password
Change, set, or disable supervisor password. It allows you to limit access to the system
and Setup, or just to Setup.
User Password
Change, set, or disable user password. It allows you to limit access to the system and
Setup, or just to Setup.
Save & Exit setup
Save CMOS value change to CMOS and exit setup
Exit without saving
Abandon all CMOS value changes and exit setup.
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Standard CMOS Setup
Date
The date format is <day>, <month> <date> <year>. Press <F3> to show the calendar.
Time
The time format is <hour> <minute> <second>. The time is calculated base on the 24hour military-time clock. For example. 5 p.m. is 17:00:00.
Drive C type/Drive D type
The categories identify the types of 2 channels that have been installed in the computer.
There are 45 predefined types and 4 user definable types are for Enhanced IDE BIOS.
Type 1 to Type 45 are predefined. Type user is user-definable.
Press PgUp or PgDn to select a numbered hard disk type or type the number and press
<Enter>. Note that the specifications of your drive must match with the drive table. The
hard disk will not work properly if you enter improper information for this category. If
your hard disk drive type is not matched or listed, you can use Type “User” to define your
own drive type manually.
If you select Type “User”, you will need to know the information listed below. Enter the
information directly from the keyboard and press <Enter>. This information should be
included in the documentation from your hard disk vendor or the system manufacturer.
If the controller of HDD interface is ESDI, the selection shall be “Type 1”.
If the controller of HDD interface is SCSI, the selection shall be “None”.
If you select Type ”Auto”, BIOS will Auto-Detect the HDD & CD-ROM Drive at the
POST stage and showing the IDE for HDD & CD-ROM Drive.
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Drive A type/Drive B type
This item specifies the types of floppy disk drive A or drive B that has been installed in the
system.
Video
This item selects the type of adapter used for the primary system monitor that must
matches your video display card and monitor. Although secondary monitors are
supported, you do not have to select the type in Setup.
Error halt
This item determines if the system will stop, when an error is detected during power up.
Memory
This item is display-only. It is automatically detected by POST (Power On Self Test) of
the BIOS.
Base Memory
The POST of the BIOS will determine the amount of base (or conventional) memory
installed in the system. The value of the base memory is typically 512K for systems
with 512K memory installed on the mainboard, or 640K for systems with 640K or
more memory installed on the mainboard.
Extended Memory
The BIOS determines how much extended memory is present during the POST. This is
the amount of memory located above 1MB in the CPU's memory address map.
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BIOS Features Setup
CPU Internal Cache
This item enables CPU internal cache to speed up memory access.
External Cache
This item enables the external cache to speed up memory access.
Quick Power On Self Test
This item speeds up Power On Self Test (POST) after you power on the computer. If it is
set to Enabled, BIOS will shorten or skip some check items during POST.
Boot Sequence
This item determines which drive computer searches first for the disk operating system.
The system supports feature of boot from IDE D:, E:, or F: drive (if there are present),
boot from CD-ROM, and boot from SCSI drive. Default value is A, C, SCSI.
Swap Floppy Drive
When this item enables, the BIOS will swap floppy drive assignments so that Drive A:
will function as Drive B: and Drive B: as Drive A:.
Boot Up Floppy Seek
During POST, BIOS will determine if the floppy disk drive installed is 40 or 80 tracks.
Boot Up NumLock Status
When this option enables, BIOS turns on Num Lock when system is powered on so the
end user can use the arrow keys on both the numeric keypad and the keyboard.
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Boot Up System Speed
This option sets the speed of the CPU at system boot time. The settings are High or Low.
Gate A20 Option
When this item sets to Normal, the A20 signal is controlled by keyboard controller. When
this item sets to Fast, the A20 signal is controlled by post 92 or chipset specific method.
Security Option
This item allows you to limit access to the system and Setup, or just to Setup.
When System is selected, the system will not boot and access to Setup will be denied if the
correct password is not entered at the prompt.
When Setup is selected, the system will boot, but access to Setup will be denied if the
correct password is not entered at the prompt.
PCI VGA Palette Snoop
This item must be set to enabled if there is a MPEG ISA card installed in the system, and
disabled if there is no MPEG ISA card installed in the system.
OS Select For DRAM > 64MB
This item allows you to access the memory that over 64 MB in OS/2.
Video BIOS Shadow/XXXXX-XXXXX Shadow
These items determine whether Video BIOS or optional ROM will be copied to RAM.
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Chipset Features Setup
The Chipset Features Setup option is used to control the configuration of chipset
registers value. The registers may affect the system stability, please do not change
these settings if you are not familiar with the chipset.
Auto Configuration
This item auto configure the following items: DRAM RAS# Precharge time, MA
Additional Wait State, RAS# to CAS# Delay, DRAM Read Burst, DRAM Write Burst,
and ISA Bus Clock by different system clock.
DRAM Speed Selection
This item set the DRAM Read/Write timings that the system uses. When item of "Auto
Configuration" is disabled, this item will not show up.
DRAM RAS# Precharge Time
DRAM must continually be refreshed or it will lose its data. Normally, DRAM is
refreshed entirely as the result of a single request. This option allows you to determine the
number of CPU clocks allocated for Row Address Strobe to accumulate its charge before
the DRAM is refreshed. If insufficient time is allowed, refresh may be incomplete and
data lost.
This item sets the DRAM RAS Precharge Timing. The options are 4 and 3 CLKs.
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MA Additional Wait State
When enabled, one additional wait state is inserted before the assertion of the first memory
address line MA and CAS/RAS assertion during DRAM read or write leadoff cycles.
RAS To CAS# Delay
When DRAM is refreshed, both rows and columns are address separately. This setup item
allows you to determine the timing of the transition from Row Address Strobe (RAS) to
Column Address Strobe (CAS). The options are enabled for 3 and disabled for 2 CLKs.
DRAM Read Burst (B/E/F)
This item set the BEDO/EDO/FPM DRAM Read Burst Timing. The timing used
depends on the type of DRAM (EDO burst mode or standard fast page mode) on a perbank basis. The options are x1/2/3, x2/2/3, x2/3/4 and x3/4/4.
DRAM Write Burst (B/E/F)
This item set the BEDO/EDO/FPM DRAM Write Burst timing for accessing DRAM.
The options are x2/2/3, x3/3/3, x3/3/4, x4/4/4 .
ISA Clock
This item allows the user to set ISA clock that divide from PCI clock by 3 or by 4. For
example, if 200MHz Pentium Pro processor is used, PCI clock will be 33MHz, ISA Clock
will be 8.25MHz when PCI clock divided by 4, and 11MHz when PCI clock divided by 3.
DRAM Refresh Queue
When enabled, the chipset's internal 4-deep refresh queue is enabled with 4th request
being the priority request. All refresh requests are queued. If disabled, the refresh queue
is disabled and all refreshes are priority requests.
DRAM RAS Only Refresh
This item allows the user to the RAS only refresh or CAS before RAS refresh.
DRAM ECC/PARITY Select
When using parity DRAM modules, you can select from the options of ECC (Error
Checking and Correcting) or Parity to correct 1 bit memory errors that may occur in the
memory. When using no parity DRAM modules, this function is not available.
Fast DRAM Refresh
When disabled will execute the normal mode where the refresh rate is every 15ns, when
enabled, the fast refresh mode implements a refresh cycle every 32 host cycle.
Read-Around-Write
When enabled will increase the execution efficiency of the processor. It allows the
processor to execute read commands out of order if there is independence between these
read and other write commands.
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PCI Burst Write Combining
When enabled will increase the efficiency of PCI bus by combining serval CPU to PCI
write cycles into one.
PCI-To-DRAM Pipeline
When enabled will increase the bandwidth of the path between the PCI and the DRAM to
enhance the PCI bus efficiency and DRAM accessing
CPU-To-PCI Write Post
When enabled will increase the efficiency of the PCI bus and speed up the execution in the
processor.
CPU-To-PCI IDE Posting
When disabled, the CPU to PCI IDE posting cycles are treated as normal I/O write
transactions. When enabled will have the I/O write cycles posted.
System BIOS Cacheable
This item allows the user to set whether the system BIOS F000~FFFF areas are cacheable
or non-cacheable.
Video RAM Cacheable
This item allows the user to set whether the video BIOS C000~C7FF areas are cacheable
or non-cacheable.
8 Bit I/O Recovery Time
The recovery time is the length of time, measured in CPU clocks, which the system will
delay after the completion of an input/output request. This delay takes place because the
CPU is operating so much after than the input/output bus that the CPU must be delayed to
allow for the completion of the I/O.
This item allows you to determine the recovery time allowed for 8 bit I/O. Choices are
from NA, 1 to 8 CPU clocks.
16-Bit I/O Recovery Time
This item allows you to determine the recovery time allowed for 16 bit I/O. Choices are
from NA, 1 to 4 CPU clocks.
Memory Hole At 15M-16M
In order to improve performance, certain space in memory can be reserved for ISA cards.
This memory must be mapped into the memory space below 16 MB.
DRAM Fast Leadoff
When enabled, system will reduce the number of CPU clocks allowed before reads and
writes to DRAM are performed.
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Passive Release
When enabled, the chipset provides a programmable passive release mechanism to meet
the required ISA master latencies.
Delayed Transaction
Since the 2.1 revision of the PCI specification requires much tighter controls on target and
master latency. PCI cycles to or from ISA typically take longer. When enabled, the chipset
provides a programmable delayed completion mechanism to meet the required target
latencies.
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Power Management Setup
Power Management
This item determines the options of the power management function. Default value is
Disable. The following pages tell you the options of each item & describe the meanings of
each options.
DisabledGlobal Power Management will be disabled.
User Define Users can configure their own power management.
Min Saving Predefined timer values are used such that all timers are in their
Max Saving Predefined timer values are used such that all timers minimum
maximum value.
value.
PM Control by APM
If this item set to No, system BIOS will ignore and APM calls when the power is managed
the system.If this item setup to Yes,
system BIOS will wait for APM's prompt before it enter any PM mode e.g. DOZE,STANDBY or SUSPEND.
Video Off Method
Blank ScreenThe system BIOS will only blanks off the screen when disabling
V/H SYNIn addition to Blank Screen, BIOS will also turn
+Blankoff the V-SYNC & H-SYNC signals from VGA cards to
DPMSThis function is enabled for only the VGA card supporting
video.
monitor.
DPM.
User's Manual 24
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Doze Mode
1 Min~1 Hr Defines the continuous idle time before the system enters
DOZE mode.
DisableSystem will never enter DOZE mode.
Standby Mode
1 Min~1 Hr Defines the continues idle time before the system enters
STANDBY mode.
DisableSystem will never enter STANDBY mode.
Suspend Mode
1 Min~1 Hr Defines the continuous idle time before the system enters
SUSPEND mode.
DisableSystem will never enter SUSPEND mode.
HDD Power Down
1~15MinDefines the continuous HDD idle time before the HDD enters
power saving mode (motor off).
SuspendBIOS will turn the HDD's motor off when system is in
SUSPEND mode.
DisableHDD's motor will not be turn off.
IRQ3, 4, 8, 12 **Wake-Up Events In Doze & Standby**
If these items set to Off, the IRQ3, 4, 8 or 12 event's activity will not reactivates the
system from Doze and Standby mode.
If these items set to On, the IRQ3, 4, 8 or 12 event's activity will reactivate system from
Doze and Standby mode.
*Power Down & Resume Events **
If this items sets to Off, the event's activity will not be monitored to entering power
management.
If this items sets to On, the event's activity will be monitored to entering power
management.
The Award Plug and Play BIOS has the capability to automatically configure all of the
boot and Plug and Play compatible devices. However, this capability means absolutely
nothing unless you are using a Plug and Play operating system as Windows 95.
Reset Configuration Data
This item allows you to determine reset the configuration data or not.
IRQ 3/4/5/7/9/10/11/12/14/15, assigned to
These items allow you to determine the IRQ assigned to the ISA bus and is not available
to any PCI slot.
Choices are Legacy ISA and PCI/ISA PnP.
DMA 0/1/3/5/6/7 assigned to
These items allow you to determine the DMA assigned to the ISA bus and is not available
to any PCI slot.
Choices are Legacy ISA and PCI/ISA PnP.
PCI IRQ Activated by
This items sets the method by which the PCI bus recognize that an IRQ service is being
requested by a device. Under all circumstances, you should not change the default
configuration unless advised otherwise by your system's manufacturer. Choices are
Level(default) and Edge.
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PCI IDE IRQ Map to
This items allows you to configure your system to the type of IDE disk controller in use.
By default, Setup assumes that your controller is an ISA device rather than a PCI
controller.
If you have equipped your system with a PCI controller, changing this allows you to
specify which slot has the controller and which PCI interrupt (A, B, C or D) is associated
with the connected hard drives.
Remember that this setting refers to the hard disk drive itself, rather than individual
partitions. Since each IDE controller supports two separate hard disk drivers, you can
select the INT# for each. Again, you will note that the primary has a lower interrupt than
the secondary as described in "Slot x Using INT# " above.
Selecting "PCI Auto" allows the system to automatically determine how your IDE disk
system is configured.
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Integrated Peripherals
IDE HDD Block Mode
This item is used to set IDE HDD Block Mode. If your IDE Hard Disk supports block
mode, then you can enable this function to speed up the HDD access time. If not, please
disable this function to avoid HDD access error.
IDE Primary/Secondary Master PIO
In these items, there are five modes defined in manual mode and one automatic mode.
There are 0, 1, 2, 3, 4, and AUTO. The default settings for on board Primary/Secondary
Master PIO timing is Auto.
IDE Primary/Secondary Slave PIO
In these items, there are five modes defined in manual mode and one automatic mode.
There are 0, 1, 2, 3, 4, and AUTO. The default settings for on board Primary/Secondary
Slave PIO timing is Auto.
On-Chip Primary PCI IDE
This item is used to defined on chip Primary PCI IDE controller is "Enable" or "Disable"
setting.
On-Chip Secondary PCI IDE
This item is used to defined on chip Secondary PCI IDE controller is "Enable" or
"Disable" setting.
PCI Slot IDE 2nd channel
This item is used to defined add-on PCI IDE secondary controller is "Enable" or
"Disable" setting.
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Onboard FDC Controller
This item specifies onboard floppy disk drive controller. This setting allows you to
connect your floppy disk drives to the onboard floppy connector. Choose the "Disabled"
settings if you have a separate control card.
Onboard Serial Port 1/Port 2
This item is used to define onboard serial port 1/Port2 to COM1/3F8H , COM2/2F8H,
COM3/3E8H, COM4/2E8H, Auto or Disabled.
UR2 Mode
The system board support IrDA 1.0 and Amplitudes Shift Keyed ASKIR infrared through
COM 2 port. This item specifies onboard Infra Red mode to IrDA 1.0, ASKIR, Standard ,MIR 1.15M, MIR 0.57M, or FIR . MIR 1.15, MIR 0.57, and FIR are reserved for future
use.
Onboard Parallel Port
This item specifies onboard parallel port address to 378H, 278H, 3BCH or Disabled.
Parallel Port Mode
This item specifies onboard parallel port mode. The options are SPP (Standard Parallel
Port), EPP(Enhanced Parallel Port), ECP (Extended Capabilities Port), and EPP+ECP.
USB Controller
This item to set the onboard USB controller enabled or diabled.
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Password Setting
This section describes the two access modes that can be set using the options found on
the Supervisor Password and User Password.
Supervisor Password and User Password
The options on the Password screen menu make it possible to restrict access to the Setup
program by enabling you to set passwords for two different access modes: Supervisor
mode and User mode.
In general, Supervisor mode has full access to the Setup options, whereas User mode has
restricted access to the options. Thus by setting separate Supervisor and User password,
a system supervisor can limit who can change critical Setup values.
Enter Password
Type the password, up to eight characters, and press <Enter>. The password typed now
will clear any previously entered password from CMOS memory. You will be asked to
confirm the password. Type the password again and press <Enter>. You may also press
<Esc> to abort the selection and not enter a password.
To disable password, just press <Enter> when you are prompted to enter password. A
message will confirm the password being disabled. Once the password is disabled, the
system will boot and you can enter Setup freely.
User's Manual 30
Page 31
Password Disable
If you select System at Security Option of BIOS Features Setup Menu, you will be
prompted for the password every time the system is rebooted or any time you try to
enter Setup. If you select Setup at Security Option of BIOS Features Setup Menu, you
will be prompted only when you try to enter Setup.
Warning : Retain a safe record of your password. If you've forgotten or loosed the
password, the only way to access the system is to clear CMOS memory, please refer to
"Clear CMOS" or "Clear Password" section.
User's Manual 31
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