Shuttle HOT-591P User Manual

45

HOT-591P
Pentium™ processor
Based AGP MAIN BOARD

User's Manual

1

NOTICE

Copyright 1998.
All Right Reserved
Manual Ver 1.0
All information, documentation, and specifications contained in this manual are subject to change without prior

notification by the manufacturer.
The author assumes no responsibility for any errors or omissions which may appear in this document nor does it make a

commitment to update the information contained herein.

TRADEMARKS

All the brands and product names referred to in this manual are trademarks or registered trademarks of their respective
holders.

FCC Notice:

This equipment has been tested and found to comply with the limits for a Class B digital device, pursuant to Part 15 of FCC
Rules. These limits are designed to provide reasonable protection against harmful interference in a residential installation.
This equipment generates, uses and can radiate radio frequency energy. If not installed and used properly, in strict accordance
with the manufacturer's instructions, may cause harmful interference to radio communications. However, there is no guarantee
that interference will not occur in a particular installation. If this equipment does cause interference to radio or television
reception, which can be determined by turning the equipment off and on, the user is encouraged to try to correct the interfer­ence by one or more of the following measures :

Reorient or relocate the receiving antenna.
Increase the separation between the equipment and receiver.
Connect the equipment into an outlet on a circuit different from that to which the receiver is connected.
Consult the dealer or an experienced radio/television technician for help and for additional suggestions.
The user may find the following booklet prepared by the Federal Communications Commission helpful "How to Identify and

Resolve Radio-TV Interference Problems." This booklet is available from the U.S. Government Printing Office. Washington,
DC 20402, Stock 004-000-00345-4

FCC Warning

The user is cautioned that changes or modifications not expressly approved by the manufacturer could void the users authority
to operate this equipment.

Note : In order for an installation of this product to maintain compliance with the limits for a Class B device, shielded cables
and power cord must be used.

CE Notice:

Following standards were applied to this product, in order to achieve compliance with the electromagnetic compatibility :

- Immunity in accordance with EN 50082-1: 1992

- Emissions in accordance with EN 55022: 1987 Class B.

2

TABLE OF CONTENTS

T

T

PREFACE ........................................................................................................................3

CHAPTER 1 FEATURES......................................................................................................4

Accessories of HOT-591P ........................................................................................................................6

CHAPTER 2 HARDWARE CONFIGURATION.............................................................................7

Jumper Setting........................................................................................................................................... 7

CPU Configurations Table........................................................................................................................ 8

CPU Configurations - JP1, JA26, JA27 & J19 ........................................................................................9

System Clock and CPU Multiplier Manual Setting - JP1, JA26 & JA27 .............................................14

SDRAM Frequency Setting - JP9, JA25 ................................................................................................ 15

CPU Voltage Manual Setting - J19 ........................................................................................................ 16

Power Supply Type - JP8........................................................................................................................17

Flash EEPROM Vpp - JP5.....................................................................................................................17

Clear CMOS - JP2................................................................................................................................... 17

Connectors............................................................................................................................................... 18

CHAPTER 3 MEMORY CONFIGURATION ..............................................................................21

CHAPTER 4 FLASH UTILITY .............................................................................................23

CHAPTER 5 VIA VXD AGP D RIVER INSTALLATION............................................................25

CHAPTER 6 BIOS S ETUP ...............................................................................................26

Main Menu .............................................................................................................................................. 27

Standard CMOS Setup............................................................................................................................ 29

BIOS Features Setup............................................................................................................................... 31

Chipset Features Setup............................................................................................................................ 33

Power Management Setup ...................................................................................................................... 35

PCI Configuration Setup......................................................................................................................... 38

Integrated Peripherals ............................................................................................................................. 41

Password Setting ..................................................................................................................................... 43

3

P

P

HOT-591P is a high performace, cost effective, and energy efficient mainboard for the
implementation of AGP, PCI, and ISA in desktop personal computer systems from 60MHz
to 100MHz based on 64-bit Socket-7 super-scalar processors.

HOT-591P mainboard is a highly integrated IBM PC/AT compatible AT form-factor system
board designed to meet the industry's most demanding desktop applications. Based on the
VIA's MVP3 chipset.

HOT-591P accept AMD K6-3D, K6, K5, Intel Pentium P54C, Pentium MMX, IDT-C6 and
Cyrix/IBM 6x86, 6x86L, 6x86MX processors and also features high-performance pipelined
burst secondary cache memory support with size of 512KB. The memory subsystem is
designed supports standard Fast Page Mode (FPM), EDO, SDRAM, and 100MHz SDRAM.

HOT-591P complies with the Accelerated Graphics Port Specification 1.0 and features
support for 60/75/83/100MHz CPU bus frequencies and the 66MHz AGP bus frequency.

HOT-591P provides a new level of I/O integration. VIA MVP3 chipset provides increased
integration and improved performance over other chipset designs.

The VIA's MVP3 chipset provides an integrated Bus Mastering IDE controller with two high
performance Ultra 33 DMA IDE interfaces for up to four IDE devices.

The onboard I/O controller provides the standard PC I/O functions: floppy interface, two
FIFO serial ports, an IrDA device port and a SPP/EPP/ECP capable parallel port.

Up to three PCI local bus slots provide a high bandwidth data path for data-movement
intensive functions such as graphics, and up to three ISA slots complete the I/O function.

HOT-591P provides the foundation for cost effective, high performance, highly expandable
platforms, which deliver the latest in Pentium processor and I/O standard.

HOT-591P Mainboard is carefully designed for the demanding PC user who wants high
performance and many intelligent features in a compact package:

PREFACE

4

FEATURES

1

1

Chipset

Features VIA's 82C598AT MVP3 Chipset with I/O subsystems

Main Processor

AMD-K6 3D, AMD-K6 166~300 MHz, K5 PR90~PR166,
Intel Pentium (P54C) 90~200 MHz, Pentium MMX (P55C) 166~233 MHz,
Cyrix/IBM 6x86 P150+~P200+, 6x86L P200+, 6x86MX PR166~PR233,
IDT-C6 150~200MHz

Secondary Cache

Onboard 512KB Pipelined Burst Cache

Versatile Memory Supports

Equipped with two SIMM and two DIMM sockets for (8, 16, 32, 64 or 128MB) 72-pin
EDO or FPM and 168-pin 66MHz or 100MHz PC SDRAM memory modules
up to 256 MB

Expansion Slots

One AGP slot
Three PCI slot
Three ISA slot

AGP (Accelerated Graphics Port)

AGP Specification 1.0
HOT-591P main board equipped with an AGP slot for an AGP VGA card that supports
133MHz 2X mode for texture mapping z-buffering and alpha blending. AGP allows 3D
applications to run faster and smoothly.

Onboard I/O Chip

One Floppy port
One PS/2 mouse and Keyboard connector
Two high-speed UART compatible serial port
Serial Port 2 can also be directed from COM2 to the Infrared Module for wireless connec­tions One parallel port with ECP and EPP capabilities

Onboard PCI Bus Master IDE Controller

Two Ultra DMA/33 Bus Master IDE Ports supports four IDE devices up to 33 MB/sec
IDE transfers and supports Enhanced PIO Modes 3 and 4 and Bus Master IDE DMA
Mode 2 devices

Onboard 12-pin AT and 20-pin ATX Power Supply

ATX power supports soft-on/off function

5

System BIOS

Licensed BIOS with additional feature:
* Flash EEPROM (128KB) for BIOS update
* ISA Plug & Play extension
* Power management
* Support DMI (Desktop Management Interface) function

ACPI:

Support ACPI (Advanced Configuration and Power Interface) function. ACPI provide
more Energy Saving Features for the future operating system supporting OS Direct
Power Management (OSPM) functionality.

Board Size:

AT form factor size 220mm x 220mm.

6

ACCESSORIES OF HOT-591P

Figure 1 : Accessories of HOT-591P

7

Hardware Configuration

2

2

This chapter is designed for explaining how to configure the HOT-591P's hardware. After you install the
main board, you can set jumpers, install memory on the main board, and make case connectors. Refer to
this chapter whenever you upgrades or reconfigure your system.

Jumper Setting

This section describe the necessary proce­dures and proper jumper settings to
configure the HOT-591P main board.

Jumper pin headers show on right side are
used to configure system clock, CPU
multiplier voltages and SDRAM clock
speed.

System Clock ­Pin Header 1~6 of Jumper JP1,
and JA26, JA27

Pin header 1~6 of JP1, JA26 and JA27 are
used to adjust System Clock from 60MHz
to 100 MHz.

CPU Multiplier ­Pin Header 7~12 of Jumper JP1

Pin header 7~12 of JP1 are used to adjust
CPU core multiplier from 1.5X to 5.5X.

Figure 2-1 : J19, JP1, JA25~JA27 & JP9 location

SDRAM Clock Speed ­Jumper JA25 and JP9

HOT-591P support 100MHz external clock speed AMD 266MHz and 300MHz K6-3D, and
which allows the user to use 66MHz normal SDRAM DIMM or 100MHz PC/100 SDRAM
DIMM. Jumpers JA25 and JP9 are used to set SDRAM DIMM clock speed synchronous with
System Clock (CPU External Clock) or synchronous with AGP Clock.

CPU Voltages Auto/Manual
Jumper- J19

HOT-591P automatically detects and adjusts the voltage to the processor.
Jumper block J19 is used to set Automatically or Manually adjust onboard voltages output
from switching type regulators to CPU by inserting or removing mini jumper from pin
headers. (please refer to page 16)

8

Proces sor Speed

System

Cloc k

Multiplie r Processor Spee d

System

Cloc k

Multiplie r Processor Speed

System

Clock

Multi plie r

Intel

Pentium

P55C MMX

233 MHz 66 MHz 3.5 x

AMD-K6

300 MHz 66 MHz 4.5 x

Cyrix/IBM

6x86MX

PR266 66 MHz 3.5 x
200 MHz 66 MHz 3 x 266 MHz 66 MHz 4 x PR266 75 MHz 3 x
166 MHz 66 MHz 2.5 x 233 MHz 66 MHz 3.5 x PR233 75 MHz 2.5 x

Intel

Pentium

P54C

200 MHz 66 MHz 3 x 200 MHz 66 MHz 3 x PR233 66 MHz 3 x
166 MHz 66 MHz 2.5 x 166 MHz 66 MHz 2.5 x PR200 75 MHz 2 x
150 MHz 60 MHz 2.5 x

AMD-K5

PR166 66 MHz 2.5 x PR200 66 MHz 2.5 x
133 MHz 66 MHz 2 x PR133 66 MHz 1.5 x PR166 60 MHz 2.5 x
120 MHz 60 MHz 2 x PR120 60 MHz 1.5 x

Cyrix/IBM

6x86L

P200+ 75 MHz 2 x

100 MHz 66 MHz 1.5 x PR100 66 MHz 1.5 x P166+ 66 MHz 2 x

90 MHz 60 MHz 1.5 x PR90 60 MHz 1.5 x P150+ 60 MHz 2 x

IDT-C6

200MHz 66 MHz 3 x

AMD-K6 3D

300MHz 100 MHz 3 x

Cyrix/IBM

6x86

P200+ 75 MHz 2 x
180MHz 60 MHz 3 x 266MHz 100 MHz 2.5 x P166+ 66 MHz 2 x
150MHz 60 MHz 2.5 x 250MHz 100 MHz 2.5 x P150+ 60 MHz 2 x

Those hardware settings are made through the use of jumper caps to connect jumper pins on the
main board.

The following examples show the conventions used in this chapter.

Insert a jumper pack on JP19
Row B-C to set CPU voltage
auto-detecting

Remove jumper pack from JP19
and insert mini on pin 1, 3, 4 on
Row A-B to set voltage on 3.3V

Insert mini jumpers on pin 1-2, 3-4
of JP1

Insert mini jumpers on pin 1-2, 7-8
and 9-10 of JP1

CPU Configuration Table

9

CPU Configuration - JP1, JA26, JA27 & J19

JP1, JA26, JA27 and J19 are the Jumpers that you need to set your CPU on HOT-591P. Make sure that
you know the type of CPU that you are installing and refer to the proper settings which are listed below.
Normally, CPU voltage is auto-detected on HOT-591P and is set to Auto-detected when HOT-591P is
delivered. If you have a higher frequency CPU or you want to set CPU frequency and voltage manually,
please refer to next two sections.

Intel Pentium (P54C) Series Settings

Processor Spee d

Frequency S etting

JP1, JA26, JA2 7

Jumper Bloc k J19

Vcore/Vio

Auto-detect

Intel Pentium

(P54C)

200 MHz

66MHzx3

3.3V/3.3V

166 MHz

66MHzx2.5

150 MHz

60MHzx2.5

133 MHz

66MHzx2

120 MHz

60MHzx2

100 MHz

66MHzx1.5

90 MHz

60MHzx1.5

Table 2-1

10

Intel Pentium MMX (P55C) Series CPUs Settings

Processor Speed

Frequency Setting

JP1, JA26, JA27

Jumper Bloc k J19

Vcore/Vio

Auto-detect

Intel Pentium

MMX(P 55C)

233 MHz

66MHzx3.5

2.8V/3.3V

200 MHz

66MHzx3

166 MHz

66MHzx2.5

Table 2-2

AMD-K5 Series CPUs Settings

Processor Speed

Frequency Setting

JP1, JA26, JA27

Jumper Bloc k J19

Vcore/Vio

Auto-detect

AMD-K5

PR166

66MHzx2.5

3.52V/3.52V

PR133

66MHzx1.5

PR120

60MHzx1.5

PR100

66MHzx1.5

PR90

60MHzx1.5

Table 2-3

11

AMD-K6 Series CPUs Settings

Processor Spee d

Frequency S etting

JP1, JA26, JP27

Jumper Block J19

Vcore/Vio

Auto-detect

AMD-K6

300 MHz

66MHzx4.5

2.2V/3.3V

266 MHz
66MHzx4

233 MHz

66MHzx3.5

233 MHz

66MHzx3.5

3.2V/3.3V

200 MHz
66MHzx3

2.9V/3.3V

166 MHz

66MHzx2.5

AMD K6-3D

300 MHz

100MHzx3

2.2V/3.3V

266 MHz

100MHzx2 .5

Table 2-4

Note :The voltage of AMD-K6 233MHz may vary from market and CPU core. Please ask your
CPU provider for detail.

12

Cyrix/IBM 6x86/6x86L/6x86MX Series CPUs Settings

Table 2-5

Processor Speed

Fre quency Setting

JP1 , JA26 , JA27

Jumper Block J19

Vcore/Vio

Auto-detect

Cyrix/IBM

6x86L

P200+

75MHzx2

2.8V/3.3V

P166+

66MHzx2

P150+

60MHzx2

Cyrix/IBM

6x86

P200+

75MHzx2

3.52V/3.52V

P166+

66MHzx2

P150+

60MHzx2

Cyrix/IBM

6x86MX

PR266

75MHz x 3

2.9V/3.3V

PR266

66MHzx3.5

PR233

75MHzx2.5

PR233

66MHzx3

PR200

75MHzx2

PR200

66MHzx2.5

13

IDT-C6 Series CPUs Settings

Table 2-6

Processor Speed

Frequency Setting

JP1, JA26, JA27

Jumper Bloc k J19

Vcore/Vio

Auto-detect

IDT-C6

200 MHz

66MHzx3

3.52V/3.52V

180 MHz

60MHzx3

150 MHz

60MHzx2.5