LH53517
CMOS 512K (64K × 8) MROM
FEATURES
•• 65,536 words × 8 bi t organi zation
•• Access time: 150 ns (MAX.)
•• Low-pow er consumption :
Operating : 16 5 mW (MAX.)
Standb y: 550 µW (MAX.)
•• Static operation
•• TTL compatible I/O
•• Three-state outputs
•• Singl e +5 V p owe r su ppl y
•• Mask-pro grammable OE /
OE
•• Packages:
28-pi n , 600 -mil DIP
28-pi n , 450 -mil S OP
28-pi n , 8 × 13.4 mm
2
TSOP (Type I)
DESCRIPTION
The LH53517 is a mask-programmable ROM organized as 65,536 × 8 bits. It is f abricated using silicon-gate
CMOS process technology.
PIN CONNECTIONS
53517-1
TOP VIEW
1
2
3
4
7
8A
2
A
5
26
25
24
23
22
21
18
15
A
7
A
6
5
6
A
3
A
4
20
19
A
15
A
12
GND
A
13
A
8
A
11
A
10
CE
D
7
D
6
D
3
9
10
11
28
27 A
14
A
1
V
CC
12 17 D
5
16 D
4
D
1
D
2
A
0
D
0
A
9
OE/OE
28-PIN DIP
28-PIN SOP
13
14
Figure 1. Pin Connections for DI P and
SOP Packages
2
3
4
5
6
9
10
7
8
A
11
11
1
28
27
26
25
22
21
24
23
20
19
A
10
28-PIN TSOP (Type I)
12
13
14
17
16
18
15
OE/OE
A
8
A
9
A
12
D
2
D
1
A
1
D
7
CE
D
5
D
6
GND
D
4
D
3
D
0
A
0
53517-2
V
CC
A
7
A
6
A
5
A
4
A
3
A
2
TOP VIEW
A
15
A
14
A
13
NOTE: Reverse bend available on request.
Figure 2. Pin Connect ions for TSOP Package
1
NOTE:
1. Active level of OE/OE is mask-programm able.
TRUTH TABLE
CE OE/OE DATA OUTPUT CURRENT CONSUMPTION
HX
High-Z
Standby
L
L/H
Operating
H/L Output
NOTE:
X = H or L
ABSOLUTE MAXIMUM RATINGS
53517-3
A
2
A
11
A
10
A
9
A
8
A
7
28
23
21
24
25
5
8
A
6
A
5
V
CC
A
3
MEMORY
MATRIX
(65,536 x 8)
SENSE AMPLIFIER
14
4
GND
7
3
A
4
6
A
12
2
OE/OE
ADDRESS BUFFER
CE
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
OE
BUFFER
A
13
26
A
14
27
TIMING
GENERATOR
A
15
1
DATA
OUTPUT BUFFER
A
1
A
0
9
10
22
20
1617
18
11
19
D
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
15
12
13
NOTE: Pin numbers apply to the 28-pin DIP or SOP.
Figure 3. LH53517 Block Diagr am
PIN DESCRIPTION
SIGNAL PIN NAME NOTE
A0 – A
15
Addre ss inp ut
D0 – D
7
Data out put
CE Chip ena ble in put
SIGNAL PIN NAME NOTE
OE/OE Outp ut e nab le inp ut 1
V
CC
Power s upp ly (+5 V )
GND Groun d
LH53517 CMOS 512K MROM
2