Sharp LH534B00T Datasheet
LH534B00
CMOS 4M (512K × 8) MROM
FEATURES
•• 524,288 w ords × 8 b it organ izatio n
•• Access time: 120 ns (MAX.)
•• Power consu mption :
Operating : 33 0 mW (MAX.)
Standby: 550 µW (MAX.)
•• Static operation
•• TTL compatib le I/O
•• Three-state outputs
•• Singl e +5 V po we r su ppl y
•• Packa ge:
40-pi n , 1 0 × 20 mm
2
TSOP (Type I)
DESCRIPTION
The LH534B00 is a 4M-bit mask-programmable ROM
organized as 524,288 × 8 bits. It is fabricate d using
silicon-gate CMOS process technology.
PIN CONNECTIONS
534B00-1
TOP VIEW
2
3
4
5
8
9
A
8
A
12
37
36
35
34
33
32
29
26
A
14
A
13
6
7
A
9
A
11
31
30
NC
A
10
D
6
D
4
NC
D
1
10
11
12
39
38
NC
NC
13
28
D
3
27
D
2
NC
NC
D
7
40-PIN TSOP (Type I)
14
15
16
17
18
19
20
23
25
24
22
21
OE
GND
CE
A
0
A
3
A
2
A
4
NC
A
6
A
5
A
7
A
1
GND
D
5
V
CC
D
0
40
1
A
15
A
16
A
17
V
CC
A
18
Figure 1. Pin Connections for TSOP P ackage
1
534B00-2
A
3
A
2
A
1
A
12
A
11
A
10
A
9
A
8
30
5
6
36
7
15
18
19
20
A
7
A
6
V
CC
A
4
32
33
34
25
35
D
0
MEMORY
MATRIX
(524,288 x 8)
SENSE AMPLIFIER
OUTPUT BUFFER
39
14
GND D
1D2D3D4D5D6D7
28
26
27
17
8
A
5
16
A
13
4
ADDRESS BUFFER
CE
A
0
21
ADDRESS DECODER
COLUMN SELECTOR
CE
BUFFER
OE
BUFFER
A
14
3
A
15
2
22
TIMING
GENERATOR
A
16
1
24
OE
A
17
40
A
18
13
31
23
Figure 2 . LH534 B00 Block Diagram
PIN DESCRIPTION
SIGNAL PI N N AM E
A0 – A
18
Addres s i npu t
D
0
– D
7
Data o utp ut
CE Chip e nab le inp ut
OE Output en abl e i npu t
SIGNAL PIN NAME
V
CC
Power sup ply (+5 V)
GND Ground
NC No con nec tio n
LH534B0 0 CMOS 4M MROM
2
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