Sharp LC32D44, LC32R24B Schematic

MODELS:

LC-26D44
LC-32D44

Training Course

Presentation By:
Jan Niemi

SEES Engineering Department

Issued: Sofía García
SEES Engineering Department

Training course: D44

1

May 2008

1. Models introduction

2. Block Diagram

3. Software Updating

4. Service Mode

Index

5. LCD Adjust Process

6. Electrical Diagrams / PWB

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Sizes:

26” & 32”

Type of cabinet:

- Bottom speakers.

- BK : Black Color.

- GY: Grey Color.

Models:

1. Models Introduction

LC-26/32D44EE-BK/GY → Continental
LC-26/32D44ES-BK/GY → Sweden Market
LC-26/32D44EK-BK/GY → United Kingdom
LC-26/32D44RU-BK/GY → Russian Market

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LC-26D44 & LC-32D44 Models

• ASV & Black TFT LCD.

• HD Ready Panel (1366 x 768)

WXGA with 4ms response.

• Wide vision angle (H/V 176º).

• High brightness and contrast (1.500:1).

• Interlaced and progressive mode compatible (I/P).

• Built-in DVB-T Tuner.

• Multistandard Video and audio:

- Multistandard Video & audio .

- Video: PAL/SECAM & NTSC (AV only).

- TV: B/G, I, D/K, L & L’.

- Sound: NICAM & A2 (IGR).

• OSD multilanguage.

•

2 HDMI 1.2 inputs (Video Digital, Audio Digital

& Analog).

•

Analog mode PC input.

• Components Input ( 3RCA to 15pin D-sub adapter).

• RGB at EXT1/EXT2 Terminal.

• RS-232C.

• AV-Link at EXT2.

• Does not support CEC at HDMI.

• Active Backlight (dynamic contrast 10.000:1)

• Sleep Timer.

• Does not support “RC Path Through” by Pin Nº 9 of

1. Models Introduction (continued)

Specifications

Item

LCD panel

Resolution

Video Colour System PAL/SECAM/NTSC 3.58/NTSC 4.43/PAL 60

TV
Function

Brightness 450 cd/m2

Backlight life 60,000 hours (at Backlight Standard position)

Viewing angles H : 176° V : 176°

Audio amplifier

Speaker

Terminals Antenna

OSD language English/German/French/Italian/Spanish/Dutch/Swedish/Portuguese/Finnish/Turkish/Greek/

Power Requirement AC 220–240 V, 50 Hz

Power Consumption XXX W (0.9 W Standby) (Method IEC60107)

Weight XX.X kg (Display only), XX.X kg (Display with stand)

Operating temperature

• As a part of policy of continuous improvement, SHARP reserves the right to make design and specification changes for

TV-Standard Analogue CCIR (B/G, I, D/K, L, L’)

Digital DVB-T (2K/8K OFDM)

Receiving
Channel

TV-Tuning System Auto Preset 99 ch, Auto Label, Auto Sort

STEREO/BILINGUAL NICAM/A2

RS-232C 9 pin mini D-sub

EXT 1 SCART (AV input, Y/C input, RGB input, TV output)

EXT 2 SCART (AV input/output, Y/C input, RGB input, AV Link)

EXT 3 S-VIDEO (Y/C input), RCA pin (AV input)

EXT 4 Ø 3.5 mm jack (Audio input), 15 pin mini D-sub (PC)

EXT 5 Audio in, Component in

EXT 6 HDMI, Ø 3.5 mm jack (Audio input)

EXT 7 HDMI

C. I. (Common Interface) EN50221, R206001

OUTPUT RCA pin (Audio)

Headphones Ø 3.5 mm jack (Audio output)

product improvement without prior notice. The performance specification figures indicated are nominal values of production
units. There may be some deviations from these values in individual units.

VHF/UHF E2–E69ch, F2–F10ch, I21–I69ch, IR A–IR Jch, (Digital: E5–E69ch)

CATV Hyper-band, S1–S41ch

TV LCD 26”: LC-26D44E/S/K/RU TV LCD 32”: LC-32D44E/S/K/RU

26o LCD COLOUR TV, Model: LC-26D44E, LC-26D44S

26o Advanced Super View & BLACK TFT LCD

1,049,088 pixels (1,366 g 768)

10W g 2

Ø XX mm g 2, Ø XX mm g 2

UHF/VHF 75q Din type (Analogue & Digital)

Russian/Polish

95W (0,9 Standby) Method IEC60107)

10,5 Kg (With Stand) 13,0 Kg (With Stand)

0°C to k40°C

120W (0,9 Standby) Method IEC60107)

Service Connector.

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Training course: D44

4

2. Block Diagrams

Main ICs

IC207: COFDM DECODER (Coded Orthogonal Frequency Division Multiplexing)

Part Number : STV0362 SHARP Code: RH-IXB964WJZZQ

The STv0362 is a single-chip demodulator using COFDM and is intended for digital terrestrial receivers using compressed video, sound and data
services. It converts IF or base band differential signals to MPEG-2 transport stream format by processing OFDM carriers. The STv0362 is fully
compliant with the DVB-T specifi cation (ETS 300 744) and Nor Dig Unifi ed specifi cation.

IC1951: HDMI RECEIVER (High Defi nition Multimedia Interface)

Part number : Sii9025 SHARP Code : VHISII9025+-1Q

The Sii9025 is a compliant with the latest HDMI 1.2 (High Defi nition Multimedia Interface) specifi cation. Backward compatibility with DVI 1.0 allows
HDMI systems to connect to existing DVI 1.0 hosts. The SiI9025 is capable of receiving and outputting two channel digital audio at up to 192 kHz­an excellent solution for Digital TVs. An S/PDIF port supports up to 192 kHz audio. The SiI9025 also comes pre-programmed with HDCP keys,
greatly simplifying the manufacturing process, while providing the highest level of HDCP key security.

This IC includes the main features show below:
1- Dual-Input HDMI 1.2, HDCP 1.1 and DVI 1.0 compliant receiver.
2- Integrated TMDSR core.
3- Digital video interface supports video processors:

• 24-bit RGB/YCbCr 4:4:4

• 16/20/24-bit YCbCr 4:2:2

• 8/10/12-bit YCbCr 4:2:2 (ITU BT.656)

• 12-bit DMO (Digital Multimedia Output) RGB/YCbCr 4:4:4 (clocked with rising & falling edges)

• Color Space Conversion for both RGB-to-YCbCr and YCbCr-to-RGB (both 601 and 709)

• Auto video mode configuration simplifies system firmware design

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2. Block Diagrams (continued)

Main ICs

4- Digital audio interface supports high-end audio systems:

• One programmable I2S output for connection to low-cost DACs at 32-192kHz.

• S/PDIF output supports PCM, Dolby Digital, DTS digital audio transmission (32-192 kHz Fs) using IEC60958 and IEC61937.

• Auto audio error detection with programmable soft mute.
5- Integrated HDCP decryption engine for receiving protected audio and video content.
6- HDCP Built in Self Test (BIST) lowers cost to test HDCP operation.
7- Pre-programmed HDCP keys provide highest level of key security, simplifi es manufacturing.

IC1922 & IC1902: NVM OF HDMI (E-EDID)

Part Number : 24LC2BIN SHARP Code: VHI24LC2BIN-1Y

This IC is a 2-wire (I2C bus type) serial EEPROM this is electrically programmable. This EEPROM chip stores the data structure used to carry
confi guration information for optimal use of a display (EDID data).

IC4001: DIGITAL PROCESSOR MPEG 1/2 DECODER (Audio/Video)

Part Number : STI5105ALC SHARP Code: RH-IXC243WJZZQ

The STi5105ALC sets a new standard for set-top box decoder ICs, delivering outstanding performance, features and innovations to dramatically
reduce cost compared with previous generations. The Sti5105 features an even faster ST20CPU with direct map, single cycle caches to boost
performance.
Graphics and display capabilities have been enhanced with the provision of a blitter engine for formatting and fi nal display composition. Color
formats (CLUT8 and true color ARGB16) and display planes (background, still picture, video and OSD graphics) are provided. Overall system
performance benefi ts from the integration of SDRAM (DDR or SDR) external memory, that provides a unifi ed memory system with high bandwith
and low latency CPU access over a 16-bit interface.
System cost reduction is further promoted by the integration of additional peripheral and system services functions, such as VCXO, an enhancer
reset controller, DVB-CI support, smartcard power control and improved low power and standby functionality.

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2. Block Diagrams (continued)

Main ICs

This IC includes the main features show below:
1- An enhanced ST20 32-bit VL-RISC CPU with a 200MHz clock, 4Kbytes of instruction cache, 4Kbytes of data cache and 2Kbytes of
embedded SRAM.
2- A 16-bit, 166MHz Shared Memory Interface, with support for 64- and 128-bit confi gurations.
3- A programmable External Memory Interface supporting 4 separately confi gurable banks of SRAM, Flash and DRAM.
4- An MPEG-2 (MP@ML) decoder, including trick modes such as smooth fast-forward and rewind.
5- A Graphics/Display unit with 4 display planes, alpha blending, antialiasing and antifl utter fi lters, subpicture decoder, and blitter
display compositor with separate OSD (On-Screen Display) controls for TV and VCR outputs.
6- PAL/NTSC/SECAM encoder.
7- CGMS, Teletext, WSS, VPS encoder.
8- MPEG-1 layer I/II audio subsystem with embedded DSP for all popular audio formats.
9- A full range of on-chip peripherals, including 2 UARTs, 3 parallel I/O banks, 1 smartcard interface, four PWM channels, 1 IR
transmitter/receiver, etc.

IC4252: NVM 64Kb-E2PROM FOR DIGITAL PROCESSOR (IC4001).

Part Number : BR24S64FVM-WTR SHARP Code: VHIBR24S64M-1Y

The BR24S64FVM is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores all data related to the Digital Module
(Channels, User settings, etc.).

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2. Block Diagrams (continued)

Main ICs

IC3001: Main CPU / VIDEO PROCESSOR.

Part Number: VCT7993P-FA-A1-H000 SHARP Code: RH-IXC354WJZZQ

The VCT 77VWP (VCT-Pro) family is dedicated to high-quality FPD and double-scan TV sets. The memory and program ROM are integrated in
the IC. Modular design and deep submicron technology allow the integration of audio, video, Teletext, OSD, and controller-related functionalities.
They cover the whole range of fl at-panel display TVs. Each member of the IC family contains the entire audio, video, up-conversion processing for
4:3 and 16:9 50/60 Hz progressive or 100/120 Hz interlaced stereo TV sets plus the control/data interface for fl at-panel displays. The integrated
microcontroller supports a powerful OSD and graphics generator with integrated Teletext acquisition.

The VCT 77vwP family provides a front-end video-processing unit with 4 CVBS-Y/C or component inputs for HDTV, EDTV and SDTV. A VBI slicer,
support of 2000 pages of Teletext, and a 3-D comb fi lter for PAL and NTSC (in certain versions) are also available. The front-end unit further allows
processing an SD and an HD source in parallel, thus enabling PiP and PaP functionality. Motion-adaptive de-interlacing, temporal noise reduction,
and fi lm mode detection are based on a unifi ed memory technology. Post-scaling in the display-processing block ensures the desired output format.
Display processing is supported by an 8-bit 8051-compatible controller. By means of powerful alpha blending, the graphics mixer composes the
output image from following image layers: the video layer, the OSD layer and the pixel graphics layer. The audio part consists of a multi-standard
sound IF demodulator and a base-band processor supporting all desired sound features in this range.

The VCT-Pro front-end video processing unit offers 16 analog video inputs (CVBS/Y/C, RGB/Y Cr Cb) as well as digital interfaces for SDTV and
HDTV. Latest 3D+ comb fi lter generation provides highest performance for PAL/NTSC signals.

A VBI slicer, supporting up to 2000 pages of Teletext completes the analog video front end. 3D-motion-adaptive de-interlacing, temporal noise re­duction and fi lm mode detection are based on a unifi ed memory technology.

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2. Block Diagrams (continued)

Main ICs

This IC includes the main features show below:
1- Stereo Decoder Audio Processing.
2- Video Front-end 3D Comb fi lter, PC Connectivity.
3- Motion Adaptive Deinterlacer.
4- Scaling, Display Processing and FPD Control.
5- Unifi ed Memory for Audio, Video and Teletext.
6- OSD and Teletext processor.
7- Main CPU (TV controller).

IC3051: NVM 64Kb-E2PROM FOR ANALOG PROCESSOR (IC3001).

Part Number: BR24S64FVM-WTR SHARP Code: VHIBR24S64M-1Y

The BR24S64FVM is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores all data related to the Analog Module
(Channels, User settings, etc.)

IC2302: SUB-CPU AND PORT EXPANSOR.

Part Number: TMP86FS49AUG-6NU2 SHARP Code: RH-IXC009WJZZQ

This IC functions as ports Expansor of the main microcontroller (e.g leds, remote control, key, Power Supply supervisor, Audio mutes, LCD control­ler signals, temperature sensor, lamp error, etc..).
This microcontroller integrates 60KB of Flash memory, 2KB of RAM. It’s including 56 I/O pins (13 high current) with 2 UARTS, 1 I2C serial link, 16
channels of 10 bits A/D converters, 2 timers 16 bits.

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2. Block Diagrams (continued)

Main ICs

IC1301: DIGITAL AUDIO POWER AMPLIFIER

Part Number: YDA147-SZE2 SHARP Code: VHIYDA147SZ-1Y

This IC is a Stereo 20W (10W+10W) digital audio power amplifi er. The IC is class D amplifi er equipped with the function for the dynamic self-adjust­ment of the output volume in proportion to the amplitude of the input signal. The company calls the function of automatic adjustment of the installed
output volume “DRC (dynamic range compression)”.
The modulation method adopted PWM. An external LC fi lter is unnecessary. It only has to supply the output signal directly to the speaker. It has the
output control function to prevent an excessive input to the speaker. The maximum output electric power can be set to an arbitrary size by external
resistance. Besides this, the protection function to overheating and the overcurrent was installed.
The switching operation of power MOS-FET is installed and the technology that carefully controls the slewing rate is installed. Moreover, the auto­matic offset calibration circuit that suppresses the pop noise when the power supply starts is built into.

IC8103: LCD CONTROLLER

Part Number: T3Z18AFG-0003 SHARP Code: VHIT3Z18AFG-1Q

This IC is a custom Gate Array of Toshiba. The alias of this IC is EAGLE2 and is marked as SHARP. This IC is generating all the necessary timing
signals for controlling the panel and the RSDS interface for data..

IC8101: NVM 256Kb -E2PROM FOR LCD CONTROLLER (IC8103)

Part Number: M24256-BWMN6TP SHARP Code: VHIM24256B +-1L

The BR24256B is a 2-wire (I2C bus type) serial EEPROM that is electrically programmable. This IC stores all data related to the LCD Controller
(Gamma, timings, etc…).

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2. Block Diagrams (continued)

Main ICs

IC203: I2C BUS SELECTOR

Part Number: SN74LV4053APWR SHARP Code: VHILV4053AT-1Y

The SN74LV4053APWR is a high-speed CMOS analog multiplexer/demultiplexer backed by silicon gate CMOS technology. The multiplexer func­tion includes the selection and mixing of analog and digital signals. The chip includes two independent 3 channels selectors. A digital signal through
the control terminal turns on the switch of a corresponding channel. This IC is selecting if the Tuner is controlled from VCT-Pro (ATV mode) or from
OFDM decoder (DTV mode).

IC1201: NVM OF PC INPUT (EDID)

Part Number: BRC21F SHARP Code:VHIBR24C21F-1Y

This IC is a 2-wire (I2C bus type) serial EEPROM this is electrically programmable. This EEPROM chip stores the data structure used to carry
confi guration information for optimal use of a display (EDID data).

IC1501: RS-232 TRANSCEPTOR

Part Number: ISL83220 SHARP Code: VHIISL83220-1Y

This ISL83220 is a 3.0V to 5.5V powered RS-232 transceiver (emitter/receiver), +/-15kV ESD protected, with a maximum data rate of 250 kbps.

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Overall Wiring Diagram 26”

2. Block Diagrams (continued)

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ޓ

RUNTKA395WJQZ Power Supply & Inverter Block Diagram (26”)

Comments

Comments

Power Block

Signal Block

High Voltage
path

EMI Filter + Rectifier

AC Input

220~240Vac

High Current path

Signal path

ON/OFF switch

AC Brown out

PFC

BUCK CAP.

L7103 & Q7305

DCM controller

U7300

VCC

C7108

FLYBACK

T7101

Controller

U7101

Controller

IC7500

FULL

Bridge
MOS7500
MOS7502
MOS7501
MOS7503

38V O/P rectifier

13V O/P rectifier

5V O/P rectifier

5V Feedback Loop

Dimming Control,

Other I/O signal

1ψ2 Transformer

1ψ2 Transformer

1ψ2 Transformer

1ψ2 Transformer

1ψ2 Transformer

AC_DET

U7102

Feedback,

Protections

Q7265

Q7291

STB, OFL1,OSC,
REG,REG2,BRT,ADIM

ERR

Lamp Open & Shorted

+

-

+

-

+

-

+

-

+

-

CCFL

10lamps

8.5mA

1700V Typ.

33.9KHz Typ.

OFL=150Hz
20% min

38V*1.8A

S13V*2A

13V*0.5A

AC-DETECT

BU5V* 1A

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ON/OFF Feedback Loop

U7203

Primary Secondary

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PS_ON

System Interface

RUNTKA396WJQZ Power Supply Block Diagram (32”)

PS_ON

2. Block Diagrams (continued)

HALF

BRIDGE

Nº 1

CURRENT

SENSOR

Nº2

REG

STBY ON/UNDERV.

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AC DET

PS_ON

60/13V OVERVOLTAGE

BU+5V REG

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13V OVERVOLT.

60V OVERVOLT.

13V SHORT DET

60/13V REG

RUNTKA396WJQZ Inverter Block Diagram (32”)

2. Block Diagrams (continued)

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HIGH CURRENT LAMP

LOW VOLT LAMP
LAMP OPEN

SHORT CIRCUIT PROTECTION
TIMER LATCH

C7558=GROUND PROT DISABLED

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