GX20
62 727170696867666561 6463
CONFIDENTIAL
[4] Schematic diagram/wiring side of P.W.Board
MAIN PWB-A (1/3)
A
B
C
D
E
F
G
MAIN PWB-A(1/3)
C428
VEE
VDD
CKS
GND
FLM
WR
CSB
GND
1
C427
1
C425
1
C426
1
CK
LP
D7
D6
D5
D4
D3
D2
D1
D0
RD
RS
R424
V4
75K
V3
V2
V1
V0
V0
1234567891011121314151617181920212223242526272829303132333435
CN401
C418
1
CAPA3+
CAPA3-
CAPA2+
CAPA2-
CAPA1+
CAPA1-
VOUT
VREG
LCD001
EXTERNAL DISPLAY
RESB
TP419
C424
0.1
C423
1
C421
1
C420
1
C419
1
5-8 (6-C)
VINT
5-9 (11-B)
C422
0.1
SUBCKS
SUBCK
SUBFLM
SUBLP
SUBD7
SUBD6
SUBD5
SUBD4
SUBD3
SUBD2
SUBD1
SUBD0
SUBWR
SUBRS
SUBCS
SUBD6
SUBD4
SUBD2
SUBD0
SUBD3
SUBD1
SUBCKS
SUBLP
SUBCK
SUBFLM
SUBD7
SUBD5
SUBRS
SUBWR
SUBCS
/LCD_RESET
C473
100P
(CH)
IC405
TC7SZ08A
AND GATE
2
3
4
12
3
4
12
3
4
12
3
4
BUFOFF
LCD_INT
/LCD_WAIT
/RD
/WE
/LCD_CS
5-19 (10-G)
5678
5678
5678
VLCD
1
5
L447
L446
L445
26
DATA[0]
DATA[1]
DATA[2]
DATA[3]
DATA[4]
DATA[5]
DATA[6]
DATA[7]
DATA[8]
DATA[9]
DATA[10]
DATA[11]
DATA[12]
DATA[13]
DATA[14]
DATA[15]
VLCD
SUBDB6
5557 5860
SUBDB4
SUBDB2
SUBDB0
SUBDB3
66 6769707172
SUBDB1
27
SUBCKS
SUBLPIN
SUBCK
SUBFLMIN
SUBDB7
SUBDB5
78 8081
SUBRS
SUBWR_B
SUBCS_B
2122
RSP
DB0
DB1
DB2
DB3
DB4
DB5
DB6
93949596
DB7
DB8
DB9
DB10
106107108 110118119120121 122 123131 136
DB11
DB12
DB13
DB14
DB15
BUFOFF_B
LCDINT
WAIT_B
RD_B
46 47
WR_B
34 35
CS_B
C417
0.01
C416
0.1
T-COM
T-COMB4COMC
CN404
1234567
C449
4.7
XIN
RESET_B
56
54
TFT-COM
COMC
C448
1
1234
B4
L448
1234
XOUT
42
NC
78
6
78
6
87
G0G1G2G3G4
CAMCK
85
VCOMH
COMDC
5
G4G2G0
5
77
VDDPLL
2
B0
B3
B5G4G1
G0
B2G2B1
9
8
101112131415161718
C462
4.7
R433
56K
B0B1B2B3B4B5G0G1G2R0G5G4G3
5
6
5
6
89
R4
78
6
1234
78
6
1234
282930
39
B1
B3B4B5
13 14 15 16 17 18 19 20 21 22 23 24
25 26 27 28 29 30 31 32 33 34 35 36
B
C
VDDCORE
VDDCORE
VDDCORE
84
90
74
5
G3G1B5B3B1R4R2
5
86
38 484746454443424137 4039
D
VDDCORE
VDDCORE
139
143
78
1234
R0
78
L449
1234
101
R0
123456789101112
VDDCORE
151719
99
R2
123456789101112
A
VDDCORE
G3
12
8
L450
12
G5
19
78
7
636465
100
R1
G5
IC
LR
DI
50 605958575655545349 5251
E
VDDIO
VDDIO
232426
R3R1G5
6
H
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
12 3
Figure 1 SCHEMATIC DIAGRAM (1/24)
5 – 6
45
6
CONFIDENTIAL
GX20
LCD100
MAIN DISPLAY
VR
VS
G4
78
7
63
G5
R0
G5
5
6
R5R3R1
5
6
98
100
R1R3R5
R1
B2
L407
88
R3
R2
TP426
TP425
B0
TP424
24
L451
60 (100MHz)
L408
38
40
B0
B2
R4
R5R4R3R2R1R0G5G4G3
DCLK
60 (100MHz)
HSY
DCLK
HSYNC
505152
DCLK
HSYNC
VSY
SO
NC
VSYNC
NC
140
VSYNC
SE_DI/PORT7
RESET
CS
SI
SCLKR5GND
117
129
141
SE_CK/PORT1
SE_DO/PORT0
SE_LD1/PORT2
VCC
25
GND
C453
2.2
TP422
TP421
TP420
C474
10P(CH)
NC
103
EXCS_B0
VDC
VDC
C447
4.7
C472
10P(CH)
C469
10P(CH)
C471
10P(CH)
62
41
EXCS_B2
EXCS_B1
G3
161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960
451234
G5
8
L450
451234
65
IC403
LR38863
DISPLAY CONTROLLER
11911611510 9 110 111 11 2 113 114 117 118 12 0
107106100 101 102 103 104 105 108
38 484746454443424137 4039
50 605958575655545349 5251
62 727170696867666561 6463
F
E
D
98 9997
74 848382818079787773 7675
86 969594939291908985 8887
J
H
G
143142141140139138137136135134133
131128127121 122 123 124 125 126 129 130 132
PWMLCD/PORT4
L
K
M 144
VSS1
VSS2
VCL AMP
COM2
NC
NC
D409
1SS405
C450
1
C451
D408
RB520S30
NCNCNC
53
112
114
124
DA0
DA1
DCS_B
EXCS_B3
MP4_PLLCK
MP4_P0
GTDIO_B
MP4 RESET_B
BSPIXEL0
BSPIXEL1
BSPIXEL2
BSPIXEL3
BSPIXEL4
BSPIXEL5
BSPIXEL6
BSPIXEL7
BSCLK
BSBLK_B
BSVS_B
BSHS_B
PWM1/PORT8
PWM0/PORT3
HSWRD
HSEN
HSCK
TESTI
STKCHK
NC
NC
1
HSD7
HSD6
HSD5
HSD4
HSD3
HSD2
HSD1
HSD0
VDD2
TP430
C452
C5-
C454
1
C5+
C4-
1
C455
1
NC
NC
102
NC
NC
113
125126
137138
128
116
104105 109
NC
91 92
20
6873
5961
49
6789101112 13
32 33 3637
C4+
C3-
()
C3+
C2-
C457
C470
C2+
4.7
0.01
C1-
C1+
C458
4.7
5-8 (6-G)
BL_ICONT
VDC2
C459
G
VDC2
4.7
C460
VS
C461
4.7
2.2
SE_LD2/PORT5
SE_LD3/PORT6
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
PLLDIV0
PLLDIV1
PLLGND
GND
GND
GND
GND
GND
GND
SCANEN
PLLDIV2
232526
143
115
43
767982
97
132
135
()
345
141618
GND
31
444548
75
83
DUMMY1
DUMMY2
DUMMY3
DUMMY4
GND
GND
111
127
GND
142
130
NC
144
133 134
TP418
1
TP416
( ) : Not Mount The numbers24to26are waveform numbers shown in pages 5-4 ,5-5.
78 9
Figure 2 SCHEMATIC DIAGRAM (2/24)
10 11
12
5 – 7
GX20
A
MAIN PWB-A (1/3)
CONFIDENTIAL
5-1
/LCD_RESET
C416
0.1
TP415
L405
60 (100MHz)
TP414
L404
B
60 (100MHz)
C
5-6 (2-G)
LCD_RST
13M_CLK
D
TP404
/LCD_RESET,/RD,/WE,BUFOFF,/LCD_CS,LCD_INT,/LCD_WAIT
VBAT_AP
5-11 (7-B)
5-18 (3-B)
/LCD_WAIT
/LCD_CS
LCD_INT
BUFOFF
/WE
/RD
/LCD_RESET
E
VINT
FS402
Fuse
FS403
0.63A
Fuse
FS401
0.63A
Fuse
C41
0.1
1
L
2
F
G
H
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
12 3
Figure 3 SCHEMATIC DIAGRAM (3/24)
LCD_RST
5-17 (11-B)
G
LED_A
G
6
LED401
NSCW335
R455
470K
G
BL_ICONT
SUB_BL_ON
5-15 (11-H)
5-7 (9-E)
LED_K
CAMCLK
5-15 (11-G)
LED402
NSCW335T
/WE
/LCD_CSG/LCD_RESET
5-17 (10-A)
5-17 (10-A)
5-15 (10-H)
G
G
G
G
G
G
G
/LCD_WAIT
5-17 (11-B)
LCD_INT
5-15 (11-H)
/RD
BUFOFF
5-17 (11-B)
5-17 (11-A)
G
DATA[0-15]
5-17 (11-A)
G
13M_CLK
5-15 (11-G)
G
45
5 – 8
5
Vcc
1
NC
G
5-13 (9-G)
IC406
4
3
2
TXON
5-18 (3-D)
GX20
TC7SZ04A
LOGIC
GND
CONFIDENTIAL
()
()
R413
100K
R410
1.2K
C413
1
CAMN
40
CAMP
28
CAPN2
NC
23
CAPP2
NC
CAPN1
NC
CAPP1
NC
15 16
CPIN
19 2021
VIO
VBAT2
46
VBAT1
4
C402
4.7
3.69V
0V
D
G
S
D
Q401
FDG311 N
4
5
0V
3.69V
C404
1
TP405
G
G
G
VPLUS2
LEDR_M
5-18 (3-B)
5-12 (1-D)
G
LED_K_M
LED_A
G
4
BACK LIGHT
FPC ASS'Y PWB-F
5-15 (11-C)
5-15 (12-C)
L410
33nH
G
LED_A
TP428
C465
100P(CH)
GND
Vin
GND
SW
123
D413
RB521S30
C463
100P(CH)
D410
RD22SL
LED_K
6.46V
0.09V
Q403
2SK3019
C468
0.22
G
LED_A
()
456
IC404
SHDN
LT1937
FB
DC-DC
C464
0.0022
G
G
R453
4.7
G
LED_K_M
-7V
+13V
G
PWM_CPU
R440
470K
R438
4.7K
D414
RB520S30
R437
1K
SD
G
0V
R454
220
0.09V
0V
TP429
ALL ON LOW LIGHT ON
TP413
TP412
5-15 (11-G)
LED_K_M
SD
0.01V
Q404
G
MCH3443
BL_ICONT
HL
C411
1
C409
0.1
3.69V
123
D
D
6
3.69V
L402
4.7∝H
D404
RB551V30
L401
4.7∝H
G
G
5-12 (1-D)
RECIVER_OUTN_REC
RECIVER_OUTP_REC
CN402
123
C415
0.1
S402
use
S403
.63A
use
C466
1
FS401
0.63A
Fuse
L411
22∝H
LED401
NSCW335T
G
LED_K
55
0K
G
BL_ICONT
5-7 (9-E)
EP100
EARPIECE
IC402
IX3053AF
POWER MANAGEMENT
NC
25
26
CLK
STRB
12345678
12345678
A
VPLUS2
INDEX
22
49
30
FRP
910111213141516
B
LEDR
10
49
17 18 19 20
C
LEDG
2
21 22 23 24
D
LEDB
11
5
LSO11
25 26 27 28
E
SW1
44
42
RSTB
TRSW
SENSP
12
17
R404
G
LEDG_M
LEDB_M
29
DATA
SENSN
18
0.1
NC
NC
6
13
LSO21
LSO12
29 30 31 32
F
VPLUS11
VPLUS12
27
47
D402
RB521S30
C414
0.1
NC
7
14
LSO22
WVOUT
33 34 3536 37 3839 40
41 42 4344 45 4647 48
H
G
BLED
FLED
43
363738
C405
1
()()
C401
0.1
32
33
VREF
GND
45
LEDCTL
GND3
24
GND2
GND1
3
TEST
CUR1
CUR2
34 35
IREF
31
T4
41
T3
48
T2
89
T1
1
SBD
VNEG
39
D406
RB521S30
()
D405
RD22SL
D403
RD22SL
C403
0.1
C408
1
D407
RB521S30
C406
1
RECEPTION SIGNAL
R407
120K
TP411
TP410
D401
RB520S30
R405
220
R403
4.7K
Q402
5-6 (2-G)
TP407
EMH11
TP406
VINT
0V
2.29V
5
6
2
1
0V
0V 0V
G
LEDG
5-14 (5-B)
4
3
()
C475
0.1
G
LEDR
( ) : Not Mount
78 9
Figure 4 SCHEMATIC DIAGRAM (4/24)
5 – 9
10 11
12
GX20
CONFIDENTIAL
MAIN PWB-A (2/3)
A
B
MAIN PWB-A(2/3)
RECEPTION SIGNAL
TRANSMISSION SIGNAL
SPEAKER SIGNAL
5-18 (6-B)
5-18 (3-D)
VIB_CNT
SP1-1
SP2-1
TP110
TP 111
G
G
G
D102
VB
1SS388
C
D
G
E
5-18 (4-G)
5-18 (5-E)
5-18 (3-D)
F
G
H
5-18 (4-C)
5-18 (4-D)
5-18 (4-E)
5-18 (4-D)
)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
5-18 (3-C)
5-18 (3-E)
5-18 (4-D)
5-18 (3-C)
3.0V
VINT
G
G
G
G
G
G
G
G
G
G
GENIE_CHG
ADPDET
ADP
TXD
G
RTS
G
CONT2
G
SIMIO
SIMCLK
SIMRST
KEYPADROW[0-4],KEYPADCOL[0-4]
R104
5-18
(4-C, 6-E)
3.0V
10K
CONT1
5-12 (2-F)
5-19 (8-G)
RXD
CD
CTS
VINT
R113
10K
R191
10K
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
12 3
Figure 5 SCHEMATIC DIAGRAM (5/24)
()()()
ADP
RXD
TXD
RTS
CTS
CONT2
ADP
RXD
TXD
RTS
CTS
CONT2
CD
CD
JTAGEN
TCK
TMS
TDI
TDO
45
6
5 – 10
CONFIDENTIAL
GX20
1SS388
VBAT_AP
VIB_CNT
5-8 (6-D)
D103
1SS388
VBAT_AP
R172
1
R173
1
R182
2.2
DATA[7]
DATA[6]
DATA[5]
DATA[4]
DATA[3]
DATA[2]
C144
0.047
R124
27K
C132
10
17
18
19
20
21
22
23
24
25
C135
SPOUT1
SPOUT2
EXT2
D7
D6
D5
D4
D3
D2
C136
220P
(CH)
R122
0.1
14
15
16
EQ3
SPVSS
SPVDD
IC103
YMU759B
SOUND
D1D0/WR
28 29
27
26
DATA[1]
DATA[0]
R123
C137
68K
EQ2
EQ1
HPOUT-R
SDIN(/CS)
SYNC(A0)
SCLK(/RD)
31
30
18K
0.047
NC
10111213
VREF
HPOUT-L/MONO
PLLC
IFSEL
EXT1
CLK1
SDOUT
32
VSS
VDD
/RST
/IRQ
NC
5-18 (4-G)
VINT
C141
4.7
C142
0.1
C143
9
8
7
6
5
4
3
2
1
C145
0.1
C146
0.001
R128
3.3K
R143
470K
0.1
1.8
VCORE
5-19 (7-E)
C151
0.1
C153
0.1
1.8V
C150
0.1
C152
0.1
VR
3.0V
VINT
R188
470K
( ) : Not Mount
78 9
Figure 6 SCHEMATIC DIAGRAM (6/24)
SIMIO
SIMCLK
SIMRST
SIMEN
KEYPADROW[0]
KEYPADROW[1]
KEYPADROW[2]
KEYPADROW[3]
KEYPADROW[4]
KEYPADCOL[0]
KEYPADCOL[1]
KEYPADCOL[2]
KEYPADCOL[3]
KEYPADCOL[4]
3.0V
VINT
ADP
RXD
TXD
CD
RTS
CTS
CONT2
JTAGEN
TCK
TMS
TDI
TDO
R193
10K
TP109
NC
NC
10 11
196
SIMDATAIO
177
SIMCLK
195
GPIO_23
197
GPIO_24
157
GPIO_47
40
KEYPADROW[0]
54
KEYPADROW[1]
16
KEYPADROW[2]
53
KEYPADROW[3]
15
KEYPADROW[4]
KEYPADCOL[0]
14
KEYPADCOL[1]
33
KEYPADCOL[2]
32
KEYPADCOL[3]
13
KEYPADCOL[4]
51
GPIO_55
12
GPIO_56
148
USC[0]
146
USC[1]
133
USC[2]
145
USC[3]
134
USC[4]
125
USC[5]
131
USC[6]
178
JTAGEN
122
GPIO_18
198
GPIO_19
158
GPIO_20
199
GPIO_21
MC_CLK
50
MC
CMD
31
6267829798
120
VCC
VCC
VCC
VCC
VCC
[SIM RESET]
[SIM ENABLE]
[Camera RESET]
[Boot Control 1]
[Boot Control 0]
[External Connector 15pin]
[External Connector 6pin]
[External Connector 7pin]
[External Connector 9pin]
[External Connector 2pin]
[External Connector 10pin]
[External Connector 13pin]
[TCK]
[TMS]
[TDI]
[TDO]
12
130
VCC
132
VCC
160
VCC
8
VDDRTC
5 – 11
GX20
A
MAIN PWB-A (2/3)
11
12
13
14
15
16
NC
17
NC
18
19
20
(
CONFIDENTIAL
TMS
TDI
TDO
B
5-18 (4-G)
5-18 (5-H)
5-18 (3-C)
5-18 (4-D)
5-18 (3-C)
C
5-18 (4-C)
5-18 (3-G)
5-18 (4-G)
5-18 (4-F)
G
G
G
G
G
G
G
G
TCXOOUT
G
G
G
G
G
G
G
G
G
5-18 (3-F)
MIC_INN_R
D
5-9 (8-F)
G
5-9 (9-F)
G
E
RECIVER_OUTP_REC
RECIVER_OUTN_REC
5-18 (4-G)
5-18 (4-F)
5-18 (4-D)
5-10 (2-E)
5-14 (6-F)
F
5-19 (8-A)
ADC_MTC
G
BS2
BS0
BS1
SYNTHDATA
SYNTHEN
SYNTHCLK
ITXP
ITXN
QTXP
QTXN
IRXP
IRXN
QRXP
QRXN
AFCDAC
RAMPDAC
5-18 (4-F)
MIC_INP_R
G
TP167
TP168
JAKMIC
JAKEAR
JAKDET
VINT
R195
R196
G
3.0V
620K
68K
C101
47P(CH)
L103
FERRITE BEADS
L104
FERRITE BEADS
D105
RSB6.8S
G
G
G
R197
120K
C198
1
5-19 (10-C)
2.45V
C102
47P(CH)
C103
0.1
C199
0.1
1
IN(+)
Vdd
2
Vss
Out
3
IN(-)
IC107
TC75S55E
ORE ANP.
VAN A
Q101
EMD9
2.46V 0V
5
2.44V
6
C182
47P
(CH)
D106
RSB6.8S
TP106
C104
TP107
10
3.0V
VINT
5
4
ADC_MTC
34
2
1
0V
0V
C183
47P(CH)
R106
470
VAMP
L102
FERRITE
BEADS
C107
0.1
NC
VANA_AD6521
RECIVER_OUTP
RECIVER_OUTN
5-19 (10-G)
C105
4.7
C110
0.0022
5
Vout1
6
V+
7
GND
8
Vout2
IC101
NJM2149R
SPEAKER AMP.
-Vin
+Vin
Vref
CD
R115
10K
4
3
2
1
C108
10
R116
10K
R118
10K
C112
47P(CH)
C124
0.1
C109
0.1
C125
0.1
R199
33K
C123
1
R107
R108
C115
1
3.3K
4.7K
IT
IT
Q
Q
IR
IR
Q
C127
47P(CH)
R112
2.2K
L107
C116
47P(CH)
L108
L105
FERRITE BEA
L106
FERRITE
BEADS
()
C188
FER
FER
BEA
C11
33
BA
0.01
Q
A
R
C
0.
C118
C126
47P(CH)
R109
1.5K
R110
3.3K
C114
R111
4.7K
47P
(CH)
C111
0.001
C113
0.001
C186
0.1
R184
470K
G
G
5-18 (4-C)
5-19 (11-B)
BATT_SENSE
G
MVBAT
G
5-19 (11-C)
ADIN_B
5-18 (3-E)
H
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
12 3
Figure 7 SCHEMATIC DIAGRAM (7/24)
5 – 12
45
C168
6
R149
470
V
3
0.1
2
G
1
N
NC
IC
L
TE
S
C127
47P(CH)
L107
FERRITE BEADS
116
7P(CH)
L108
FERRITE
BEADS
5
RITE BEADS
L106
FERRITE
BEADS
C117
33P(CH)
BATT_SENSE
C188
0.01
()
ITXP
ITXN
QTXP
QTXN
IRXP
IRXN
QRXP
QRXN
AFCDAC
RAMPDAC
C129
C119
0.1
47P(CH)
C120
47P(CH)
C130
0.1
L110
33nH
C118
0.01
R188
470K
5-19 (7-E)
2.8V
VMEM
C131
0.1
C128
C181
47P(CH)
35
ITXP
31
ITXN
27
QTXP
23
QTXN
32
IRXP
28
IRXN
24
QRXP
20
QRXN
10
AFCDAC
43
RAMPDAC
54
VINNORP
64
VINNORN
62
VOUTNORP
61
VOUTNORN
C121
47P(CH)
44
VINAUXP
40
VINAUXN
63
VOUTAUXP
60
VOUTAUXN MCLKEN
()
6
AUXADC1
5
AUXADC2
15
AUXADC3
4
AUXADC4
16
AUXADC5
17
AUXADC6
()
TP171
TP175
0.1
C176
1
9
36
AVDD1
AVDD2
52
AVDD3
37
DVDD2
IC102
AD6521ACA
ANALOG BASEBAND
4
5
3
2
6
3
2
6
5124
13
16
15
14
22
26
30
TOP VIEW
34
38
42
49
47
48
46
50
58
59
5655
60
57
AUXADC1: JACK Detect
AUXADC2: Temperature
AUXADC3: Main Battery sence
AUXADC4: Main Battery voltage
AUXADC5: Battery Temperature
AUXADC6:
AGND4
AGND2
AGND1
AGND3
2
13
18
51
C200
A
B
C
D
E
F
G
H
J
K
0.001
1
1
11
21
25
29
33
37
41
45
39
R177
100K
7
17
51
61
DGND1
DGND3
49
1.8V
1
DVDD1
10
8
9
87
10
9
20
19
18
24
23
27
28
32
31
36
35
40
39
44
43
52
54
53
62
64
63
NC(REFCAP2)
NC(MICCAP)
19
53
NC
NC
VCORE
C133
0.1
59
DVDD3
IDACOUT
IDACREF
CONFIDENTIAL
C134
0.1
TP103
21
TCK
22
TMS
TDI
TDO
RXON
TXON
ARSM
ATS M
ASDI
ASFS
ASDO
BSDI
BSIFS
BSDO
BSOFS
VSDI
VSDO
VSFS
RESET
MCLK
BUZZER
PEFOUT
REFCAP
TP104
12
TP105
11
TP108
48
58
47
57
41
42
45
38
34
33
30
29
25
26
55
56
46
C138
C140
50
7
8
14
3
0.001
0.1
NC
NC
C139
NC
1
C148
100P
L109
FERRITE
13M_CLK
TCXOEN
PWRON
21
(CH)
BEADS
R193
TXON
BS2
CAM_ON
RFON
BS0
BS1
SYNTHEN
SYNTHDATA
SYNTHCLK
()
C191
0.001
23
10K
22
NC
NC
NC
NC
NC
NC
NC
NC
NC
TP123
TP122
R132
20M
R147
10M
C149
2P(CH)
199
GPIO_21
97
MC_CLK
50
MC_CMD
10
MC_DAT[0]
64
MC_DAT[1]
29
MC_DAT[2]
85
MC_DAT[3]
11
GPIO_22
176
DPLUS
121
DMINUS
27
GPO_00
48
GPO_01
200
GPO_02
180
GPO_03
181
GPO_04
7
GPO_05
26
GPO_06
182
GPO_07
202
GPO_08
203
GPO_09
204
GPO_10
167
GPO_11
183
GPO_16
184
GPO_17
161
GPO_18
186
GPO_19
168
GPO_20
162
GPO_21
46
CSDO
96
CSFS
25
CSDI
24
BSDO
3
BSOFS
2
BSDI
23
BSIFS
1
ASDO
19
ASDI
22
ASFS
6
GPO_29
47
CLKOUT_GATE
84
CLKOUT
4
GPIO_48
142
CLKIN
159
CLKON
63
PWRON
189
nRESET
49
OSCIN
28
OSCOUT
4
1
2
3
X102
32kHz
DGND SHIELD
GX20
[TDO]
[Not use]
[RXON]
[TXON]
[BS2]
[ADC_MTC]
[Not use]
[ARSM]
[ATSM]
[CAMERA Power on/off]
[IrDA Power on/off]
[RFON]
[BUFOFF]
[External AMP]
[BS0]
[BS1]
[SYNTHEN]
[LED Bright Control = Charge LED]
[SYNTHDATA]
[SYNTHCLK]
[13MHz Output]
NC
NC
GND
39
GND
52
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
GND
61
1
1
19
21
37
43
57
71
79
91
103
115
127
135
149
163
169
185
187
GND
65
2
3
3
2
2
3
4
5
7
8
9
10
11
12
13
15
16
17
18
188
GND
GND
81
86
149
70
C
5-18 (4-E)
V+
VO
3
4
2
GND
GND
1
5
NC
IC105
LM20BIM7
TEMPERATURE
SENSOR
( ) : Not Mount
2.715V
VT
C169
5-18 (3-D)
5-9 (12-F)
5-18 (4-D)
5-19 (7-B)
0.1
5-18 (6-B)
5-19 (11-C)
5-18 (6-F)
5-19 (11-E)
PWRON
5-18 (6-B)
5-19 (10-C)
5-18 (6-B)
CAM_ON
5-19 (8-H)
/RESET
TXON
SIMEN
EOC
G
G
G
G
G
G
G
G
G
G
RFON
TCXOEN
CHRDET
CHGEN
AMP_ON
G
The numbers
78 9
Figure 8 SCHEMATIC DIAGRAM (8/24)
TXON
RFON
PWRON
TCXOEN
SIMEN
CHRDET
EOC
CHGEN
CAM_ON
AMP_ON
/RESET
21to23
are waveform numbers shown in page 5-4.
10 11
12
5 – 13
GX20
CONFIDENTIAL
MAIN PWB-A (2/3)
A
B
C
5-18
(4-G)
1.8V
2.85V
VSIM
C154
3.0V
VINT
C156
0.1
0.1
C155
0.1
C157
0.1
C159
0.1
C158
0.1
3.0V
C160
0.1
VINT
C161
0.1
C163
0.1
C162
0.1
D
VRTC
2.8V
VMEM
()
C164
3.0V
VINT
()
0.1
3.0V
VINT
()
5-18 (3-D)
FLIP_SW
G
()
DATA[0-15]
5-9
(12-F)
LEDR
5-9
5-18
(11-F)
(3-G)
KEY_BL_ON
LEDG
G
G
G
5-1
8
IR_
ADD[1]
ADD[19]
ADD[18]
ADD[17]
ADD[1]
ADD[2]
8
44
79
143
160
E
132
VCC
VCC
F
VSIM
VMEM
VDDRTC
VMEM
IC104
128
VMEM
170
VMEM
173
VMEM
41
VEXT
66
VEXT
68
110
VEXT
[Hardware revision monitor_0]
AD6529
DIGITAL BASEBAND
[Hardware revision monitor_1]
[Hardware revision monitor_2]
n]
]
]
G
]
]
n]
n]
H
[LCD controller RESET, Sub LCD RESET, Camera Power on]
[Camera Controller Interrupt]
[External Connector 12pin]
[External Connector 14pin]
[External Connector 16pin]
5
166
179
VINT
VEXT
VEXT
VEXT
[ADP3408 CHGEN]
[AMP Power on/off]
[Sub Backlight on]
[Not use]
[ADP3408 CHRDET]
[Not use]
[Genie Rx]
[ADP3408 EOC]
[Flip Switch Detection]
[Keypad Backlight on/off]
[LCD controller Interrupt]
[Genie Tx]
[Flash WP]
[Sound IC RESET]
[Sound IC Interrupt]
[Flash VPP]
[Not use]
[Flash_Memory_1 /CS]
[PSRAM /CS]
[SRAM /CS]
[Flash_Memory_2 /CS]
[Not use]
[LCD Controller /CS]
[Camera /CS]
194
VDDUSB
30
GPIO_00
VMC
GPIO_01
GPIO_02
GPIO_03
GPIO_04
GPIO_05
GPIO_06
GPIO_07
GPIO_08
GPIO_09
GPIO_10
GPIO_11
GPIO_12
GPIO_13
GPIO_14
GPIO_15
GPIO_16
GPIO_17
GPIO_33
GPIO_34
GPIO_35
GPIO_36
GPIO_37
GPIO_38
GPIO_39
GPO_22
GPO_23
nROMCS1
nRAMCS1
nRAMCS2
nGPCS1
nAUXCS1
GPIO_42
GPIO_43
GPIO_44
126
124
113
114
112
101
102
89
100
90
77
99
78
88
76
69
70
56
55
36
20
18
35
17
34
75
42
140
191
154
172
192
141
193
155
[IrDA Tx]
[IrDA Rx]
NC
TP128
NC
TP147
TP148
TP149
TP150
TP151
CHGEN
AMP_ON
CHRDET
EOC
ADD[1-22]
5-12 (2-F)
5-17 (8-C)
3.0V
VINT
()
()
()
NOTES ON SCHEMATIC DIAGRAM can be found on page 5-1.
12 3
Figure 9 SCHEMATIC DIAGRAM (9/24)
45
6
5 – 14