CONFIDENTIAL
CHAPTER 6. OTHERS
[1] Function table of IC
IC001 VHILT1932++-1R (LT1932): DC - DC
Pin No.
Terminal Input/
name Output
Description of terminal
1 SW Output LED voltage output
5 6 1
DRIVER
2 GND – Ground
3 LED – LED ground
4 RSET Input LED current setting
5 SHDN Input Chip enable
6 VIN Input Input
Q
IC002 VHIADM8830+-1L (ADM8830): CHARGE PUMP REGULATOR
Pin No.
Terminal Input/
name Output
1 VCC Input
Description of terminal
Positive supply voltage input
2 VOUT Output Voltage doubler output
3 LDO_IN Input Voltage regulator input
4
+5 VOUT
Output +5.1 V output pin
5 +5 VIN Input +5.1 V input pin
6 LDO_ Input Control logic input
ON/OFF
7 SHDN Input Digital input
8 SCAN/ Input Drive mode input
BLANK
9 CLKIN Input External clock input
10 +15 V Output +15.3 V output pin
OUT
11 C3– Input External capacitor
12 C3+ Input External capacitor
13 C2– Input External capacitor
14 C2+ Input External capacitor
15 C4– Input External capacitor
16 C4+ Input External capacitor
17 –10 V Output –10.2 V output pin
OUT
18 GND – Devide ground pin
19 C1– Input External capacitor
20 C1+ Input External capacitor
SWVINSHDN
1.2MHz
S
OSCILLATOR
R
GND RSET
Q1
+
x5
+
+
A2
-
LED CURRENT
REFERENCE
42
+
DRIVER
A1
GX10
3
LED
Q2
-
+
6 – 1
GX10
CONFIDENTIAL
IC003 VHIADD8502+-1L (ADD8502): GRAYSCALE GENERATOR
Pin No.
Terminal Input/
name Output
Description of terminal
1 VL – Power supply (logic)
2 DIN Input Serial data
3 SCK Input Serial clock
4 CS-LD Input Load
5 CM Input Logic control
6 CV4 Input Logic control V4
7 REV1 Input Logic control 1
8 NC – Not used
9 NC – Not used
10 COM Output Common output
11 COM_M Input Common system Vref
12 NC – Not used
13 GND – Ground
14 V4 Output V4 voltage
15 V3 Output V3 voltage
16 V2 Output V2 voltage
17 V1 Output V1 voltage
18 V0 Output V0 voltage
19 VDD – Power supply
20 NC – Not used
21 REV2 Input Ref output select
22 GS2 Input Power save select 2
23 GS1 Input Power save select 1
24 PSK Input Power down
IC004 RH-IX2933AFZZL (IX2933AF): REGULATOR
Pin No.
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal Input/
name Output
Description of terminal
1 VOUT Output Output
2 GND – Ground
3 VDD Input Input
4 CE Input Chip enable
5* NC – Not used
VDD
CE
3
+
VREF
CURRENT LIMIT
4
1
2
VOUT
GND
6 – 2
CONFIDENTIAL
IC005 (LR38821A): TFT DISPLAY CONTROLLER (1/3)
Pin No.
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal name
1 Dummy4 Input/Output Not used
2* NC – Not used
3 GND – Ground
4* NC – Not used
5 GND – Ground
6 VDD CORE – Power supply
7 PWM Output PWM output signal
8* NC – Not used
9 NCS Input Device select signal
10 VDD IO – Power supply
11 Dummy3 – Not used
12 VDD IO – Power supply
13* NC – Not used
14 B5 Output LCD panel B output signal
15 B4 Output LCD panel B output signal
16 B3 Output LCD panel B output signal
17 GND – Ground
18 TEST1 Input Test terminal
19 TEST SCMD Input Test terminal
20 NWR Input Host write strobe signal
21* NC – Not used
22* NC – Not used
23 B2 Output LCD panel B output signal
24 B1 Output LCD panel B output signal
25 B0 Output LCD panel B output signal
26 LS Output Data transmission signal
27* XOUT Output Oscillating circuit output
28 VDD IO – Power supply
29 GND – Ground
30 TST SCEN Input T est terminal
31 NRD Input Host read strobe signal
32 RS Input Register select signal
33 GND – Ground
34 DCLK Output Data sampling clock (display clock)
35 GS2 Output Gray scale switch signal
36 GS1 Output Gray scale switch signal
37 PS2 Output Power save signal (for source driver)
38 XIN Input Oscillating circuit input/external clock input signal
39* NC – Not used
40 NRES Input Master reset
41* NC – Not used
42* NC – Not used
43* NC – Not used
44 DB0 Input/Output Data bus
45 PS1 Output Power save signal (for source driver)
46 G5 Output LCD panel G output signal
47 G4 Output LCD panel G output signal
48 G3 Output LCD panel G output signal
49 DB1 Input/Output Data bus
50 DB2 Input/Output Data bus
51 DB3 Input/Output Data bus
52 DB4 Input/Output Data bus
53 VDD CORE – Power supply
54 GND – Ground
55 VDD IO – Power supply
56 G2 Output LCD panel G output signal
Input/Output
Description of terminal
GX10
6 – 3
GX10
CONFIDENTIAL
IC005 (LR38821A): TFT DISPLAY CONTROLLER (2/3)
Pin No.
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal name
57 DB5 Input/Output Data bus
58 VDD IO – Power supply
59 GND – Ground
60 VDD CORE – Power supply
61 G1 Output LCD panel G output signal
62 G0 Output LCD panel G output signal
63 R5 Output LCD panel R output signal
64 R4 Output LCD panel R output signal
65 DB6 Input/Output Data bus
66 DB7 Input/Output Data bus
67 DB8 Input/Output Data bus
68 DB9 Input/Output Data bus
69 R3 Output LCD panel R output signal
70 R2 Output LCD panel R output signal
71 R1 Output LCD panel R output signal
72* R0 Output LCD panel R output signal
73* PSD Output Power save signal (for power IC)
74 ECK Output Power save signal (for power IC)
75 CV4 Output Power save signal (for gray scale IC)
76 SE_DI Input Data input for four-wire serial IF
77 DB10 Input/Output Data bus
78 DB11 Input/Output Data bus
79 DB12 Input/Output Data bus
80* BNC Input Synchronous/asynchronous bus switch signal
81 GND – Ground
82 GSP Output Gate start signal
83 GMODE Output Gate output switch signal
84 SHD Output Power IC ON/OFF control terminal
85 VDD IO – Power supply
86 REV1 Output Polarity reverse control signal
87 SE_DO Output Data output for three-wire/four-wire serial IF
88 DB13 Input/Output Data bus
89 DB14 Input/Output Data bus
90 DB15 Input/Output Data bus
91* NC – Not used
92* NC – Not used
93 SPL Output Sampling start signal
94 ALW Output Write all mode switch signal
95 GCS1 Output Vertical scan start position setting signal
96 GND – Ground
97 REV2 Output Polarity reverse control signal
98 SE_CK Output Control clock for three-wire/four-wire serial IF
99* SE_LD2 Output Load signal for four-wire serial IF
100* NC – Not used
101 VDD IO – Power supply
102 Dummy2 – Not used
103 VDD IO – Power supply
104* NC – Not used
105 GCK Output Gate shift clock
106 GCS2 Output Vertical scan start position setting signal
107 VDD CORE – Power supply
108 PSK Output Power save signal (for gray scale IC)
109 SE_LD1 Output Load signal for three-wire serial IF
110 GND – Ground
11 1* NC – Not used
112 Dummy1 – Not used
Input/Output
Description of terminal
6 – 4
CONFIDENTIAL
IC005 (LR38821A): TFT DISPLAY CONTROLLER (3/3)
109110111112
99101 100
SE_LD
2
DB13
VDD
IO
DB2
NC
313233
NRD
NCS NC
SE_LD
1
K
SE_DOREV1
SE_DIDB10
65666768
DB6DB7DB8
57585960
DB5
49505152
DB1
NC
TST
SCEN
SCMD
VDD
PSKGND NC
CORE
9798
REV2SE_C
GND GCS1 ALW SPL
VDD
IO
ECK
CV4
BNC
394041424344
NRES
NC PS2
2930
VDD
GND
IO
GND
TEST1NWR TEST
VDD
PWM
CORE
GCS2
GCK
GMODE
SHD
737475767778
PSD R0 R1
XIN
XOUT
B3
GND NC
Dummy
1
VDD
IO
DB15
79
DB12
DB9
CORE
DB4
DB0
GND
NC
Dummy
3
NC
NC
DB14
DB11
GNDVDD
DB3
NC
RS
NC
VDD
IO
103104105106107108
VDD
IO
NC
8182838487 8586888990
R2
R5
VDD
G2 GND
IO
G3
GS1 GS2 DCLK
B1
B0LS
B5
B4
NC VDD
GND NC
102
Dummy
2
919293949596
NC
80
BNCGNDGSP
69707172
R3
61626364
G1G0R4
53545556
VDD
CORE
45464748
PS1G5G4
3435363738
232425262728
B2
1213141516171819202122
IO
1234567891011
Dummy
4
1234567891011
GX10
L
K
J
H
G
F
E
D
C
B
A
XIN
XOUT
DB[15:0]
RS
NRD
NWR
NCS
Clock Generator
HOST Interface
Controller
Master Clock (MCK)
Register
Bas
Memory Interface
Address
Generator
PWM
PWM
SE_DI
SE_DO
SE_LD1
SIOLCD Panel Interface
SE_LD2
SE_CK
DCLK
LS
SPL
PS[2:1]
GCK
GSP
REV[2:1]
GCS[2:1]
GS[2:1]
GMODE
Timing Generator
ALW
PSK
CV4
PSD
ECK
SHD
Display
Memory
Color
Palatte
6 – 5
Selector
CDE
R[5:0]
G[5:0]
B[5:0]
GX10
CONFIDENTIAL
IC101 VHINJ287130-1L (NJM2871F03): 3.0 V REGULATOR
Pin No.
Terminal Input/
name Output
Description of terminal
1 CONT Input Control
2 GND – Ground
3N
B
– Noise bypass
4 VOUT Output Output
5 VIN Input Input
VIN
CONT
GND
5
Thermal
1
Bandgap
Reference
2
Protection
IC102 (AD6521ACA): ANALOG BASEBAND (1/2)
Pin No.
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal name
Input/Output
Description of terminal
1 DVDD1 – Digital core power supply (1.6V AVDD1/2).
2 DGND1 – Digital ground.
3* IDACREF Output Current DAC bias resistor connection, rset.
4 AUXADC4 Input Auxiliary A/D converter input 4. (MVBAT)
5 AUXADC2 Input Auxiliary A/D converter input 2. (Camera thermal sensor)
6 AUXADC1 Input Auxiliary A/D converter input 1. (Jack detection)
7 REFOUT Input/Output Buffered reference output/external bias voltage input.
8 REFCAP Output Reference filter capacitor connection.
9 AVDD2 – Auxiliary analog power supply (2.4V to 2.6V).
10 AFCDAC Output Automatic frequency control signal output.
11 TDO Output Test data output.
12 TDI Input Test data input.
13 AGND4 – Analog substrate ground.
14* IDACOUT Output Current DAC output for battery charging.
15 AUXADC3 Input Auxiliary A/D converter Input 3. (Battery sense)
16 AUXADC5 Input Auxiliary A/D converter Input 5. (Battery thermal sensor)
17 AUXADC6 Input Auxiliary A/D converter Input 6.
18 AGND2 – Auxiliary analog ground.
19*
NC (REFCAP2)
Output Reserved for reference filter capacitor.
20 QRXN Input Differential analog input for quadrature receive signal.
21 TCK Input Test clock.
22 TMS Input Test mode select.
23 QTXN Output Differential analog output for quadrature transmit signal.
24 QRXP Input Differential analog input for quadrature receive signal.
25 VSDO Output Voiceband serial port data output.
26 VSFS Output Voiceband serial port input/output framing signal.
27 QTXP Output Differential analog output for quadrature transmit signal.
28 IRXN Input Differential analog input for in-phase receive signal.
29 VSDI Input Voiceband serial port data input.
30 BSOFS Output Baseband serial port output framing signal.
31 ITXN Output Differential analog output for in-phase transmit signal.
32 IRXP Input Differential analog input for in-phase receive signal.
33 BSDO Output Baseband serial port data output.
34 BSIFS Output Baseband serial port input framing signal.
35 ITXP Output Differential analog output for in-phase transmit signal.
36 AVDD1 – Baseband Analog Power Supply (2.4V to 2.6V).
37 DVDD2 – Digital Interface Power Supply
(The greater of DVDD1 or DVDD3 or AVDD3-0.2V, to maximum 3.3V).
38 BSDI Input Baseband serial port data input.
39 AGND1 – Baseband analog ground.
40 VINAUXN Input Differential voiceband auxiliary input.
41 ASDI Input Auxiliary serial port data input.
42 ASFS Input Auxiliary serial port input/output framing signal.
4
VOUT
3
NB
6 – 6
CONFIDENTIAL
IC102 (AD6521ACA): ANALOG BASEBAND (2/2)
Pin No.
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal name
43 RAMPDAC Output Power ramping control signal output.
44 VINAUXP Input Differential voiceband auxiliary input. (Jack mic audio input)
45 ASDO Output Auxiliary serial port data output.
46 MCLK Input Master clock input.
47 ARSM Input Advance baseband receive state machine.
48 RXON Input Baseband receive section power-on input.
49 DGND3 – Digital ground.
50c BUZZER Output Buzzer output.
51 AGND3 – Voiceband analog ground.
52 AVDD3 – Voiceband analog power supply (2.4 V to 2.7 V).
53* NC (MICCAP) Output Reserved for microphone.
54 VINNORP Input Differential voiceband normal input. (Mic audio input)
55 RESET Input Active low reset signal input.
56 MCLKEN Output Master clock enable.
57 ATSM Input Advance baseband transmit state machine.
58 TXON Input Baseband transmit section power-on input.
59 DVDD3 – Digital core power supply (1.6 V to AVDD1/2).
60 VOUTAUXN Output Differential voiceband auxiliary output.
61 VOUTNORN Output Differential voiceband normal output. (Earpiece audio output)
62 VOUTNORP Output Differential voiceband normal output. (Earpiece audio output)
63 VOUTAUXP Output Differential voiceband auxiliary output. (Jack Earpiece audio output)
64 VINNORN Input Differential voiceband normal input.
Input/Output
Description of terminal
GX10
6 – 7
GX10
CONFIDENTIAL
IC103 VHIYMU759B+-1L (YMU759B): SOUND
Pin No.
In this unit, the terminal with asterisk mark (*) is (open) terminal which is not connected to the outside.
Terminal name
Input/Output
Description of terminal
1 CLKI Input Clock input terminal (2 – 20 MHz)
2 EXT1 Output External control terminal 1
3 /IRQ Output Interrupt output terminal
4 /RST Input Hardware reset input terminal
5 IFSEL Input CPU I/F select; L: serial I/F, H: parallel I/F
6 PLLC – Built-in PLL capacitor terminal
7 VDD – Power supply
8 VSS – Ground
9 VREF – Analog reference voltage terminal
10*
HPOUT-L/MONO
Output Headphone output Lch
11* HPOUT-R Output Headphone output Rch
12 EQ1 – Equalizer terminal 1
13 EQ2 – Equalizer terminal 2
14 EQ3 – Equalizer terminal 3
15 SPVDD – Analog power supply for speaker amplifier (Typ + 3.6 V)
16 SPVSS – Analog ground for speaker amplifier
17 SPOUT1 Output Speaker terminal 1
18 SPOUT2 Output Speaker terminal 2
19 EXT2 Output External control terminal 2
20 D7 Input/Output Parallel I/F data bus 7
21 D6 Input/Output Parallel I/F data bus 6
22 D5 Input/Output Parallel I/F data bus 5
23 D4 Input/Output Parallel I/F data bus 4 (Not connected when IFSEL terminal at L)
24 D3 Input/Output Parallel I/F data bus 3 (Not connected when IFSEL terminal at L)
25 D2 Input/Output Parallel I/F data bus 2 (Not connected when IFSEL terminal at L)
26 D1 Input/Output Parallel I/F data bus 1 (Not connected when IFSEL terminal at L)
27 D0 Input/Output Parallel I/F data bus 0 (Not connected when IFSEL terminal at L)
28 /WR Input Parallel I/F write pulse (Not connected when IFSEL terminal at L)
29 SDIN (/CS) Input IFSEL terminal = L serial I/F data input
IFSEL terminal = H parallel I/F chip select input
30 SYNC (A0) Input IFSEL terminal = L serial I/F data read signal
FSEL terminal = H parallel I/F address signal
31 SCLK (/RD) Input IFSEL terminal = L serial I/F bit clock input
IFSEL terminal = H parallel I/F read pulse
32* SDOUT Output Serial I/F data output (external pull-up resistor required)
HPOUT-L/
HPOUT-R
Vol R
VREF
11
HP
MONO
10
HP
Vol L
Select Mono
+-
SP
Vol
EQ
Vol
16 159
SPVSS
SPVDD
12
13
14
17
18
EQ1
EQ2
EQ3
SPOUT1
SPOUT2
/RST
SCLK
SYNC
SDIN
SDOUT
/WR
20 ~ 27
D0~D7
IFSEL
/IRQ
EXT1
EXT2
PLLC
687
Register
FM
FIFO
x1
ADPCM
CLKI
1
PLL
Seq
FIFO
ADPCM
Waveform
FIFO
Timing Generator
Sequencer
(Fs = 49.7 kHz)
Sequencer
(Fs = 4 or 8 kHz)
LED control
TIMER
FM
Synthesizer
Number of
voices: 16
ADPCM
Playback
Vibrator control
Vol
Vol
LPF
Rch
16-bit
Lch
DAC
Vol
&
VREF
VREF
VDD
VSS
4
31
Power
30
Down
29
Control
32
SELECT
29
/CS
30
A0
28
CPU I/F
31
/RD
5
3
2
19
Mix & Select
6 – 8
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