SGS Thomson Microelectronics VND83013TR, VND830 Datasheet

®

VND830

DOUBLE CHANNEL HIGH SIDE DRIVER

TYPE R

DS(on)

I

OUT

V

CC

VND830 60 mΩ (*) 6 A (*) 36 V

(*) Per each channel

■ CMOS COMPATIBLE INPUTS

■ OPEN DRAIN STATUS OUTPUTS

■ ON STATE OPEN LOAD DETECTION

■ OFF STATE OPEN LOAD DETECTION

■ SHORTED LOAD PROTECTION

■ UNDERVOLTAGE AND OVERVOLTAGE

SHUTDOWN

■ LOSS OF GROUND PROTECTION

■ VERY LOW STAND-BY CURRENT

■ REVERSE BATTERY PROTECTIO N (**)

DESCRIPTION

The VND830 is a monolithic device made by using STMicroelectronics VIPower M0-3 Technology, i ntended for dr iving any ki nd of load with one side connected to ground. Active VCC pin voltage clamp protects the devices against low energy spikes (see ISO7637 transient

BLO C K DIAG RA M

SO-16L

ORDER CODES

PACKAGE TUBE T&R

SO-16L VND830 VND83013TR

compatibility table). Active current limitation combined with thermal shutdown a nd automatic restart protects the device against over load. The device detects open load condition both is on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection.

V

CC

V

CC

CLAMP

GND

INPUT1

STATUS1

OVERTEMP. 1

INPUT2

STATUS2

OVERTEMP. 2

(**) See application schematic at page 8

LOGIC

OVERVOLTAGE

UNDERVOLTAGE

CLAMP 1

DRIVER 1

CURRENT LIMITER 1

OPENLOAD ON 1

OPENLOAD OFF 1

CLAMP 2

DRIVER 2

CURRENT LIMITER 2

OPENLOAD ON 2

OPENLOAD OFF 2

OUTPUT1

OUTPUT2

July 2002 1/19

VND830

ABSOLUTE MAXIMUM RATI NG

Symbol Parameter Value Unit

tot

DC Supply Voltage 41 V Reverse DC Supply Voltage - 0.3 V

CC

DC Reverse Ground Pin Curren t - 200 mA DC Output Current Internally Limited A Reverse DC Output Current - 6 A DC Input Current +/- 10 mA DC Status Cur rent +/- 10 mA Electros tatic Discharge (Hum an Body Model: R=1.5KΩ; C=100pF)

- INPUT

- STATUS

- OUTPU T

- V

CC

Maximum Switching Energy (L=1.8mH; R

Powe r Dissipation T Junction Operating Temperature Internally Limited °C

j

Case Operating Temperature - 40 to 150 °C

c

=0Ω; V

L

=13.5V; T

bat

=25°C 8.3 W

lead

=150ºC; IL=9A)

jstart

4000 4000 5000 5000

102 mJ

Storage Temperature - 55 to 150 °C

V

CC

- V

- I

GND

I

OUT

- I

OUT

I

IN

I

STAT

V

ESD

E

MAX

P

T

stg

CONNECTION DIAGRAM (TOP VIEW)

V V V V

V

CC

N.C. GND INPUT 1 STATUS 1 STATUS 2 INPUT 2 V

CC

CURRENT AND VOLTAGE CO NVENTIONS

I

IN1

I

V

IN1

V

STAT1

I

IN2

I

V

STAT2

IN2

V

STAT2

INPUT 1

STATUS 1

INPUT 2

STATUS 2

1

8

16

9

V

CC

OUTPUT 1 OUTPUT 1 OUTPUT 1 OUTPUT 2 OUTPUT 2 OUTPUT 2 V

CC

V

CC

I

OUT1

I

S

V

CC

OUTPUT 1

V

OUT1

I

OUT2

V

OUT2

GND

OUTPUT 2

I

GND

2/19

VND830

THERMAL DATA

Symbol Parameter Value Unit

R

thj-lead

R

thj-amb

(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick) connected to all VCC pins. Horizontal

mounting an d no ar tificial ai r flow.

ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C< Tj <150°C, unless otherwise specified)

(Per each channel) POWER OUTPUT

Symbol Parameter Test Conditions Min Typ Max Unit

V

CC

V

USD

V

OV

R

ON

I

S

I

L(off1)

I

L(off2)

I

L(off3)

I

L(off4)

Thermal R esistanc e Junctio n-lead 15 °C/W

Thermal Resistance Junction-ambient 65 (*) °C/W

(**) Oper at i ng Su pp ly Voltage 5.5 13 36 V

(**) Undervoltage Shut-down 3 4 5.5 V

(**) Overvolt age Shut-d own 36 V

On State Resistance

(**) Supply Current

Off State Output Curr ent VIN=V Off State Output Curr ent VIN=0V; V Off State Output Curr ent VIN=V Off State Output Curr ent VIN=V

=2A; Tj =25 °C

I

OUT

I

=2A; VCC> 8V

OUT

Off State; V Off State; V

Tj=25°C

On State; V

OUT

OUT OUT

=13V; VIN=V

CC

=13V; VIN=V

CC

OUT OUT

=0V =0V;

12

=13V; VIN=5V; I

CC

OUT

=0A

5

=0V 0 50 µA

=3.5V -75 0 µA

OUT

=0V; Vcc=13V; Tj =125°C 5 µA =0V; Vcc=13V; Tj =25°C 3 µA

60

120

40

25

7

mΩ mΩ

µA

mA

(**) Per device

SWITCHING (VCC =13V)

Symbol Parame ter Test Conditions M in Typ Max Unit

t

d(on)

t

d(off )

dV/dt

Turn-on Delay Time

Turn-off Delay Time

Turn-on Voltage Slope

(on)

Turn-off Voltage Slope

(off)

RL=6.5Ω from VIN rising edge to V

=1.3V

OUT

RL=6.5Ω from VIN falling edge to V

=11.7V

OUT

RL=6.5Ω from V V

=10.4V

OUT

RL=6.5Ω from V V

=1.3V

OUT

=1.3V to

OUT

=11.7V to

OUT

30 µs

See

relative

diagram

See

relative

diagram

LOGIC INPUT

Symbol Param eter Test Conditions Min Typ Max Unit

Input Low Level 1.25 V

IL

Low Level Input Current VIN = 1.25V 1 µA

IL

Input High Level 3.25 V

IH

High Level Input Curr ent VIN = 3.25V 10 µA Input Hyst eresis Voltage 0.5 V

I

Input Clamp Voltage

= 1mA

IN

I

= -1mA

IN

66.8

-0.7

8V

V

I

IH

hyst

ICL

V/µs

V

3/19

1

VND830

ELECTRICAL CHARACTERISTICS (continued)

STATUS PIN

Symbol Parameter Test Conditions Min Typ Max Unit

V

STAT

I

LSTAT

C

STAT

V

SCL

Status Low Output Voltage I Status Leakage Current Normal Operation; V Status Pin Input

Capacitance Status Clamp Voltage

PROTECTIONS

Symbol Parame ter Test Conditions M in Typ Max Unit

T

TSD

T

T T

SDL

I

V

demag

hyst

lim

Shut-down Temperature 150 175 200 °C

Reset Temp erature 135 °C

R

Ther ma l Hy steresi s 7 15 °C Status Delay in Overload

Conditions Current limitation Turn-off Output Clamp

Voltage

= 1.6 mA 0.5 V

STAT

Normal Operation; V

= 1mA

I

STAT

I

= - 1mA

STAT

Tj>T

TSD

V

=13V

CC

5.5V < V I

OUT

< 36V

CC

=2A; L= 6m H VCC-41 VCC-48 VCC-55 V

= 5V 10 µA

STAT

= 5V 100 pF

STAT

66.8

-0.7

691515A

8V

20 µs

V

A

OPENLOAD DETECTION

Symbol Param eter Test Conditions Min Typ Max Unit

I

OL

t

DOL(on)

V

t

DOL(off)

OPEN LOAD STATUS TIMING (with external pull-up)

V

INn

V

STATn

Openload ON State Detectio n Threshold Openload ON State Detection Delay

=5V 50 100 200 mA

V

IN

=0A 200 µs

I

OUT

Openload OFF State Voltage Detection

OL

Threshold Openload Detection Delay

at Turn Off

V

OUT

t

DOL(off)

VIN=0V 1.5 2.5 3.5 V

OL

I

OUT

t

DOL(on)

> V

< I

OL

V

INn

V

STATn

1000 µs

OVERTEMP STATUS TIMING

Tj > T

TSD

t

SDL

t

SDL

4/19

2

Switching time Waveforms

V

OUTn

dV

/dt

OUT

(on)

V

INn

t

d(on)

80%

10%

t

d(off)

90%

dV

OUT

/dt

VND830

(off)

t

TRUTH TABLE

CONDITIONS INPUT OUTPUT STATUS

Normal Operation

Current Limitation

Overtemperature

Undervoltage

Overvoltage

Output Voltage > V

Output Current < I

OL

L

H

L H H

L H

L

H

L X X

(T

< T

j

> T

j

L

L H

H

L H

TSD

H H

H ) H ) L

H

L

X

H

L

H

L

5/19

VND830

ELECTRICAL TRANSIENT REQUIREMENTS ON VCC PIN

ISO T/R 7637/1

Test Pulse

1 -25 V -50 V -75 V -100 V 2 ms 10 Ω

2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω 3a -25 V -50 V -100 V -150 V 0.1 µs 50 Ω 3b +25 V +50 V +75 V +100 V 0.1 µs 50 Ω

4 -4 V -5 V -6 V -7 V 100 ms, 0.01

5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2

ISO T/R 76 37/1

Test Pulse

1C C C C

2C C C C 3aCCCC 3bCCCC

4C C C C

5C E E E

CLASS CONTENTS

C All functions of the device are perf ormed as designed af ter expos ure to disturbance . E One or more functions of the device is not performed as designed after exposure and cannot be returned

to proper operation without replacing the device.

I II III IV Delays and

I II III IV

TEST LEVELS

TEST LEVELS R ESULTS

Impedance

Ω

6/19

Figure1: Waveforms

INPUT

n

OUTPUT VOLTAGE STATUS

V

CC

INPUT

n

OUTPUT VOLTAGE STATUS

V

CC

INPUT

n

OUTPUT VOLTAGE STATUS

VND830

NORMAL OPERATION

n

UNDERVOLT AGE

V

USD

n

OVERVOLTAGE

VCC<V

OV

n

USDhyst

undefined

INPUT

n

OUTPUT VOLTAGE STATUS

INPUT

n

OUTPUT VOLTAGE STATUS

T

INPUT

n

j

n

OUTPUT CURRENT

STATUS

n

OPEN LOAD with external pull- up

V

n

V

OL

OUT>VOL

OPEN LOAD without ext ernal pull- up

n

OVERTEMPE RATURE

T

TSD

T

R

n

7/19

1

VND830

APPLICATION SCHEMATIC

+5V

R

prot

µ

C

R

prot

R

prot

R

prot

STA T US1

INPUT1

STA TUS2

INPUT2

GND PROTECTION NETWORK AGAINST REVERSE BATTERY

Soluti on 1: Resistor in the ground line (R can be us ed with any type of load .

The fo llowin g is an indica tion on how to dim ension the

resistor.

R

GND

1) R

2) R

where -I be foun d in the abs olute maximum r ating section of the of

≤ 600mV / I

GND

≥ (−VCC) / (-I

GND

is the DC re vers e grou nd pi n cu rren t an d can

GND

S(on)max

)

GND

.

the devic e’s data sh ee t. Power Dissipation in R

battery situations) is:

= (-VCC)2/R

P

D

GND

(when VCC<0: during reverse

GND

This resistor can be shared amongst several different HSD. Please note that the val u e of this resi s to r sh ou l d be calcul ated with form ula (1) wher e I sum of the maximum on-state currents of the different

S(on)max

devices. Please note that if the microprocessor ground is not

common with the device ground then the R produce a shift (I and the status output values. This shift will vary

S(on)max

* R

) in the input thresholds

GND

only). This

GND

becomes t he

GND

will

V

CC

OUTPUT1

V

GND

R

GND

D

OUTPUT2

GND

depending on many devices are ON in the case of several high side drivers sharing the same R

GND

.

If the calculated power dissipation leads to a large resistor or seve ral de vic es have to s hare t he s ame r esisto r then the ST suggest to utiliz e Solu tio n 2 (see below ).

Solution 2: A resistor (R

D

GND

A diode (D

=1kΩ) should be inserted in parallel to

GND

if the devi ce will be driving an inductive load.

) in the gro und line.

GND

This small signal diode can be safely shared amongst several different HSD. Also in this case, the presence of the ground network wi ll produce a shift ( input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor network.

LOAD DUMP PROTECTION

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are grea ter tha n the ones sh own in the ISO T/R 7637/1 table.

D

ld

j

600mV) in t he

8/19

VND830

C I/Os PROTECTION:

µ

If a ground protection network is used and negative transient are present o n the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (R in line to prevent the µC I/Os pins to latch-up.

prot

The v alu e of t he se resis tor s is a compro m ise betwee n the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os.

≤ R

-V

CCpeak/Ilatchup

prot

≤ (V

OHµC-VIH-VGND

) / I

IHmax

Calculation example: For V

CCpeak

5kΩ ≤ R

)

Recommended R

= - 100V an d I

≤ 65kΩ.

prot

value is 10kΩ.

prot

latchup

≥ 20mA; V

OHµC

≥ 4.5V

9/19

VND830

OPEN LOAD DETECTION IN OFF STATE

Off state open load detection requires an external pull-up resistor (R

positive supply voltage (V

) connected between OUTPUT pin and a

PU

) like the +5 V line used to

PU

supply the microprocessor. The external resistor has to be selected according to the following requirements:

1) no f al se op en load i nd icat ion wh en load i s co nne cted : in thi s case we have to avoi d V

V

; this results in the following condition

Olmin

=(VPU/(RL+RPU))RL<V

V

OUT

to be hi gher than

OUT

Olmin.

Open Load detection in off state

INPUT

DRIVER

+

LOGIC

2) no misdetection when load is disconnected: in this case the V

results in the following condition R I

.

L(off2)

Beca us e I

s(OFF)

has to be higher than V

OUT

<(V

PU

may si gn ifi c a ntly incr ea se i f V high (up t o several mA ), the pul l-up resi stor R be conne cted t o a su pp ly t ha t is swit ch ed OFF when t h e

module is in standby. The values of V

OLmin

, V

OLmax

and I

are available in

L(off2)

the Electrical Characteristics section.

V batt. VPU

CC

V

PU

R

L(off2)

I

; this

OLmax

PU–VOLma x

is pulled

out

should

PU

)/

STATUS

+

-

OL

V

GROUND

OUT

R

L

R

10/19

1

VND830

Off State Output Current

IL(off1) (u A)

2.5

2.25

2

1.75

1.5

1.25

1

0.75

0.5

0.25 0

-50 -25 0 25 50 75 100 125 150 175

Off state

Vcc=36V

Vin=Vout=0V

High Level Input Current

Iih (uA)

5

4.5

3.5

2.5

1.5

0.5

Vin=3.25V

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Input Clamp Voltage Status Leakage Current

Vicl (V)

8

7.8

7.6

7.4

7.2

7

6.8

6.6

6.4

6.2 6

Iin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Ilstat (uA)

0.05

0.04

Vstat=5V

0.03

0.02

0.01

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Vstat (V)

0.8

0.7

Istat=1.6mA

0.6

0.5

0.4

0.3

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Status Clamp VoltageStatus Low Output Voltage

Vscl (V)

8

7.8

7.6

7.4

7.2

6.8

6.6

6.4

6.2

Istat=1mA

7

6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

11/19

VND830

On State Resistance Vs T

Ron (mOhm)

160

140

120

100

80

60

40

20

0

-50 -25 0 25 50 75 100 125 150 175

Iol (mA)

1250

1200

1150

1100

1050

1000

950

900

850

800 750

-50 -25 0 25 50 75 100 125 150 175

Iout=2A

Vcc=8V; 13V & 36V

Tc (°C)

Vcc=13V

Vin=5V

case

Tc (ºC)

On State Resistance Vs V

Ron (mOhm)

120 110 100

90 80 70 60 50 40 30 20 10

0

5 10152025303540

Vcc (V)

Input High LevelOpenload On State Detection Threshold

Vih (V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

CC

Tc=150°C

Tc=25°C

Tc= - 40°C

Iout=5A

12/19

Vil (V)

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 -25 0 25 50 75 100 125 1 50 175

Tc (°C)

Input Hysteresis VoltageInput Low Level

Vhyst (V)

1.5

1.4

1.3

1.2

1.1

1

0.9

0.8

0.7

0.6

0.5

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

VND830

Overvoltage Shutdown

Vov (V)

50

48

46

44

42

40

38

36

34

32 30

-50 -25 0 25 50 75 100 125 150 175

Openload Off State Voltage Detection Threshold

Vol (V)

5

4.5

4

3.5

3

2.5

2

1.5

1

0.5 0

Vin=0V

-50 -25 0 25 50 75 100 125 1 50 175

Tc (°C)

Turn-on Voltage Slope Turn-off Voltage Slope

dVout/dt(on) (V/ms)

800

700

600

500

Vcc=13V

Rl=6.5Ohm

dVout/dt(off) (V/ms)

600

550

500

450

Vcc=13V

Rl=6.5Ohm

Tc (°C)

I

LIM

400

300

200

100

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

Vs T

case

Ilim (A)

20

18

16

14

12

10

8

6

4

2 0

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

400

350

300

250

200

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

13/19

VND830

Maximum turn off current versus load inductance

LMAX (A)

I

100

10

A

B

C

1

0.1 1 10 100

A = Single Pulse at T

B= Repetitive pulse at T C= Repetitive Pulse at T

Conditions: VCC=13.5V

Values are generated with RL=0Ω In case of repetitive pulses, T

the temperature specified above for curves B and C.

VIN, I

L

=150ºC

Jstart

=100ºC

Jstart

=125ºC

Jstart

jstart

Demagnetization

(at beginning of each demagnetization) of every pulse must not exceed

L(mH)

Demagnetization

14/19

t

SO-16L PC Board

VND830

SO-16L THERMAL DATA

R

thj-amb

Layout condition of Rth and Zth measur ements (PCB FR4 area= 41mm x 48mm, PCB thick ness=2m m , Cu thickness=35µm, Copper areas: 0.5cm

Vs PCB copper area in open box free air condition

RTH j-amb (°C/W)

70

2

, 6cm2).

65

60

55

50

45

40

01234567

PCB Cu heatsink area ( cm ^ 2)

15/19

VND830

SO-16L Ther mal Impedance Junction Ambient Single Puls e

ZTH (°C/W)

1000

100

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s)

Thermal fitting model of a double channel HSD in SO-16L

Pulse calculation formula

Z

THδ

where

R

δ tpT⁄=

TH

δ Z

THtp

2

0.5 cm

2

6 cm

1 δ–()+⋅=

Tj_1

Tj_2

16/19

Pd1

C1

C1 C2

R1

Pd2

Thermal Parameter

Area/island (cm2)0.56

C3 C4

R3R1 R6R5R2

R2

T_amb

C5 C6C2

R4

R1 (°C/W) 0.15 R2 (°C/W) 0.8 R3 ( °C/W) 2.2 R4 (°C/W) 12 R5 (°C/W) 15 R6 (°C/W) 37 22 C1 (W.s/°C) 0.0006 C2 (W.s/°C) 2.10E-03 C3 (W.s/°C) 1.50E-02 C4 (W.s/°C) 0.14 C5 (W.s/°C) 1 C6 (W.s/°C) 3 5

SO-16L MECHANICAL DATA

VND830

DIM.

A 2.65 0.104 a1 0.1 0.2 0.004 0.008 a2 2.45 0.096

b 0.35 0.49 0.014 0.019

b1 0.23 0.32 0.009 0.012

C 0.5 0.020 c1 45° (typ.)

D 10.1 10.5 0.397 0.413

E 10.0 10.65 0.393 0.41 9

e 1.27 0.050

e3 8.89 0.350

F 7.4 7.6 0.291 0.300 L 0.5 1.27 0.020 0.050

M 0.75 0.029

S8° (max.)

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

17/19

1

VND830

SO-16L TUBE SHIPMENT (no suffix)

Base Q.ty 50 Bulk Q.ty 1000

C

B

Tube length (± 0.5) 532

A 3.5 B 13.8 C (± 0.1) 0.6

All dimensions are in mm.

A

TAPE AND REEL SHIPMENT (suf fix “13TR”)

REEL DIMENSIONS

Base Q.ty 1000 Bulk Q.ty 1000 A (max) 330 B (min) 1.5 C (± 0.2) 13

F 20.2 G (+ 2 / -0) 16.4 N (min) 60 T (max) 22.4

TAPE DIMENSIONS

According to Electronic Industries Associat ion (EIA) S tandard 481 rev. A, Feb 1986

Tape width W 16 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 12 Hole Diameter D (± 0.1/-0 ) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 7.5 Compartment Depth K (max) 6.5 Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

18/19

Top

cover

tape

End

500mm min

Empty components pockets saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

1

VND830

Information furnished is believed to be accurate and r eliable. Ho wev er, STMicroelectr onics assume s no r es ponsibility for the consequenc es of use of such information nor for any infringement of patents or other rights of third parties which may results from its use. No license is granted by implication or otherwise under a ny patent or patent rights of STMicroelectronics. Specif ic ations mentioned in this publication are subject to c hange withou t notice. This publication supersed es and replace s all information previous ly s upplied. ST M icroelect r on ics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.

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19/19

SGS Thomson Microelectronics VND83013TR, VND830 Datasheet

Specifications and Main Features

Frequently Asked Questions

User Manual