SGS Thomson Microelectronics VND7NV04-1, VND7NV04, VNS7NV04, VNN7NV04 Datasheet

®
VNN7NV04 / VNS7NV04
/ VND7NV 04 / VND7NV0 4-1
“OMNIFET II”:
FULLY AUTOPROTECTED POW ER M OSFET
TYPE R
VNN7NV04 VNS7NV04 VND7NV04 VND7NV04-1
LINEAR CURRENT LIMITATION
n
THERMAL SHUT DOWN
n
SHORT CIRCUIT PROTECTION
n
INTEGRATED CLAMP
n
LOW CURRENT DRAWN FRO M INPUT PIN
n
DIAGNOSTIC FEEDBACK THROUGH INPUT
DS(on)
60 m 6 A 40 V
I
lim
V
clamp
PIN
n
ESD PROTECTION
n
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
COMPATIBLE WITH STANDARD POWER
MOSFET
DESCRIPTION
The VNN7NV04, VNS7NV04, VND7NV04 VND7NV04-1, are mon ol ithi c devic es desi g ned in STMicroelectronics VIPower M0-3 Technology, intended for replacement of standard Power
BLOCK DIAGRAM
2
3
2
1
SOT-223
3
1
TO25 2 (D PAK)
SO-8
TO251 (IPAK)
3
2
1
ORDER CODES
PACKAGE TUBE T&R
SOT-223 VNN7NV04 VNN7NV0413TR
SO-8 VNS7NV04 VNS7NV0413TR
TO-252 (DPAK) VND7NV04 VND7NV0413TR TO-251 (IP AK) VND7NV04-1
-
MOSFETS from DC up to 50KHz applications. Built in thermal shutdown, l inear curren t limitation and overvoltage cla mp protects the chip in harsh environments. Fault feedback can be de tected by mon itori ng the voltage at the input pin.
DRAIN
2
Overvoltage
Clamp
INPUT
1
Februa ry 2003 1/29
Gate
Control
Over
T emperature
Linear
Current
Limiter
3
SOURCE
FC01000
1
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
ABSOLUTE MAXIMUM RATI NG
Symbol Parameter
Drain-source Voltage (VIN=0V) Intern ally Clamped V Input Voltage Internally Clamped V
IN
Input Current +/-20 mA Minimum I nput Series Impedance 150 Drain Current Internally Limited A Reverse DC Output Current -10.5 A Electros tatic Discharge (R=1.5K, C=100pF) 4000 V Electros tatic Discharge on output pin only
(R=330, C=150pF) Total Dissipation at Tc=25°C 7 4.6 60 W
tot
Maximum Switching Energy (L=0.7mH; RL=0; V
=13.5V; T
bat
=150ºC; IL=9A)
jstart
Maximum Switching Energy (L=0.6mH; RL=0; V
Operating Junction Temperature Internally limited °C
j
Case Operating Temperature Internally limit ed °C
c
=13.5V; T
bat
=150ºC; IL=9A)
jstart
Storage Temperatu re -55 to 150 °C
R
V V
E
E
V
DS
V
I
IN
IN MIN
I
D
I
R
ESD1
ESD2
P
MAX
MAX
T
T
T
stg
CONNECTION DIAGRAM (TO P VI EW)
SOT-223 SO-8 DPAK/IPAK
Value
Unit
16500 V
40 40 mJ
37 mJ
SOURCE SOURCE SOURCE INPUT
1
4
SO-8 Package (*)
(*) For the pins configuration related to SOT-223, DPAK, IPAK see outlines at page 1.
CURRENT AND VOLTAGE CONVEN TIO NS
R
I
IN
V
IN
IN
INPUT
8
5
DRAIN
SOURCE
DRAIN DRAIN DRAIN DRAIN
I
D
V
DS
2/29
1
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
THERMAL DATA
Symbol Parameter
R
thj-case
R
thj-lead
R
thj-amb
(*) When mounted on a standard single-sided FR4 board with 0.5cm
Thermal R esistance Junction-case}} } MAX 18 2.1 2.1 °C/W
Thermal R esistance Junction-lead MAX 27 °C/W Ther ma l R esistan ce J u nction-ambient MAX 96 (*) 90 (*) 65 (*) 102 °C/W
SOT-223 SO-8 DPAK IPAK
2
of Cu (at least 35 µm thick) connected to all DRAIN pins.
ELECTRICAL CHARACTERISTICS (-40°C < Tj < 150°C, unless otherwise specified) OFF
Symbol Parameter Test Conditions Min Typ Max Unit
V
CLAMP
V
CLTH
V
INTH
I
ISS
V
INCL
I
DSS
Drain-source Clamp Voltage
Drain-source Clamp Threshold Voltage
Input Thre shold Voltage VDS=VIN; ID=1mA 0. 5 2.5 V Supply Current from Input
Pin Input-Source Clamp
Voltage Zero Input Voltage Drain
Current (VIN=0V)
VIN=0V; ID=3.5A 40 45 55 V
VIN=0V; ID=2mA 36 V
=0V; VIN=5V 100 150 µA
V
DS
I
=1mA
IN
I
=-1mA
IN
V
=13V; VIN=0V; Tj=25°C
DS
V
=25V; VIN=0V
DS
Value
6
-1.0
6.8 8
-0.3 30 75
Unit
V
µA
ON
Symbol Parameter Test Conditions Min Typ Max Unit
V
R
DS(on)
Static Drain-source On Resistance
=5V; ID=3.5A; Tj=25°C
IN
V
=5V; ID=3.5A
IN
60
120
m
3/29
1
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
ELECTRICAL CHARACTERISTICS (continued) (Tj=25°C, unless otherwise specified)
DYNAMIC
Symbol Parameter Test Conditions Min Typ Max Unit
gfs (*) C
OSS
SWITCHING
Symbol Parameter Test Conditi ons Min Typ Max Unit
t
d(on)
t
t
d(off)
t
t
d(on)
t
t
d(off)
t
(dI/dt)
Q
Forward Transconductanc e
VDD=13V; ID=3.5A 9 S
Output Capacitance VDS=13V; f=1MHz; VIN=0V 220 pF
Turn-on Delay Time Rise Time 470 1500 ns
r
Turn-off Delay Time 500 1500 ns Fall Time 350 1000 ns
f
Turn-on Delay Time Rise Time 4.6 14.0 µs
r
Turn-off Delay Time 5.4 16.0 µs Fall Time 3.6 11.0 µs
f
Turn-on Current Slope
on
Total Input Charge
i
=15V; ID=3.5A
V
DD
V
=5V; R
gen
gen=RIN MIN
(see figure 1)
=15V; ID=3.5A
V
DD
V
gen
=5V; R
gen
=2.2K
(see figure 1)
=15V; ID=3.5A
V
DD
V
=5V; R V I
gen DD
gen
gen=RIN MIN
=12V; ID=3.5A; VIN=5V
=2.13m A (see figure 5)
=150
=150
100 300 ns
0.75 2.3 µs
6.5 A/µs
18 nC
SOURCE DRAIN DIODE
Symbol Parameter Test Conditions M in Typ Max Uni t
(*) Forward On Voltage ISD=3.5A; VIN=0V 0.8 V
V
SD
Q
I
RRM
t
Reverse Recovery Time ISD=3.5A; dI/dt=20A/µs
rr
Reverse Recovery Charge 0.28 µC
rr
Reverse Recovery Current 2.5 A
V
=30V; L= 20 0 µ H
DD
(see test circuit, figure 2)
220 ns
PROTECTIONS (-40°C < Tj < 150°C, unless otherwise specified)
Symbol Parameter Test Conditions M in Typ Max Uni t
I
lim
t
dlim
T
T
I
E
(*) Pulsed: Pu ls e duration = 300µs, duty c y c le 1.5%
Drain Current Limit VIN=5V; VDS=13V 6 9 12 A
=5V; VDS=13V
Step Response Current Limit
Overtemperature
jsh
Shutdown
Overtemperature Reset 135 °C
jrs
Fault Sink Current VIN= 5V; VDS=13V; Tj=T
gf
Sing l e Pu lse
as
Avala nche Energy
V
IN
starti ng T V
IN
=25°C; VDD=24V
j
=5V; R
gen=RIN MIN
(see figures 3 & 4)
jsh
=150Ω; L=24mH
4.0 µs
150 175 200 °C
15 mA
200 mJ
4/29
2
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
PROTECTION FEATURES
During normal operation, the INPUT pin is electrically connected to the gate of the internal power MOSFET through a low impedance path.
The device then behaves like a standard power MOSFET and can be used as a switch from DC to
50KHz. The only difference from the user’s standpoint is that a small DC current I 100µA) flows into the INPUT pin in order to supply
ISS
(typ.
the internal circuitry. The de vice integrates:
- OVERVOLTAGE CLAMP PROTECTION: internally set at 45V, along with the rugged avalanche characteristics o f the Power MOSFET stage giv e this device unrivall ed ruggedne ss and energy handl ing capability. This feat ure is mainly important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT: limits the drain current ID to I voltage. When the current limiter is active, the
whatever the INPUT pin
lim
device operates in the linear region, so power dissipation may exceed the capability of the heatsink. Both case and junction temperatures increase, and if this phase lasts long enough, junction temperature may reach the overtemperature threshold T
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUI T PROTECTION: these are based on sensing the chip temperature and are not dependent on the input voltage. The location of the sensi ng eleme nt on the chip in the power st age ar ea ensures f ast, accurate detection of the junction temperature. Overtemperatur e cut-out occurs i n the range 1 50 to 190 °C, a typical value being 170 °C. The device is automatically restarted when the chip temperature fa lls of about 15°C be low shut-d own temperature.
- STATUS FEEDBACK: in the case of an overtemperature fault condition (Tj > T device tries to sink a diagnostic current Igf thro ug h
jsh
), the
the INPUT pin in order to indicate fault condition. If driven from a l ow impedance sou rce, this curre nt may be used in orde r to warn the contr ol circ uit of a device shut down. If the drive impeda nc e is h i gh enough so that the INPUT pin dri ver is not abl e to supply the current Igf, the INPUT pin will fall to 0V.
This will not however affect the device operation: no requirement is put on the current capability of t he IN PUT pin dr ive r e xcep t t o b e able to supply the normal operation drive current I
ISS
.
Additional features of this device are ESD protection according to the Human Body model and the ability to be driven from a TTL Logic circuit.
5/29
1
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
Figure 1: Switching Time Test Circuit for Resistive Load
V
gen
I
D
90%
V
D
R
gen
t
r
t
V
gen
d(on) t
10%
Figure 2: Test Circuit for Diode Recovery Times
A
D
I
OMNIFET
S
150
B
R
gen
FAST DIODE
d(off)
I
t
f
A
B
OMNIFET
L=100uH
D
t
t
V
DD
6/29
1
V
gen
S
8.5
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
Figure 3: Unclamped Inductive Load Test Circuits
R
V
IN
P
GEN
W
Figur e 5: Input Charge Test Circuit
V
IN
Figure 4: Unclamped Inductive Waveforms
7/29
1
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
Source-Drain Diode Forward Characteristics
Vsd (mV)
1000
950
900
850
800
750
700
650
600
550 500
Vin=0V
0 2 4 6 8 101214
Id(A)
Derating Curve
Static Drain-Source On resistance Vs. Input Voltage
Rds(on) (mOhm)
140
120
Tj=150ºC
100
80
Tj=25ºC
60
Tj=-40ºC
40
20
0
3 3.5 4 4.5 5 5.5 6 6.5
Vin(V)
Id=6A Id=1A
Id=6A Id=1A
Id=6A Id=1A
Static Drain Source On Resistance
Rds(on) (mOhm)
500
450
400
350
300
250
200
150
100
50
0
0 0.25 0.5 0.75 1 1.25
Tj= - 40ºC
Vin=2.5V
Tj=25ºC
Tj=150ºC
Id(A)
Static Drain-Source On resistance Vs. Input Voltage
Rds(on) (mOhm)
120 110 100
90 80 70 60 50 40 30 20 10
0
33.544.555.566.57
Id=3.5A
Tj=150ºC
Tj=25ºC
Tj= - 40ºC
Vin(V)
Transconductance
Gfs (S)
20
18
16
14
12
10
8
6
4
2 0
Vds=13V
Tj=-40ºC Tj=25ºC
Tj=150ºC
012345678
Id(A)
8/29
1
1
VNN7NV04 / VNS7NV04 / VND7NV04 / VND7NV04-1
Static Drain-Source On Resistance Vs. Id
Rds(on) (mOhm)
140
120
100
80
60
40
20
0
00.511.522.533.544.555.56
Tj=150ºC
Tj=25ºC
Tj=-40ºC
Vin=3.5V
Vin=5V
Vin=3.5V
Vin=5V Vin=3.5V
Vin=5V
Id(A)
Turn On Current Slope
di/dt(A/us)
8
7
6
5
4
3
2
1
0
100
200
300
400
500
Rg(ohm)
600
Vin=5V
Vdd=15V
Id=3.5A
700
800
900
1000
1100
Transfer Characteristics
Idon(A)
10
9
8
7
6
5
4
3
2
0
Vds=13.5V
1
1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Vin(V)
Turn On Current Slope
di/dt(A/us)
2.25
2
1.75
1.5
1.25
1
0.75
0.5
0.25 100 200 300 400 500 600 700 800 900 1000 1100
Rg(ohm)
Vin=3.5V Vdd=15V
Id=3.5A
Tj=25ºC Tj=-40ºC Tj=150ºC
Input Voltage Vs. Input Charge
Vin(V)
8
7
6
5
4
3
2
1
0
0 5 10 15 20 25
Vds=12V
Id=3.5A
Qg(nC)
1
Turn off drain source voltage slope
dv/dt(V/us)
300
250
200
150
100
50
0
100 200 300 400 500 600 700 800 900 1000 1100
Rg(ohm)
Vin=5V
Vdd=15V
Id=3.5A
9/29
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