SGS Thomson Microelectronics VNS1NV04, VNN1NV04, VND1NV04 Datasheet
®
VND1NV04
/ VNN1 NV04 / VNS1NV04
“OMNIFET II”:
FULLY AUTOPROTECTED POW ER M OSF ET
TYPE R
VND1NV04
VNN1NV04
VNS1NV04
n
LINEAR CURRENT LIMITATION
n
THERMAL SHUT DOWN
n
SHORT CIRCUIT PROTECTION
n
INTEGRATED CLAMP
n
LOW CURRENT DRAWN FRO M INPUT PIN
n
DIAGNOSTIC FEEDBACK THROUGH INPUT
DS(on)
250 mΩ 1.7 A 40 V
I
lim
V
clamp
PIN
n
ESD PROTECTION
n
DIRECT ACCESS TO THE GATE OF THE
POWER MOSFET (ANALOG DRIVING)
n
COMPATIBLE WITH STANDARD POWER
MOSFET
DESCRIPTION
The VND1NV04, VNN1NV04, VNS1NV04 are
monolithic devices designed in
STMicroelectronics VIPower M0-3 Technology,
intended for replacement of standard Power
BLOCK DIAGRAM
2
3
2
1
SOT-223 SO-8
3
1
TO-252 (DPAK)
ORDER CODES:
TO-252 (D PAK)
SOT-223
SO-8
VND1NV04
VNN1NV04
VNS1NV04
MOSFETS from DC up to 50KHz applications.
Built in therm al s hutdown, li ne ar cur ren t limi tation
and overvol tage clamp protect the chip in harsh
environments.
Fault feedback can be detected by monitoring the
voltage at the input pin.
DRAIN
2
Overvoltage
Clamp
INPUT
1
Februa ry 2003 1/18
Gate
Control
Over
Temperature
Linear
Current
Limiter
3
SOURCE
FC01000
VND1NV04 / VNN1NV04 / VNS1NV04
ABSOLUTE MAXIMUM RATI NG
Symbol Parameter
V
DS
V
I
IN
R
IN MIN
I
D
I
R
V
ESD1
V
ESD2
P
T
T
T
stg
CONNECTION DIAGRAM (TO P VI EW)
Drain-source Voltage (VIN=0V) Internally Clamped V
Input Voltage Internally Clamped V
IN
Input Current +/-20 mA
Minimum I nput Series Impedance 330 Ω
Drain Current Internally Limited A
Reverse DC Output Current -3 A
Electros tatic Discharge (R=1.5KΩ, C=100pF) 4000 V
Electros tatic Discharge on output pin only
(R=330Ω, C=150pF)
Total Dissipation at Tc=25°C 7 8.3 35 W
tot
Operating Junction Temperature Internal ly limite d °C
j
Case Operating Temperature Internally limite d °C
c
Storage Temperature -55 to 150 °C
SOT-223 SO-8 DPAK
SO-8 Pack ag e (*)
Value
Unit
16500 V
SOURCE
1
SOURCE
SOURCE
INPUT
(*) For the pins configuration related to SOT-223 and DPAK see outline at page 1.
4
CURRENT AND VOLTAGE CONVENTIONS
I
IN
R
IN
INPUT
V
IN
8
5
DRAIN
SOURCE
DRAIN
DRAIN
DRAIN
DRAIN
I
D
V
DS
2/18
VND1NV04 / VNN1NV04 / VNS1NV04
THERMAL DATA
Symbol Parameter
R
thj-case
R
thj-lead
R
thj-amb
(*) When mounte d on a s tandard single-sided FR4 board with 50mm
Thermal R esistance Junction-case}} } MAX 18 3.5 °C/W
Thermal R esistance Junction-lead MAX 15 °C/W
Thermal Resistance Junction-ambient MAX 70 (*) 65(*) 54 (*) °C/W
2
of Cu (at leas t 35 µm thick) connected to all DRAIN pins.
SOT-223 SO-8 DPAK
ELECTRICAL CHARACTERISTICS (-40°C < Tj < 150°C, unless otherwise specified)
OFF
Symbol Parameter Test Conditions Min Typ Max Unit
V
CLAMP
V
V
I
V
I
CLTH
INTH
ISS
INCL
DSS
Drain-source Clamp
Voltage
Drain-source Clamp
Threshold Voltage
Input Thre shold Voltage VDS=VIN; ID=1mA 0. 5 2.5 V
Supply Current from Input
Pin
Input-Source Clamp
Voltage
Zero Input Voltage Drain
Current (VIN=0V)
V
=0V; ID=0.5A 40 45 55 V
IN
VIN=0V; ID=2mA 36 V
VDS=0V; VIN=5V 100 150 µA
IIN=1mA
I
=-1mA
IN
=13V; VIN=0V; Tj=25°C
V
DS
V
=25V; VIN=0V
DS
Value
6
-1.0
6.8 8
-0.3
30
75
Unit
V
µA
ON
Symbol Parameter Test Conditions Min Typ Max Unit
R
DS(on)
Static Drain-source On
Resistance
=5V; ID=0.5A; Tj=25°C
V
IN
V
=5V; ID=0.5A
IN
250
500
mΩ
3/18
1
VND1NV04 / VNN1NV04 / VNS1NV04
ELECTRICAL CHARACTERISTICS (continued) (Tj=25°C, unless otherwise specified)
DYNAMIC
Symbol Parameter Tes t Conditions Min Typ Max Unit
gfs (**)
C
OSS
SWITCHING
Symbol P arameter Test Co nditions Min Typ M ax Unit
t
d(on)
t
t
d(off)
t
t
d(on)
t
t
d(off)
t
(dI/dt)
Q
Forward
Transconductance
VDD=13V; ID=0.5A 2 S
Output Capacitance VDS=13V; f=1MHz; VIN=0V 90 pF
Turn-on Delay Time
Rise Time 170 500 ns
r
Turn-off Delay Time 350 1000 ns
Fall Time 200 600 ns
f
Turn-on Delay Time
Rise Time 1.3 4.0 µs
r
Turn-off Delay Time 1.8 5.5 µs
Fall Time 1.2 4.0 µs
f
Turn-on Current Slope
on
Total Input Charge
i
=15V; ID=0.5A
V
DD
V
=5V; R
gen
gen=RIN MIN
(see figure 1)
=15V; ID=0.5A
V
DD
V
gen
=5V; R
gen
=2.2K Ω
(see figure 1)
=15V; ID=1.5A
V
DD
V
=5V; R
V
I
gen
DD
gen
gen=RIN MIN
=12V; ID=0.5A; VIN=5V
=2.13m A (see figure 5)
=330Ω
=330Ω
70 200 ns
0.25 1.0 µs
5.0 A/µs
5.0 nC
SOURCE DRAIN DIODE
Symbol Parameter Test Condit ions Min Typ Max Unit
(*) Forward On Vol tage ISD=0.5A; VIN=0V 0.8 V
V
SD
Q
I
RRM
t
Reverse Recovery Time ISD=0.5A; dI/dt=6A/µs
rr
Reverse Recovery Charge 100 µC
rr
Reverse Recovery Current 0.75 A
V
=30V; L= 20 0 µ H
DD
(see test circuit, figure 2)
205 ns
PROTECTIONS (-40°C < Tj < 150°C, unless otherwise specified)
Symbol Parameter Test Condit ions Min Typ Max Unit
I
lim
t
dlim
T
T
I
E
(**) Pulsed: Pulse duration = 300µs, duty cycle 1.5%
Drain Current Limit VIN=5V; VDS=13V 1.7 3.5 A
=5V; VDS=13V
Step Response Current
Limit
Overtemperature
jsh
Shutdown
Overtemperature Reset 135 °C
jrs
Fault Sink Current VIN=5V; VDS=13V; Tj=T
gf
Sing l e Pu lse
as
Avala nche Ener gy
V
IN
Starting T
V
IN
=25°C; VDD=24V
j
=5V; R
gen=RIN MIN
(see figures 3 & 4)
jsh
=330Ω; L=50mH
2.0 µs
150 175 200 °C
10 15 20 mA
55 mJ
4/18
2
VND1NV04 / VNN1NV04 / VNS1NV04
PROTECTION FEATURES
During normal operation, the INPUT pin is
electrically connected to the gate of the internal
power MOSFET through a low impedance path.
The device then behaves like a standard power
MOSFET and can be used as a switch from DC up
to 50KHz. The only difference from the user’s
standpoint is that a small DC current I
100µA) flows into the INPUT pin in order to supply
ISS
(typ.
the internal circuitry.
The de vice i ntegrates:
- OVERVOLTAGE CLAMP PROTECTION:
internally set at 45V, along with the rugged
avalanche characteristics o f the Power MOSFET
stage giv e this device unrivall ed ruggedne ss and
energy handl ing capability. This feat ure is mainly
important when driving inductive loads.
- LINEAR CURRENT LIMITER CIRCUIT:
limits the drain current ID to I
INPUT pin voltages. When the current limiter is
whatever the
lim
active, the device operates in the linear region, so
power dissipation may exceed the capability of the
heatsink. Both case and junction temperatures
increase, and if this phase lasts long enough,
junction temperature may reach the
overtemperature threshold T
jsh
.
- OVERTEMPERATURE AND SHORT CIRCUIT
PROTECTION:
these are based on sensing the chip t emperatur e
and are not dependen t on the input voltage. The
location o f t he s ensing el emen t on the c h ip i n t he
power stage area ensures fast, accurate detection
of the junction temperature. Overtemperature
cutout occurs in the range 150 to 190 °C, a typical
value being 170 °C. The device is auto matically
restarted when the chip temp eratu re fall s of about
15°C below shut-down temperature.
- STATUS FEEDBACK:
in the case of an overtem perature fault cond ition
(Tj > T
current Igf through the INPUT pin in order to
), the device tries to sink a diagnostic
jsh
indicate fault condition. If driven from a low
impedance source, this current may be used in
order to warn the control circuit of a device
shutdown. If the drive imped ance is high enough
so that the INPUT p in dri ver is no t abl e to su pply
the current Igf, the INPUT pin will fall to 0V. This
will not however affect the device operation:
no requirement is put on the current capability
of the INPUT pin driver except to be able to
supply the normal operation drive current I
ISS
Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit.
.
5/18
VND1NV04 / VNN1NV04 / VNS1NV04
Figure 1: Switching Time Test Circuit for Resistive Load
I
D
90%
V
D
R
gen
V
gen
t
r
t
V
gen
d(on) t
10%
Figure 2: Test Circuit for Diode Recovery Times
A
D
I
OMNIFET
S
330Ω
B
R
gen
FAST
DIODE
d(off)
I
t
f
A
B
OMNIFET
L=100uH
D
t
t
V
DD
6/18
V
gen
S
8.5 Ω
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