SGS Thomson Microelectronics VNV35N07, VNP35N07FI, VNB35N07 Datasheet

VNP35N07FI



FULLY AUTOPROTECTED POWER MOSFET

TYPE V

VNP35N07FI
VNB35N07
VNV35N07

■ LINEAR CURRENT LIMITATION

■ THERMALSHUTDOWN

■ SHORT CIRCUIT PROTECTION

■ INTEGRATEDCLAMP

■ LOW CURRENT DRAWN FROM INPUT PIN

■ DIAGNOSTICFEEDBACKTHROUGH INPUT

clamp

70 V
70 V
70 V

PIN

■ ESD PROTECTION

■ DIRECT ACCESS TO THE GATE OF THE

POWERMOSFET(ANALOGDRIVING)

■ COMPATIBLEWITHSTANDARD POWER

MOSFET

DESCRIPTION

The VNP35N07FI, VNB35N07 and VNV35N07
are monolithic devices made using
STMicroelectronics VIPower M0 Technology,
intended for replacement of standard power
MOSFETS in DC to 50 KHz applications. Built-in
thermal shut-down, linear current limitation and
overvoltage clamp protect the chip in harsh

R

DS(on)

0.028 Ω

0.028 Ω

0.028 Ω

I

lim

35 A
35 A
35 A

VNB35N07/VNV35N07

”OMNIFET”:

ISOWATT220

3

1

D2PAK
TO-263

enviroments.
Faultfeedback can be detected by monitoring the

voltageat the input pin.

3

2

1

10

1

PowerSO-10

BLOCK DIAGRAM (∗)

(∗) PowerSO-10 PinConfiguration : INPUT = 6,7,8,9,10; SOURCE = 1,2,4,5; DRAIN = TAB

June 1998

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VNP35N07FI-VNB35N07-VNV35N07

ABSOLUTEMAXIMUMRATING

Symbol Parameter Value Unit

V

V

V

P

T

Drain-source Voltage (Vin= 0 ) Int er nall y Clamped V

DS

Input Voltage 18 V

in

I

Drain Current Internally Limited A

D

I

Reverse DC Output Current -50 A

R

Elect r o st at ic Disc harge (C= 100 pF , R=1 . 5 KΩ) 2000 V

esd

Tot al Dissipat ion at Tc=25oC 125 40 W

tot

T

Oper at i ng Junct ion Temper at ure Internally Limited

j

T

Case Operating Temperature Internally Limited

c

St orage Temperature -55 t o 150

stg

THERMAL DATA

R

thj-case

R

thj-amb

Ther mal Resist an ce Juncti on-c ase Max
Ther mal Resist an ce Juncti on-am b ient Max

Po w erSO-10

D2PAK

IS O WATT220 PowerSO -10 D2PA K

3.12

62.5

ISOWATT220

1

50

1

62.5

o
o

o

C

o

C

o

C

C/W
C/W

ELECTRICAL CHARACTERISTICS (T

=25oC unlessotherwise specified)

case

OFF

Symbol Parameter Test Condition s Min. Typ. Max. Unit

V

CLAMP

Drain-source Clamp

ID= 200 mA Vin= 0 60 70 80 V

Volt age

V

CLTH

Drain-source Clamp

ID=2mA Vin=0 55 V

Thr eshold Vol ta ge

V

INCL

Input-Source Reverse

Iin=-1mA -1 -0.3 V

Clamp Voltage

I

I

DSS

ISS

Zer o I npu t V olt ag e
Drain Current (V

in

Supply Current from

V

=13V Vin=0

=0)

DS

=25V Vin=0

V

DS

VDS=0V Vin= 10 V 250 5 00 µA

50

200

Input Pin

ON (∗)

Symbol Parameter Test Condition s Min. Typ. Max. Unit

V

IN(th)

Input Thres hold

VDS=VinID+Iin=1mA 0.8 3 V

Volt age

R

DS(on)

St at ic D r ain-source On
Resistance

Vin=10V ID=18A

=5V ID=18A

V

in

0.028

0.035ΩΩ

DYNAMIC

µA
µA

Symbol Parameter Test Condition s Min. Typ. Max. Unit

g

(∗)Forward

fs

VDS=13V ID=18A 20 25 S

Tr ansc on ductance

C

Out put Capacit anc e VDS=13V f=1MHz Vin= 0 980 1400 pF

oss

2/13

VNP35N07FI-VNB35N07-VNV35N07

ELECTRICAL CHARACTERISTICS (continued)
SWITCHING(∗∗)

Symbol Parameter Test Condition s Min. Typ. Max. Unit

t

d(on)

t

d(off)

t

d(on)

t

d(off)

(di/dt)

Q

Turn-on Delay Time

t

Rise Time

r

Turn-off Delay Time

t

Fall T ime

f

Turn-on Delay Time
Rise Time

t

r

Turn-off Delay Time

t

Fall T ime

f

Tur n-on Current Slope VDD=28V ID=18A

on

Total Input Charge VDD=12V ID=18A Vin= 10 V 100 nC

i

VDD=28V Id=18A

=10V R

V

gen

gen

=10Ω

(see figure 3)

VDD=28V Id=18A
V

=10V R

gen

= 1000 Ω

gen

(see figure 3)

=10V R

V

in

gen

=10Ω

SOURCE DRAIN DIODE

Symbol Parameter Test Condition s Min. Typ. Max. Unit

V

(∗)ForwardOnVoltage ISD=18A Vin=0 1.6 V

SD

Q

I

RRM

t

(∗∗)

rr

Reverse Re covery
Time
Reverse Re covery

(∗∗)

rr

Charge

(∗∗)

Reverse Re covery
Current

I

= 18 A di/ dt = 10 0 A/µs

SD

V

=30V Tj=25oC

DD

(see test cir cuit, figure 5)

100
350
650
200

500

2.7
10

4.3

200
600

1000

350
800

4.2
16

6.5

60 A/µs

250

1
8

ns
ns
ns
ns

ns

µs
µs
µs

ns

µC

A

PROTECTION

Symbol Parameter Test Condition s Min. Typ. Max. Unit

t

T

I

dlim

jsh

Drain Current Limit Vin=10V VDS=13V

lim

(∗∗) S tep Respon se

Current Lim it

=5V VDS=13V

V

in

Vin=10V

=5V

V

in

(∗∗) Overtemperatu re

Shut dow n

(∗∗) Ov ert emperatu r e Reset 135

T

jrs

I

(∗∗) Fault Sink Current Vin=10V VDS=13V

gf

E

(∗∗) S i ngle Pulse

as

Avalanche Energy

(∗) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
(∗∗) Parameters guaranteed by design/characterization

=5V VDS=13V

V

in

starting Tj=25oCVDD=20V

=10V R

V

in

=1KΩ L=10mH

gen

25
25

35
35

35
70

45
45

60

140

150

50
20

2.5 J

A
A

µs
µs

o

C

o

C

mA
mA

3/13

VNP35N07FI-VNB35N07-VNV35N07

PROTECTION FEATURES

During normal operation, the Input pin is
electrically connected to the gate of the internal
power MOSFET. The device then behaves like a
standard power MOSFET and can be used as a
switch from DC to 50 KHz. The only difference
from the user’s standpoint is that a small DC
current (I

) flows into the Input pin in order to

iss

supplythe internalcircuitry.
The device integrates:

- OVERVOLTAGE CLAMP PROTECTION:

internally set at 70V, along with the rugged
avalanche characteristics of the Power
MOSFET stage give this device unrivalled
ruggedness and energy handling capability.
This feature is mainly important when driving
inductiveloads.

- LINEAR CURRENT LIMITER CIRCUIT: limits

the drain current Id to Ilim whatever the Input
pin voltage. When the current limiter is active,
the device operates in the linear region, so
power dissipation may exceed the capabilityof
the heatsink. Both case and junction
temperatures increase, and if this phase lasts
long enough, junction temperature may reach
the overtemperaturethreshold T

jsh

.

- OVERTEMPERATURE AND SHORT CIRCUIT

PROTECTION: these are based on sensing
the chip temperatureand are not dependent on
the input voltage. The location of the sensing
element on the chip in the power stage area
ensures fast, accurate detection of the junction
temperature. Overtemperaturecutout occurs at
minimum 150
restarted when the chip temperature falls
below135

o

C. The device is automatically

o

C.

- STATUS FEEDBACK: In the case of an

overtemperature fault condition, a Status
Feedback is provided through the Input pin.
The internal protection circuit disconnects the
input from the gate and connects it instead to
ground via an equivalent resistance of 100 Ω.
The failure can be detected by monitoring the
voltage at the Input pin, which will be close to
ground potential.

Additional features of this device are ESD
protection according to the Human Body model
and the ability to be driven from a TTL Logic
circuit (witha small increasein R

DS(on)

).

4/13