SGS Thomson Microelectronics VIPER50BSP, VIPER50B Datasheet

VIPer50B



TYPE V

DSS

I

R

n

DS(on)

VIPer50B/B SP 400 V 3 A 2.2 Ω

FEATURE

■ ADJUSTABLE SWITCHING FREQUENCYUP

TO200KHZ

■ CURRENT MODE CONTROL

■ SOFTSTART AND SHUT DOWN CONTROL

■ AUTOMATIC BURSTMODE OPERATIONIN

STAND-BY CONDITIONABLE TO MEET
”BLUE ANGEL” NORM (<1W TOTAL POWER
CONSUMPTION)

■ INTERNALLY TRIMMEDZENER

REFERENCE

■ UNDERVOLTAGE LOCK-OUT WITH

HYSTERESIS

■ INTEGRATED START-UPSUPPLY

■ AVALANCHERUGGED

■ OVERTEMPERATUREPROTECTION

■ LOW STAND-BYCURRENT

■ ADJUSTABLE CURRENT LIMITATION

VIPer50BSP

SMPS PRIMARY I.C.

TARGET DATA

10

PENTAWATT HV PENTAWATT HV

PowerSO-10

DESCRIPTION

VIPer50B made using VIPower M0 Technology
combines on the same silicon chip a
state-of-the-art PWM circuit together with an
optimized high voltage avalanche rugged Vertical
Power MOSFET (400 V / 3 A). Typical
applications cover off line power supplies with a
secondarypower capability of 50W in a USmains
lines configuration. It is compatible from both
primary or secondary regulation loop despite
using around 50% less components when
compared with a discrete solution. Burst mode
operation is an additional feature of this device,
offering the possibility to operate in stand-by
mode withoutextra components.

1

(022Y)

BLOCK DIAGRAM

VDD

December 1999

13 V

+

ERROR

AMPLIFIER_

LOGIC

0.5V

UVLO

ON/OFF

+
_

4.5V

SECURITY

LATCH

FF

R/SSQ

OVERTEMP.

DETECTOR

1.7 µ s
DELAY

OSC

OSCILLATOR

PWM

LATCH

S

R1

FF

R2 R3

COMP

Q

250 ns

BLANKING

0.5V
+

+
_

_

1 V/A

CURRENT

AMPLIFIER

DRAIN

SOURCE

B

1

9

2

0

0
C

F

1/20

VIPER50B/BSP

ABSOLUTEMAXIMUM RATING

Symb o l Para met er Val u e Uni t

V

I

V

V

OSC

V

COMP

I

COMP

V

I

D(AR)

P

T

T

THERMALDATA

R

thj-case

R

thj-a mb.

(*) When mounted using the minimum recommended pad size on FR-4 board.

Continuous D r ai n-S ource Volta ge (T j = 25 t o 125oC) -0.3 to 400 V

DS

Maximum Current Inte rnally Limited A

D

Supply Volt age 0 to 15 V

DD

Volt age Range Input 0 to V

DD

Volt age Range Input 0 to 5 V
Maximum Continuous Curre nt ±2mA
Elect r o st at ic disc harge (R = 1. 5 KΩ C = 100pF )

esd

4000 V

Avalanche D r ain-Source Curre nt , Repetitive or N ot -Repetit ive

=100oC, Pulse Width Limited by TJmax, δ <1%)

(T

C

Power Dissipation at Tc = 25oC60W

tot

Junction O per ating Tem pe r at ure Int ernally Li m it ed

j

St orage T emperature -65 to 150

stg

TBD A

PENTAWATT-HV PowerSO-10(*)

Ther mal Res istance Junc ti on-c ase Max 1.9 1.9
Ther mal Res istance Ambient-case Max 60 50

o
o

o

C/W

o

C/W

V

C
C

CONNECTION DIAGRAMS (Top View)

PENTAWATT HV PENTAWATTHV (022Y) PowerSO-10

CURRENT ANDVOLTAGE CONVENTIONS

IDD ID

OSC

I

OSC

DD

V

13V

OSC

V

­+

ICOMP

VCOMP

DRAINVDD

COMP SOURCE

VDS

2/20

FC00020

ORDERING NUMBERS

PENTAW AT T HV PENT AWAT T HV (022Y) PowerSO -10

VIPer50B VI Per50B (0 22Y ) VI Per 50 B SP

VIPER50B/BSP

PINSFUNCTIONAL DESCRIPTION
DRAINPIN:

Integrated power MOSFET drain pin. It provides
internal bias current during start-up via an
integrated high voltage current source which is
switched off during normal operation. The device
is able to handle an unclamped current during its
normal operation,assuring self protection against
voltage surges, PCB stray inductance, and
allowing a snubberless operation for low output
power.

SOURCEPIN:

Power MOSFET source pin. Primary side circuit
commonground connection.

VDD PIN :

This pin providestwo functions :

- It corresponds to the low voltage supply of the

controlpart of the circuit. If V
the start-up current source is activatedand the
output power MOSFET is switched off until the
V

voltage reaches 11V. During this phase,

DD

the internal current consumption is reduced,
the V

pin is sourcing a current of about 2mA

DD

and the COMP pin is shorted to ground. After
that, the current source is shut down, and the
devicetries to start up by switching again.

goes below 8V,

DD

- This pin is also connected to the error

amplifier, in order to allow primary as well as
secondary regulation configurations. In case of
primary regulation, an internal 13V trimmed
reference voltage is used to maintain V
13V. For secondary regulation, a voltage
between 8.5V and 12.5V will be put on V
by transformer design, in order to stuck the
output of the transconductanceamplifier to the
high state. The COMP pin behaves as a

DD

DD

at

pin

constant current source, and can easily be
connected to the output of an optocoupler.
Note that any overvoltage due to regulation
loop failure is still detected by the error
amplifier through the V

voltage, which

DD

cannot overpass 13V. The output voltage will
be somewhat higher than the nominalone, but
still under control.

COMP PIN :

This pin providestwo functions :

- It is the output of the error transconductance

amplifier, and allows for the connection of a
compensation network to provide the desired
transfer function of the regulation loop. Its
bandwidth can be easily adjusted to the
needed value with usualcomponentsvalue. As
stated above, secondary regulation
configurations are also implemented through
the COMPpin.

- When the COMP voltage is going below 0.5V,

the shut-down of the circuit occurs, with a zero
duty cycle for the power MOSFET. This feature
can be used to switchoff the converter, and is
automatically activated by the regulation loop
(whatever is the configuration) to provide a
burst mode operation in case of negligible
output power or open load condition.

OSC PIN :

An R
to define the switching frequency. Note that
despite the connection of R
significant frequency change occurs for V
varying from 8V to 15V. It provides also a
synchronisationcapability, when connected to an
external frequency source.

network must be connected on that pin

T-CT

to VDD,no

T

DD

3/20

VIPER50B/BSP

AVALANCHE CHARACTERISTICS

Symb o l Para met er Max Valu e Uni t

I

D(ar)

E

Avalanche C ur rent, Repetitive or Not-R epe t it ive
(pulse widt h lim i t ed b y T

Single Pulse Avalanche Ener g y

(ar)

(starti ng T

=25oC, ID=I

j

max, δ < 1%) (see f ig. 12)

j

) (see f ig. 12)

D(ar)

ELECTRICAL CHARACTERISTICS (TJ=25oC, VDD=13 V, unless otherwise specified)
POWERSECTION

Symb o l Paramet er Test Con d it i ons Mi n . Typ . Max. Unit

BV

I

DSS

R

DS(on)

C

OSS

(1) On Inductive Load, Clamped.

Drain-Source Voltage ID=1mA V

DSS

COMP

=0V

400 V

(see fig. 5)

Of f - State Dra in Cur rent V

St at ic Drain Sour ce on
Resistance

t

Fall Time ID=0.2A Vin= 300 V (1)

f

=0V TJ=125oC

COMP

V

= 400 V

DS

ID=2A

=2A TJ= 100oC

I

D

(see fig. 3)

Rise Time ID=2A Vin= 300 V (1 )

t

r

(see fig. 3)

Out put Capacitance VDS= 25 V 150 pF

TBD A

TBD mJ

1mA

1.8 2.2

4.0

100 ns

50 ns

Ω
Ω

SUPPLY SECTION

Symb o l Paramet er Test Con d it i ons Mi n . Typ . Max. Unit

I

DDch

I

DD0

I

DD1

I

DD2

V

DDo f f

V

DDo n

V

DDhyst

St art - u p Char ging
Current

Oper at i ng Supply Current VDD=12V, FSW=0KHz

VDD=5V VDS=70V
(see f ig. 2 and f ig.15)

-2 mA

12 16 mA

(see fig. 2)

Oper at i ng Supply Current VDD=12V, FSW= 100 KHz 14 mA
Oper at i ng Supply Current VDD=12V, FSW= 200 KHz 16 mA
Undervoltage Shutdown (see f ig. 2) 8 V
Undervoltage Reset (see fig. 2) 11 12 V
Hysteresis Start-up (see f ig. 2) 2.4 3 V

4/20

VIPER50B/BSP

ELECTRICAL CHARACTERISTICS (continued)
OSCILLATORSECTION

Symb o l Paramet er Test Con d it i ons Mi n . Typ . Max. Unit

F

V

OSCih

V

OSCil

ERRORAMPLIFIERSECTION

Symbol Parameter Test Condition s Min. Typ. Max. Un it

V

DDreg

∆V

DDreg

G

A

VOL

G

V

COMPLO

V

COMPHI

I

COMPLO

I

COMPHI

Os cillator Frequency

SW

Total Variation

= 8.2 K

R

T

V

DD

with R

Ω

= 9 t o15 V

± 1% CT ± 5%

T

CT=2.4 nF

90 100 110 KHz

(see f ig.6 and fig . 9)

Os cillator P eak Voltage 7.1 V
Os cillator V alley Volt age 3.7 V

VDD Regulation Point I

= 0 m A (se e f ig. 1) 12.6 13 13. 4 V

COMP

Total Variation TJ= 0 to 100oC2%
Unity Gain B an dwidth From Input = VDDto O ut put = V

BW

COMP

150 KHz

COM P pin is open (see fig. 10)

Open Loop Volt age

COM P pin is open (see fig. 10) 45 52 dB

Gain
DC T ransconduct ance V

m

Out put Low Level
Out put High Level
Out put Low Curr e nt

= 2.5 V (see f ig. 1 ) 1.1 1.5 1.9 mA/V

COMP

=-400µAVDD=14V

I

COMP

= 400 µ AVDD=12V

I

COMP

V

=2.5V VDD= 1 4 V -600 µA

COMP

0.2 V

4.5 V

Capability
Out put High Curr ent

V

=2.5V VDD= 1 2 V 600 µA

COMP

Capability

PWM COMPARATORSECTION

Symbol Parameter Test Condition s Min. Typ. Max. Un it

H

V

COMPoffVCOMP

I

Dpeak

t

∆V

ID

Peak Current Limitat ion VDD=12V COMPpinopen 3 4 5.4 A
Current Sense Delay

d

/∆I

COMP

Dpeak

off s et I

V

= 1 to 3 V 0.7 1 1.3 V/A

COMP

=10mA 0.5 V

Dpeak

ID= 0.5 A 250 ns

to turn-off

t

t

on(min)

Blanking Time 250 360 ns

b

Minimum on Time 350 ns

SHUTDOWNAND OVERTEMPERATURE SECTION

Symbol Parameter Test Condition s Min. Typ. Max. Un it

V

COMPth

t

DISsu

T

T

hyst

Restart threshold (see fig. 4) 0.5 V
Disable Set Up Time (see fig. 4) 1 . 7 5 µs
Ther mal Shut down

tsd

(see fig. 8 ) 140 170

Tem perature
Ther mal Shut down

(see fig. 8 ) 40

Hyst eresis

o

o

C

C

5/20

VIPER50B/BSP

Figure1:VDDRegulationPoint

COMP

I

ICOMPHI

0

ICOMPLO

VDDreg

Figure3: TransitionTime

ID

10%Ipeak

Slope =

Gm in mA/V

FC00150

Figure2: UndervoltageLockout

IDD

IDD0

DD

V

VDDhyst

V

DDoff

IDDch

Figure4: ShutDown Action

VOSC

VCOMP

t

tDISs u

VDS=70V

Fsw = 0

V

DDon

FC00170

VDD

t

VDS

VCOMPth

90%VD

ID

10%V

D

t

tf tr

FC00160

ENABLE

DISABLE

Figure5: BreakdownVoltagevs Temperature Figure6: Typical FrequencyVariation

1.15

BV

DS S

(Nor malize d)

1.1

1.05

0.95

1

0 20406080100120

Temperature ( C)

FC00180

1

(%)

0

-1

-2

-3

-4

-5
0 20 40 60 80 100 120 140

Temperature ( C)

t

t

ENABLE

FC0 006 0

FC00190

6/20