SGS Thomson Microelectronics TS4872IJT, TS4872 Datasheet

s
TS4872
RAIL TO RAIL INPU T/OU TPUT
1W AUDIO POWER AMPLIFIER WITH STANDBY MODE
OPERATING FROM V
= 2.2V to 5.5V
CC
RAIL TO RAIL INPUT/OUTPUT
1W OUTPUT POWER @ Vcc=5V, THD=1%,
f=1kHz, with 8
Load
MODE (10nA)
75dB PSRR @ 217Hz @ 5 & 2.6V
ULTRA LOW POP & CLICK
ULTRA LOW DISTORTION (0.05%)
UNITY GAIN STABLE
8 X170µm BUMPS FLIP CHIP PACKAGE
DESCRIPTION
The TS487 2 i s an Audio Pow er Amplifier capable of delivering 1W of continuous RMS Ouput Power into 8
load @ 5V.
This Audio Am plifier is exhibiting 0.1% distortion level (THD) from a 5V supply for a Pout = 250mW RMS. An external standby mode cont rol reduces the supply current to less than 10n A. An internal shutdown protection is provided.
PIN CONNECTIONS (Top View)
TS4872IJT - FLIP CHIP
8
Vout1
76
+
Vin
Vin
12
Vcc
GND
5
STDBY
Vout2
BYPASS
3
4
The TS4872 has been designed for high quality audio applications such as m obile phones and t o minimize the number of external components.
The unity-gain stable amplifier can be configured by external gain setting resistors.
APPLICATIONS
Mobile Phones (Cellular / Cordless)
PDAs
Laptop/Notebook computers
Portable Audio Devices
ORDER CODE
Part
Number
Temperature
Range
TS4872IJT -40, +85°C YW4872
J = Flip Chip Package - only available in Tape & Reel (JT)
October 2002
Package
Marking
J
TYPICAL APPLICATION SCHEMATIC
Cfeed
Vcc
Rfeed
6
Audio Input
Vcc
Rstb
Rin
1
Vin-
Cin
Vin+
7
Bypass
3
Standby
5
Cb
Vcc
-
+
Bias
GND
2
­Av=-1
+
Vout1
Vout2
TS4872
Cs
8
RL 8 Ohm
4
1/29
TS4872
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
T
T
R
Supply voltage
CC
V
Input Voltage
i
Operating Free Air Temperature Range -40 to + 85 °C
oper
Storage Temperature -65 to +150 °C
stg
T
Maximum Junction Temperature 150 °C
j
Flip Chip Thermal Resistance Junction to Ambient
thja
Pd Power Dissipation Internally Limited ESD Human Body Model 2 kV ESD Machine Model 200 V
Latch-up Latch-up Immunity Class A
Lead Te mpera ture (solde ring, 10sec ) 250 °C
1. All voltages values are measured with respect to the ground pin.
2. The magnitude of input signal must never exceed V
3. Device is protected in cas e of over temperature by a thermal shutdown active @ 150°C
OPERATING CONDITIONS
Symbol Parameter Value Unit
V
V
V
R
1. With Heat Sink Surface = 125mm
Supply Voltage 2.2 to 5.5 V
CC
Common Mode Input Voltage Range
ICM
V V
Standby Voltage Input :
STB
Device ON Device OFF
RL
Load Resistor 4 - 32 Flip Chip Thermal Resistance Junction to Ambient
thja
1)
2)
from 2.6V to 5V
CC
< 2.6V
CC
2
+ 0.3V / GND - 0.3V
CC
6V
GND to V
3)
G
CC
200 °C/W
to V
ND
CC
VCC / 2
V
G
ND
V
- 0.5V ≤ V
CC
1)
≤ 0.5V
STB
≤ V
STB
CC
95 °C/W
V
V
2/29
TS4872
ELECTRICAL CHARACTERISTICS
V
= +5V, GND = 0V , T
CC
Symbol Parameter Min. Typ. Max. Unit
= 25°C (unless otherwise specified)
amb
I
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode i s actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
V
= +3.3V, GND = 0V, T
CC
Supply Current
CC
No input signal, no load
Standby Current
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product R
= 8
L
1)
2)
RFeed = 22K
Ω,
= 25°C (unless otherwise specified)
amb
Vripple = 200mV rms
Ω,
68mA
10 1000 nA
520mV
1W
0.1 %
75 dB
70 Degrees
20 dB
2MHz
3)
Symbol Parameter Min. Typ. Max. Unit
I
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. Standby mode i s actived when Vstdby is tied to Vcc
2. Dynamic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
All electrical values are made by correlatio n bet ween 2.6v and 5v measurem ents
3
Supply Current
CC
No input signal, no load
Standby Current
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 250mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin
= 8Ω, CL = 500pF
R
L
Gain Bandwidth Product
= 8
R
L
5.5 8 mA
1)
2)
RFeed = 22KΩs, Vripple = 100mV rms
Ω,
10 1000 nA
520mV
450 mW
0.1 %
68 dB
70 Degrees
20 dB
2 MHz
3/29
TS4872
ELECTRICAL CHARACTERISTICS
V
= 2.6V, GND = 0V, T
CC
Symbol Parameter Min. Typ. Max. Unit
= 25°C (unless otherwise specified)
amb
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. S ta ndby mode is actived when Vstdby is tied to Vcc
2. Dy namic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
= 2.2V, GND = 0V, T
V
CC
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product R
= 8
L
amb
2)
RFeed = 22K
Ω,
Vripple = 200mV rms
Ω,
= 25°C (unless otherwise specified)
5.5 8 mA
10 1000 nA
520mV
260 mW
0.1 %
75 dB
70 Degrees
20 dB
2MHz
Symbol Parameter Min. Typ. Max. Unit
I
CC
I
STANDBY
Voo
Po
THD + N
PSRR
Φ
GM
GBP
1. S ta ndby mode is actived when Vstdby is tied to Vcc
2. Dy namic measurements - 20*log(r m s(Vout)/rms(Vripple)). Vripple is the surim posed sinus signal to Vc c @ f = 217Hz
Supply Current
No input signal, no load
Standby Current
1)
No input signal, Vstdby = Vcc, RL = 8
Output Offset Voltage
No input signal, RL = 8
Output Power
THD = 1% Max, f = 1kHz, RL = 8
Total Harmonic Distortion + Noise
Po = 200mW rms, Gv = 2, 20Hz < f < 20kHz, RL = 8
Power Supply Rejection Ratio
f = 217Hz, RL = 8
Phase Margin at Unity Gain
M
R
= 8Ω, CL = 500pF
L
Gain Margin R
= 8Ω, CL = 500pF
L
Gain Bandwidth Product R
= 8
L
2)
RFeed = 22K
Ω,
Vripple = 100mVpp
Ω,
4.5 mA
10 nA
2mV
180 mW
0.1 %
75 dB
70 Degrees
20 dB
2MHz
4/29
Components Functional Description
TS4872
Rin
Cin
Rfeed Feed back resistor which sets the closed loop gain in conjunction with Rin
Cs Supply Bypass capacitor which provides power supply filtering
Cb Bypass pin capacitor which provides half supply filtering
Cfeed
Rstb Pull-up resistor which fixes the right supply level on the standby pin
Gv Closed loop gain in BTL configuration = 2 x (Rfeed / Rin)
Inverting input resistor which sets the closed loop gain in conjunction with Rfeed. This resistor also forms a high pass filter with Cin (fc = 1 / (2 x Pi x Rin x Cin))
Input coupling capacitor which blocks the DC voltage at the amplifier input terminal
Low pass filter capacitor allowing to cut the high frequency (low pass filter cut-off frequency 1 / (2 x Pi x Rfeed x Cfeed))
REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100µF.
2. External resistors are not needed for having better stability when supply @ Vcc down to 3V. By the
way, the quiescent current remains the same.
3. The standby response time is about 1µs.
5/29
TS4872
0.3 1 10 100 1000 10000
-40
-20
0
20
40
60
80
-240
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
Gain (dB)
Frequency (kHz)
Vcc = 3.3V ZL = 8Ω + 560pF Tamb = 25°C
Gain
Phase
Phase (Deg)
0.3 1 10 100 1000 10000
-40
-20
0
20
40
60
80
-240
-220
-200
-180
-160
-140
-120
-100
-80
-60
-40
-20
0
Gain (dB)
Frequency (kHz)
Vcc = 2.6V ZL = 8Ω + 560pF Tamb = 25°C
Gain
Phase
Phase (Deg)
Fig. 1 : Open Loop Frequency Response
0
60
40
Phase
20
Gain (dB)
0
-20
-40
0.3 1 10 100 1000 10000
Gain
Frequency (kHz)
Vcc = 5V RL = 8 Tamb = 25°C
-20
-40
-60
-80
-100
-120
-140
-160
-180
-200
-220
Fig. 3 : Open Loop Frequency Response
80
60
40
20
Gain (dB)
0
-20
-40
0.3 1 10 100 1000 10000
Gain
Phase
Frequency (kHz)
Vcc = 3.3V RL = 8
Tamb = 25°C
0
-20
-40
-60
-80
-100
-120
-140
-160
-180
-200
-220
-240
Phase (Deg)
Phase (Deg)
Fig. 2 : Open Loop Frequency Response
0
60
40
Gain
Vcc = 5V ZL = 8Ω + 560pF Tamb = 25°C
Phase
20
-20
-40
-60
-80
-100
-120
Gain (dB)
0
-140
-160
-20
-180
-200
-40
0.3 1 10 100 1000 10000
Frequency (kHz)
-220
Fig. 4 : Open Loop Frequency Response
Phase (Deg)
Fig. 5 : Open Loop Frequency Response
80
60
40
Phase
20
Gain (dB)
0
-20
-40
0.3 1 10 100 1000 10000
6/29
Gain
Frequency (kHz)
Vcc = 2.6V RL = 8 Tamb = 25°C
Fig. 6 : Open Loop Frequency Response
0
-20
-40
-60
-80
-100
-120
-140
-160
Phase (Deg)
-180
-200
-220
-240
TS4872
Fig. 7 : Open Loop Frequency Response
100
80
60
Gain
40
20
Gain (dB)
0
Vcc = 5V CL = 560pF
-20
Tamb = 25°C
-40
0.3 1 10 100 1000 10000
Phase
Frequency (kHz)
-80
-100
-120
-140
-160
-180
-200
-220
Fig. 9 : Open Loop Frequency Response
100
80
60
Gain
40
20
Gain (dB)
0
Vcc = 2.6V
-20
CL = 560pF Tamb = 25°C
-40
0.3 1 10 100 1000 10000
Phase
Frequency (kHz)
-80
-100
-120
-140
-160
-180
-200
-220
-240
Phase (Deg)
Phase (Deg)
Fig. 8 : Open Loop Frequency Response
100
80
60
Gain
40
20
Gain (dB)
0
Vcc = 3.3V CL = 560pF
-20
Tamb = 25°C
-40
0.3 1 10 100 1000 10000
Phase
Frequency (kHz)
-80
-100
-120
-140
-160
-180
-200
-220
-240
Phase (Deg)
7/29
TS4872
10 100 1000 10000 100000
-60
-50
-40
-30
-20
-10
Cin=22nF
Cin=100nF
Cin=220nF
Cin=330nF
Cin=1µF
Vcc = 5 & 2.6V Rfeed = 22k, Rin = 22k Cb = 1µF Rg = 100Ω, RL = 8
Tamb = 25°C
PSRR (dB)
Frequency (Hz)
Fig. 10 : Power Supply Rejection Ratio (PSRR) vs Power Supply
-30
Rfeed = 22k Cb = 1µF & 0.1µF
-40
Input = floating RL = 8 Tamb = 25°C
-50
PSRR (dB)
-60
Vcc=5V Ripple=200mVrms
-70
-80
10 100 1000 10000 100000
Vcc=3.3V Ripple=100mVrms
Vcc=2.6V Ripple=200mVrms
Frequency (Hz)
Fig. 12 : Power Supply Rejection Ratio (PSRR) vs Bypass Capacitor
-10
-20
-30
-40
-50
PSRR (dB)
-60
Cb=1µF
Cb=10µF
Vcc = 5 & 2.6V Rfeed = 22k Rin = 22k, Cin = 1µF Rg = 100Ω, RL = 8 Tamb = 25°C
Cb=47µF
Fig. 11 : Power Supply Rejectio n Ratio (PSRR) vs Feedback Capacitor
-10
Vcc = 5V
-20
Cb = 1µF & 0.1µF Rfeed = 22k
-30
Rfeed = 22k Vripple = 200mVms Input = floating
-40
RL = 8 Tamb = 25°C
-50
PSRR (dB)
-60
-70
-80
10 100 1000 10000 100000
Ω Ω
Frequency (Hz)
Cfeed=0
Cfeed=150pF
Cfeed=330pF
Cfeed=680pF
Fig. 13 : Power Supply Rejectio n Ratio (PSRR) vs Input Capacitor
-70
Cb=100µF
-80
10 100 1000 10000 100000
Frequency (Hz)
Fig. 14 : Power Supply Rejection Ratio (PSRR) vs Feedback Resistor
-10
Vcc = 5V
-20
Cb = 1µF & 0.1µF Vripple = 200mVrms
-30
Input = floating RL = 8
-40
-50
PSRR (dB)
8/29
-60
-70
-80
Tamb = 25°C
10 100 1000 10000 100000
Rfeed=22k
Frequency (Hz)
Rfeed=110k
Rfeed=47k
Rfeed=10k
TS4872
Fig. 15 : Pout @ THD + N = 1% vs Supply Voltage vs RL
1.4
8
Gv = 2 & 10
1.2
Cb = 1µF F = 1kHz
1.0
BW < 125kHz Tamb = 25°C
0.8
0.6
0.4
0.2
Output power @ 1% THD + N (W)
0.0
2.5 3.0 3.5 4.0 4.5 5.0
4
Vcc (V)
6
16
32
Fig. 17 : Power Dissipation vs Pout
1.4
Vcc=5V F=1kHz
1.2
THD+N<1%
1.0
0.8
0.6
Power Dissipation (W)
0.4
0.2
0.0
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4
RL=16
Output Power (W)
RL=4
RL=8
Fig. 16 : Pout @ THD + N = 10% vs Supply Voltage vs RL
2.0
Gv = 2 & 10
1.8
Cb = 1µF F = 1kHz
1.6
BW < 125kHz
1.4
Tamb = 25°C
1.2
1.0
0.8
0.6
0.4
Output power @ 10% THD + N (W)
0.2
0.0
2.5 3.0 3.5 4.0 4.5 5.0
4
Vcc (V)
8
6
16
32
Fig. 18 : Power Dissipation vs Pout
0.6
Vcc=3.3V F=1kHz
0.5
THD+N<1%
0.4
0.3
0.2
Power Dissipation (W)
0.1
RL=16
0.0
0.0 0.2 0.4 0.6 0.8
Output Power (W)
RL=8
RL=4
Fig. 19 : Power Dissipation vs Pout
0.40
Vcc=2.6V
0.35
F=1kHz THD+N<1%
0.30
0.25
0.20
0.15
Power Dissipation (W)
0.10
0.05
0.00
0.0 0.1 0.2 0.3 0.4
RL=16
RL=8
Output Power (W)
RL=4
Fig. 20 : Power Derating Curves
1.4
1.2
1.0
0.8
0.6
0.4
0.2
Flip-Chip Package Power Dissipation (W)
0.0
No Heat sink
0 25 50 75 100 125 150
Ambiant Temperature ( C)
Heat sink surface = 125mm (See demoboard)
2
9/29
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