.
HIGHLY INTEGRATED TWO-CHIP SOLUTION FOR NICAM DEMODULATION (using
TDA8205 QSPK)
.
DA TA AND SO UND RECO VER Y A CCORDI NG
TO EBU SPB 424 SPECIFICA TIONS
.
I2S INTERFACE FOR DIGITAL AUDIO PURPOSES (14-bit samples, 32kHz word select
clock, 896kHz serial clock)
.
4 TIMES UP SAMPLING DIGITAL FILTER
AND NOISE SHAPER
.
I2C INTERFACE FOR MICROCONTROLLER
SOFTWARE DRIVE
.
P A Y TV APPLICATION CAP ABILITIES
.
AUTOMATIC ERROR MONITORING
(programmable error rate limit )
TDA8204B
NICAM DECO DER
SHRINK 42
(Plastic Package)
ORDER CODE : TDA8204B
PIN CONNECT I ONS
DESCRIPT IO N
The TDA8204B performs two main functions, first
one is NICAM decoding, second one is audio signal
recovery (DAC) com bined with audio signal switching (Matrix). An I
2
S output is provided for digital
audio when required and all functions of both the
TDA8204B and the TDA 8205 are acc ess ed via an
on-chip I
used as an input for convert ing to analog some I
2
C bus interfac e. The I2S interface can be
2
digital sound.
GND
DACDR
DACDL
SERI
V
RSW
HA0
TEST0
US2
US1
US0
SCL
SDA
SD
SCK
WS
V
S
C4
C3
C2
C1
DD
DD
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
CK11648
42
TEST2
41
CK728
40
NDI
39
GND
38
TEST
37
TEST1
36
SEL0
35
SEL1
34
DV
33
V
32
31
30
29
28
27
26
25
24
23
22
DD
ADV
PDV
FID
DDO
DDI
GND
MUTE
RESET
ER
GND
8204B-01.EPS
November 1994
1/12
TDA8204B
PIN ASS IGME NT
Pin NoPIn Name Function Pin NoPin Name Function
1 GND Ground 22 GND Ground
2 DACDR PWM Data Output Right 23 ER Error Monitor Flag Output
3 DACDL PWM Data Output Left 24 RESET Reset
4 SERI Inter Chip Serial Bus Output 25 MUTE NICAM Mute
5V
DD
6 RSW Reserve Sound Switch
7 HA0 Hardware Address Selection 28 DDO Descrambled Data Output
8 TEST0 To be connected to V
9 US2 User bit 2 (input) 30 PDV Parity Data Valid Flag Output
10 US1 User bit 1 (output) 31 ADV Additional Data Valid Flag Output
11 US0 User bit 0 (output) 32 V
12 SCL I
13 SDA I
14 SD I
15 SCK I
16 WS I
17 V
DD
18 C4 Application Control Bit 4 Flag 39 NDI NICAM Data Input
19 C3 Application Control Bit 3 Flag 40 CK728 728kHz bit Clock Output
20 C2 Application Control Bit 2 Flag 41 TEST2 Not to be connected
21 C1 Application Control Bit 1 Flag 42 CK11648 11.648MHz bit Clock Input
+5V Supply 26 GND Ground
27 DDI Descrambled Data Input
Status/Control
or GND 29 FID Frame Identification Flag Output
DD
2
C Bus Clock 33 DV Data Valid Flag Output
2
C Bus Data 34 SEL1 Language Selection 1 Input
2
S Bus Data 35 SEL0 Language Selection 0 Input
2
S Bus Clock 36 TEST1 Not to be connected
2
S Bus Word Select 37 TEST To be connected to GND
DD
+5V Supply
+5V Supply 38 GND Ground
8204B-01.TBL
BLOCK DIAG RAM
DD
DD
V
VDDV
51732
NOISE
FILTER
1222638
GND
GND
TEST0
3
DACDL
2
DACDR
12
SCL
13
SDA
GND
GND
CK728
CK11648
RESET
NDI
DDO
39
40
42
24
41 36
TEST
MUTE
TEST1
TEST2
ADV
DDI
RSW
62728 31 33
NICAM D ECODER
C1C2C3
PDV
DV
1819202125 3037
C4
SEL0
SEL1
ER
FID
2329
SERIAL
BUS
4 7 891011
SERI
SCK
I S
2
SD
WS
1415 163435
2
I C INTERFACE
US0
DIGITAL
FILTER
US1
US2
HA0
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DD
P
tot
T
oper
T
stg
Supply Voltage 7 V
Total Power Dissipation 1.2 W
Operating Temperature Range 0, + 70
Storage Temperature Range - 20, + 150
8204B-02.EPS
o
C
o
C
8204B-02.TBL
THERMAL DATA
Symbol Parameter Value Unit
2/12
R
th (j-a)
Thermal Resistance Juntion-ambient Max. 67
o
C/W
8204B-03.TBL
TDA8204B
ELECTRICAL CHARACTERISTICS (T
= 25oC, VDD = 5V, unless otherwis e specif ied)
amb
Symbol Parameter Min. Typ. Max. Unit
SUPPLY
V
DD
I
DD
Supply Voltage Range 4.75 5 5.25 V
Supply Current 30 45 90 mA
OUTPUTS
DACDR, DACDL, SERI, US1, SCK, WS, C4, ER, DDO, FID, PDV, ADV, DV, CK728
V
OL
V
OH
Low Output Voltage (IOL = -4mA) 0.4 V
High Output Voltage (IOH = 4mA) 0.7 V
DD
US0 (open drain)
V
OL
I
LK
Low Output Voltage (IOL = -4mA) 0.4 V
High Output Current (leakage)
± 2 µA
CONSTANT CURRENT LED DRIVERS C1, C2, C3
I
OL
Low Output Current (VOL = 0.4V) - 10 mA
INPUTS
HA0, US2, RESET, DDI, SEL1, SEL0, TEST, NDI, CK11
V
IL
V
IH
I
LK
Low Input Voltage 0.8 V
High Input Voltage 0.6 V
Input Leakage Current
DD
± 2 µA
BI-DIRECTIONAL
RSW, MUTE
V
OL
V
OH
V
IL
Low Output Voltage (IOL = -4mA) 0.4 V
High OUtput Voltage (IOH = 100µA)
0.7 V
DD
Low Input Voltage 0.8 V
SD
V
OL
V
OH
V
IL
V
IH
I
LK
Low Output Voltage (IOL = -4mA) 0.4 V
High Output Voltage (IOH = 4mA) 0.7 V
DD
Low Input Voltage 0.8 V
High Input Voltage 0.6 V
Input Leakage Current
DD
± 2 µA
I2C INTERFACE
SCL
V
f
t
V
SCL
, t
r
I
IL
C
IL
IH
Low Input Voltage 0 1.5 V
High Input Voltage 3 V
SCL Clock Frequency 100 kHz
Input Rise and Fall Times 2
f
Input Leakage Current (VI = 5.5V) 10
Input Capacitance 7 pF
I
DD
SDA
V
IL
V
IH
t
, t
r
I
IL
C
V
OL
t
f
C
Input Low Voltage 0 1.5 V
Input High Voltage 3 V
Input Rise / Fall Times 2
f
Input Leakage Current (VI = 5.5V with output off) 10
Input Capacitance 7 pF
I
Low Output Voltage (IOL = 3mA) 0 0.5 V
Output Fall Time between 3.0V and 1.0V 200 ns
Load Capacitance 400 pF
I
DD
V
V
V
V
V
V
µs
µA
V
µs
µA
8204B-04.TBL
3/12
TDA8204B
ELECTRICAL CHARACTERISTICS (continued)
Symbol Parameter Min. Typ. Max. Unit
2
C BUS TIMING
I
SERIAL BUS (referred to V
t
LOW
t
HIGH
, d
t
SU
t
, d
HD
t
, S
SU
t
BUF
tHD, S
tSU, S
Low Period Clock
High Period Clock
Data Set-up Time 250 ns
AT
Data Hold Time 170 ns
AT
Stop Set-up Time from Clock High 4
TO
Start Set-up Time following a Stop 4
Start Hold Time 4
TA
Start Set-up Time following Clock Low to High Transition 4
TA
Figure 1 : I2C Serial Bus Timing
SDA
t
BUF
= 3V, VIL = 1.5V)
IH
t
LOW
4
4
t
F
µs
µs
µs
µs
µs
µs
8204B-05.TBL
SCL
SDA
VIH= 3V, VIL= 1.5V
Figure 2 : I2S Bus Timing Diagram
2
IS
WS
SD OUT
word n - 1
right channel
t
HD, STA
LSB LSB
t
t
SU, STA
r
t
HD, DAT
word n
left channel
14 bits
t
HIGH
MSBMSB
word n + 1
right channel
14 bits
t
SU, DAT
t
SU, STO
f = 896kHzCLOCK
f = 32 kHz
8204B-03.EPS
4/12
MSBMSB LSBSD IN
8204B-04.EPS