Datasheet TDA8044AH Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA8044

Satellite demodulator and decoder

Product specification
Supersedes data of 1998 Nov 17
File under Integrated Circuits, IC02

2000 Feb 21

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

FEATURES

• General features:
– One-chip Digital Video Broadcasting (DVB)

compliant Quadrature Phase Shift Keying (QPSK)
and Binary Phase Shift Keying (BPSK) demodulator
and concatenated Viterbi/Reed-Solomon decoder
with de-interleaver and de-randomizer

(ETS 300 421)
– 3.3 V supply voltage (input pads are 5 V tolerant)
– Standby mode for low power dissipation
– Internal clock PLL to allow low frequency crystal

application and selectable clock frequencies
– Power-on reset module
– Package: QFP100
– Boundary scan test.

• QPSK/BPSK demodulator:
– Interpolator and anti-alias filter to handle a large

range of symbol rates without additional external
filtering

– On-chip AGC of the analog input I and Q baseband

signals or tuner AGC control

– Two on-chip matched Analog-to-Digital Converters

(ADCs; 7 bits)

– Half Nyquist (square root raised-cosine) filter with

selectable roll-off factor

– Large range of symbol frequencies:

0.5 to 45 Msymbols/s for TDA8044 and

0.5 to 30 Msymbols/s for TDA8044A, including
Single Carrier Per Channel (SCPC) function

– Can be used at low channel Signal-to-Noise ratio

(S/N)

– Internal carrier recovery, clock recovery and AGC

loops with programmable loop filters

– Two loop carrierrecovery enabling phase tracking of

the incoming symbols

– Software carrier sweep for low symbol rate

applications
– Signal-to-noise ratio estimation
– External indication of demodulator lock.

• Viterbi decoder:
– Rate1⁄2convolutional code based
– Constraint length K = 7 with G1= 171

G2= 133

1

⁄2,2⁄3,3⁄4,4⁄5,5⁄6,6⁄7,7⁄8and8⁄

; supported puncturing code rates:

oct

9

oct

and

– 4 bits input for ‘soft decision’ for both I and Q

– Truncation length: 144
– Automatic synchronization
– Channel Bit Error Rate (BER) estimation
– External indication of Viterbi sync lock
– Differential decoding optional.

• Reed-Solomon (RS) decoder:
– (204, 188, T = 8) Reed-Solomon code
– Automatic (I2C-bus configurable) synchronization of

bytes, transport packets and frames

– Internal convolutional de-interleaving (I = 12; using

internal memory)

– De-randomizer based on Pseudo Random Bit

Sequence (PRBS)

– External indication of Register Select (RS) decoder

sync lock

– External indication of uncorrectable error (transport

error indicator is set)
– External indication of corrected byte
– Indication of the number of lost blocks
– Indication of the number of corrected blocks.

• Interface:
–I2C-bus interface to initialize and monitor the

demodulator and Forward Error Correction (FEC)
decoder; when no I2C-bus usage, default mode is

defined
– Programmable interrupt facility
– 6 bitsI/O expander forflexible access to andfrom the

I2C-bus
– SwitchableI2C-busloop-through to suppress I2C-bus

crosstalk in the tuner
– DiSEqC level 1.X support for dishcontrol applications
– 3-state mode for transport stream outputs.

APPLICATIONS

• Digital satellite TV: demodulation and Forward Error
Correction (FEC).

2000 Feb 21 2

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

GENERAL DESCRIPTION

This document gives preliminary information about the
TDA8044and TDA8044A, which arethesuccessors of the
TDA8043. The TDA8044A is only specified where the
product deviates from the TDA8044, all other references
arethe same. TheTDA8044 is backwards compatiblewith
the TDA8043, with respect to pinning and the I2C-bus
software. The TDA8044 is a DVB compliant demodulator
anderror correction decoder ICfor reception of QPSKand
BPSK modulated signals for satellite applications. It can
handle variable symbol rates in the range of

0.5 to 45 Msymbols/s (0.5 to 30 Msymbols/s for
TDA8044A) with a minimum number of low cost and
non-critical external components. Typical applications for
this device are Multi Channel Per Carrier (MCPC), Single
Channel Per Carrier (SCPC) and simulcast. In these
applications one satellite transponder contains
respectively one broadQPSK carrier, several small QPSK
carriers and one small QPSK carrier together with one or
two FM carriers.

TheTDA8044 has minimum interface withthetuner, it only
requires the demodulated analog I and Q baseband input
signals. Analog-to-digital conversion is performed
internally by two matched 7-bit ADCs. Since all the loops
(AGC, clock and carrier recovery) are internal, no
feedback to the tuner is needed. However, for maximum
tuner flexibility, there is the possibility to close the AGC
and carrier recovery loop externally via the tuner.

Thenumberof external components required for operation
of the TDA8044 is very low. Moreover the external
components are low cost and non-critical. This gives an
easy and low cost application. The TDA8044 operates on
a low frequency crystal which is upconverted to a clock
frequency by means of an internal PLL. Different clock
frequenciescanbeselectedwith the PLL without changing
the crystal. This allows for maximum flexibility concerning
symbol rate range combined with minimum power
consumption.

The TDA8044 alsohas internal anti-alias filters, whichcan
cover a large range of symbol frequencies (approximately
one decade) without the need to switch external (SAW)
filters. To cover the whole range of 0.5 to 45 Msymbols/s
switching of clock frequency (internally) and filtering
(externally) is necessary.

The TDA8044 has a double carrier loop configuration
which has excellent capabilities of tracking phase noise.
Synchronization of the FEC unit is done completely
internally, thereby minimizing I2C-bus communication.
The output of the TDA8044 is highly flexible, allowing
different output modes to interface to a
demultiplexer/descrambler/MPEG-2 decoder including a
3-state mode. For evaluation of the TDA8044,
demodulator and Viterbi outputs can be made available
externally.

Interfacing to the TDA8044 has been extended compared
to the TDA8043. Separate resets are available for logic
only, logic plus I2C-bus and carrier loops. A Power-on
reset module has been implemented which gives a reset
signal at power-up. This signal can be used to reset the
TDA8044 in order to guarantee correct starting of the IC.
Two extra general purpose I/O pins (I/O expanders) have
been added. A switchable I2C-bus loop-through to the
tuner is implemented to switch-off the I2C-bus connection
to the tuner. This reduces phase noise in the tuner in the
event of I2C-bus crosstalk. The transport stream outputs
can be put in 3-state mode. DiSEqC level 1.X support is
integrated for dish control applications. The power
consumption in standby mode has been decreased
considerably.

2000 Feb 21 3

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

QUICK REFERENCE DATA

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

DDA

V

DDD

I

DD(tot)

f

clk

r

s

P

tot

IL implementation loss note 5 − 0.3 − dB
S/N signal-to-noise ratio for locking

analog supply voltage 3.05 3.3 3.55 V
digital supply voltage 3.05 3.3 3.55 V
total supply current V

DDD

= 3.3 V
TDA8044 note 1 − 320 480 mA
TDA8044A notes 1 and 2 −−350 mA

internal clock frequency CFS = 0 or CFS = 1;

f

= 4 MHz

xtal

TDA8044 note 1 10.7 − 96 MHz
TDA8044A notes 1 and 2 10.7 − 64 MHz

symbol rate note 3

TDA8044 0.5 − 45 Msymbols/s
TDA8044A 0.5 − 30 Msymbols/s

total power dissipation T

=70°C; note 4

amb

TDA8044 − 1150 1700 mW
TDA8044A −−1250 mW

note 5 2 −−dB

the TDA8044

Notes

1. Programmable internal frequencies possible:
a) Values 10.7, 16, 32 or 64 MHz for CFS = 0.
b) Values 16, 24, 48 or 96 MHz for CFS = 1.

2. CFS is set to logic 0.

3. Without switching internal clock frequencies, a range of 1 decade can be covered. To cover the full range of symbol
frequencies, internal clock frequencies and external (SAW) filters must be switched. Details can be found in the
application note.

4. Maximum value is specified for asymbol rate of45 Msymbols/s, a puncturing rate of7⁄8, a clock frequency of 96 MHz
and a 3.55 V power supply. The typical value is specified for a symbol rate of 27.5 Msymbols/s, a puncture rate of3⁄
and a clock frequency of 64 MHz.

5. Implementation loss at the demodulator output andminimum S/N to lock the TDA8044 are measured including tuner
in a laboratory environment at a symbol rate of 27.5 Msymbols/s and a clock frequency of 64 MHz.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

TDA8044H QFP100 plastic quad flat package; 100 leads (lead length 1.95 mm);
TDA8044AH

body 14 × 20 × 2.8 mm

PACKAGE

SOT317-2

4

2000 Feb 21 4

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

PINNING

SYMBOL PIN I/O DESCRIPTION

I2 1 I digital I-input bit 2 (ADC bypass)
I3 2 I digital I-input bit 3 (ADC bypass)
V

SSD1

CFS 4 I clock frequency selection (remains at logic 0 for TDA8044A)
V

SSD2

I4 6 I digital I-input bit 4 (ADC bypass)
I5 7 I digital I-input bit 5 (ADC bypass)
I6 8 I digital I-input bit 6 (ADC bypass: MSB)
Q0 9 I digital Q-input bit 0 (ADC bypass: LSB)
V

DDD1

Q1 11 I digital Q-input bit 1 (ADC bypass)
Q2 12 I digital Q-input bit 2 (ADC bypass)
Q3 13 I digital Q-input bit 3 (ADC bypass)
Q4 14 I digital Q-input bit 4 (ADC bypass)
V

SSD3

Q5 16 I digital Q-input bit 5 (ADC bypass)
Q6 17 I digital Q-input bit 6 (ADC bypass: MSB)
V

SSD4

V

DDD2

PRESET 20 I set device into default mode
P3 21 I/O quasi-bidirectional I/O port (bit 3)
P2 22 I/O quasi-bidirectional I/O port (bit 2)
P1 23 I/O quasi-bidirectional I/O port (bit 1)
P0 24 I/O quasi-bidirectional I/O port (bit 0)
V

DDD3

P5 26 I/O quasi-bidirectional I/O port (bit 5)
P4 27 I/O quasi-bidirectional I/O port (bit 4)
PDOCLK 28 O output clock for transport stream bytes
PDO0 29 O parallel data output (bit 0)
PDO1 30 O parallel data output (bit 1)
PDO2 31 O parallel data output (bit 2)
V

SSD5

PDO3 33 O parallel data output (bit 3)
PDO4 34 O parallel data output (bit 4)
PDO5 35 O parallel data output (bit 5)
V

SSD6

V

SSD7

PDO6 38 O parallel data output (bit 6)
POR 39 I Power-on reset [can be connected to PRESET (pin 20)]
V

DDD4

3 − digital ground 1

5 − digital ground 2

10 − digital supply voltage 1

15 − digital ground 3

18 − digital ground 4
19 − digital supply voltage 2

25 − digital supply voltage 3

32 − digital ground 5

36 − digital ground 6
37 − digital ground 7

40 − digital supply voltage 4

2000 Feb 21 5

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

SYMBOL PIN I/O DESCRIPTION

V

DDD5

V

SSD8

V

DDD6

V

DDD7

PDO7 45 O parallel data output (bit 7)
n.c. 46 − not connected
V

SSD9

PDOERR 48 0 transport error indicator
PDOVAL 49 O data valid indicator
PDOSYNC 50 0 transport packet synchronization signal
V

SSD10

SCL 52 I serial clock input of I
SDA 53 I/O serial data of I
INT 54 O interrupt output (active LOW)
A0 55 I I
RSLOCK 56 O Reed-Solomon lock indicator
VLOCK 57 O Viterbi lock indicator
DLOCK 58 O demodulator lock indicator
V

DDD8

V

DDD9

TEST 61 I test pin (normally connected to ground)
TRST 62 I BST optional asynchronous reset (normally connected to ground)
TCK 63 I BST dedicated test clock (normally connected to ground)
SCLT 64 I serial clock of I
SDAT 65 I/O serial data of I
V

DDD10

V

SSD11

V

SSD12

TMS 69 I BST input control signal (normally connected to ground)
TDO 70 O BST serial test data output
TDI 71 I BST serial test data in (normally connected to ground)
V

DDD11

V

SSD13

V

SSD(AD)

V

DDD(AD)

V

ref(B)

V

SSA1

QA 78 − analog input Q
V

ref(Q)

IA 80 I analog input I
V

SSA2

41 − digital supply voltage 5
42 − digital ground 8
43 − digital supply voltage 6
44 − digital supply voltage 7

47 − digital ground 9

51 − digital ground 10

2

C-bus

2

C-bus

2

C-bus hardware address

59 − digital supply voltage 8
60 − digital supply voltage 9

2

C-bus loop-through

2

C-bus loop-through
66 − digital supply voltage 10
67 − digital ground 11
68 − digital ground 12

72 − digital supply voltage 11
73 − digital ground 13
74 − digital ground ADC
75 − digital supply ADC
76 O bottom reference voltage for ADC
77 − analog ground 1

79 O AGC decoupling - Q path

81 − analog ground 2

2000 Feb 21 6

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

SYMBOL PIN I/O DESCRIPTION

V

ref(I)

V

DDA

V

DDXTAL

XTALI 85 I crystal oscillator input
XTALO 86 O crystal oscillator output
V

SSXTAL

V

DDD12

V

DDD13

V

SSD14

D22 91 O 22 kHz output for dish control applications
V

SSD15

V

SSD16

V

AGC

V

SSD(test)

V

DDD14

V

DDD15

OUSTD 98 O general purpose sigma-delta output
I0 99 I digital I-input bit 0 (ADC bypass: LSB)
I1 100 I digital I-input bit 1 (ADC bypass)

82 O AGC decoupling - I path
83 − analog supply voltage
84 − supply voltage for crystal oscillator

87 − ground for crystal oscillator
88 − digital supply voltage 12
89 − digital supply voltage 13
90 − digital ground 14

92 − digital ground 15
93 − digital ground 16
94 O AGC output voltage
95 − test pin, normally connected to ground
96 − digital supply voltage 14
97 − digital supply voltage 15

2000 Feb 21 7

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

handbook, full pagewidth

V

SSD1

CFS

V

SSD2

Q0

V

DDD1

Q1
Q2
Q3
Q4

V

SSD3

Q5
Q6

V

SSD4

V

DDD2

PRESET

P3
P2
P1
P0

V

DDD3

P5
P4

PDOCLK

PDO0
PDO1

I1I0OUSTD
100

1

I2

2

I3

3
4
5
6

I4

7

I5

8

I6

9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30

DDD15VDDD14VSSD(test)VSSD16VSSD15

V

99989796959493929190898887868584838281

AGC

V

SSD14VDDD13VDDD12VSSXTAL

D22

V

TDA8044

TDA8044A

XTALO

XTALI

DDXTALVDDAVref(I)VSSA2

V

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51

IA
V

ref(Q)
QA
V

SSA1
V

ref(B)
V

DDD(AD)
V

SSD(AD)
V

SSD13
V

DDD11
TDI

TDO
TMS
V

SSD12
V

SSD11
V

DDD10
SDAT

SCLT
TCK
TRST
TEST
V

DDD9
V

DDD8
DLOCK

VLOCK
RSLOCK
A0
INT
SDA
SCL
V

SSD10

31323334353637383940414243444546474849

SSD5

PDO2

PDO3

V

For compatibility in respect to the TDA8043 see Section “Pin compatibility”.

PDO4

PDO5

V

SSD6VSSD7

PDO6

POR

Fig.1 Pin configuration.

2000 Feb 21 8

DDD4VDDD5

V

SSD8

V

DDD6VDDD7

V

PDO7

n.c.

SSD9

V

PDOVAL

PDOERR

50

MGM606

PDOSYNC

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

Pin compatibility

The TDA8044 is backwards pin compatible with the TDA8043, this means that the functional pins of the TDA8043 have
been left unchanged on the TDA8044. However due to extra functionality of the TDA8044, some of the not connected
pins of the TDA8043 have become functional pins on the TDA8044. Table 1 lists the modified pins of the TDA8044.

Table 1 Modified pins of the TDA8044

PIN TDA8043 FUNCTION TDA8044 SYMBOL TDA8044 FUNCTION

4 not connected CFS clock frequency selection
5 not connected V

SSD2

26 not connected P5 I/O expander bit 5
27 not connected P4 I/O expander bit 4
36 not connected V
37 not connected V

SSD6
SSD7

39 not connected POR Power-on reset
47 not connected V

SSD9

64 not connected SCLT serial clock of I
65 not connected SDAT serial data of I
91 not connected D22 22 kHz generation output
92 not connected V
93 not connected V
95 not connected V

SSD15
SSD16
SSD(test)

digital ground

digital ground
digital ground

digital ground

2

C-bus loop-through

2

C-bus loop-through

digital ground
digital ground
test pin, connect to ground

If it is required to replace the TDA8043 with the TDA8044 and the pins with extra functionality are not required, then the
following measures on the PCB layout must be taken to avoid I/O conflicts in the TDA8044:

• Pin numbers 4, 5, 26, 27, 36, 37, 47, 65, 92, 93 and 95 must be put to ground

• Pin numbers 39, 64 and 91 must be left not connected.

With these measures it is possible to use the TDA8043 and the TDA8044 on the same PCB without any problems.
In order to use pins with the extra functionality of the TDA8044, PCB layout changes are necessary.

2000 Feb 21 9

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134).

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

V

max

P

tot

T

stg

T

amb

T

j

Notes

1. Maximum power dissipation is specified for 96 MHz clock frequency, 45 Msymbols/s and a puncture rate of

2. Maximum power dissipation is specified for 64 MHz clock frequency, 30 Msymbols/s and a puncture rate of7⁄8.

supply voltage pins −0.3 +3.55 V
maximum voltage on all pins 0 V

DD

V

total power dissipation

TDA8044 T
TDA8044A T

=70°C; note 1 − 1700 mW

amb

=70°C; note 2 − 1250 mW

amb

IC storage temperature −55 +150 °C
ambient temperature T

=70°C070°C

amb

operating junction temperature 0 125 °C

7

⁄8.

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However it is good practice to take
normal precautions appropriate to handling MOS devices (see

“Handling MOS devices”

).

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

TDA8044 34 K/W
TDA8044A 45 K/W

2000 Feb 21 10

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

APPLICATION INFORMATION

handbook, full pagewidth

RF input

TDA8060

TSA5056

TUNER

telecommunications
operator IF

smart card(s)

I

TDA8044

TDA8044A

Q

2

I

C-bus

Vxx

MODEM

TDA8004

FRONT

PANEL

CONTROL

SDD

2

I

C-bus

SAA7214

TMIPS

FLASH

AV_DATA

SAA7215

16-Mbit

SDRAM

DRAM

(optional)

16-Mbit

SDRAM

(optional)

1394

L + PHY

BUFFERS

RGB
CVBS/YC
L/R

AUDIO

DAC

IEEE 1394

IEEE 1284
RS232

SWITCHING

SCART 1

SCART 2

SCART 3

MGM605

Fig.2 Satellite set-top decoder concept.

2000 Feb 21 11

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

handbook, full pagewidth

+3.3 V

V

V

V

V

DDD

DDD1

100 nF

470 kΩ

DDD1

DDD1

packet data
and control

outputs

(1)

L

(1)

L

V

DDD2

(3)

C

(3)

C

(3)

C

PDOCLK

PDO0
PDO1

CFS

15 µF

15 µF

P3
P2
P1
P0

P5
P4

V

V

DDD1

DDD2

C

1
2
3
4
5
6
7
8

9
10
11
12
13
14
15
16
17
18
19

20

21

22

23

24

25

26

27

28

29

tuner AGC (optional)

470 Ω10 kΩ

+ 5 V

27

330 nF

(3)

V

SD

99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81

100

V

DDD2

22 kHz

(3)

C

27

pF

pF

(2)

XTAL

TDA8044

TDA8044A

31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

(3)

V

n.c.

DDD1

POR

PDO5

PDO3PDO2

PDO4

PDO6 PDO7 PDOERR PDOSYNC

C

V

DDD1

packet data and control outputs

V

DDA

(3)

C

PDOVAL

10 nF

80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
5130

10 Ω

100 nF

100 nF

100 nF

+3.3 V

100 nF

TDI

TDO

TMS

I2C-bus
to tuner

lock signals

+3.3 V

I

Q

4.7
kΩ

(1)

L

100 nF

C

C

C

C

4.7
kΩ

(3)

(3)

(3)

(3)

V

V

V

V

1.6
kΩ

15 µF

MGM607

DDD2

DDD2

DDD2

DDD1

+5 V

interrupt

2

I

C-bus

input

V

DDA

(1) B = SMD bead type C8D8.9/3/3 Grade 4S2.
(2) f

= 4 MHz (fundamental).

xtal

(3) C = 6.8 nF, SMD.

Fig.3 Application diagram.

2000 Feb 21 12

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

PACKAGE OUTLINE

QFP100: plastic quad flat package; 100 leads (lead length 1.95 mm); body 14 x 20 x 2.8 mm

c

y

X

SOT317-2

80 51

81

pin 1 index

100

1

w M

b

e

p

Z

D

H

D

0 5 10 mm

A

50

Z

E

e

H

E

w M

b

p

31

A

2

A

E

A

1

(A )

3

θ

L

p

L

detail X

30

D

v M

A

B

v M

B

scale

DIMENSIONS (mm are the original dimensions)

mm

A

max.

3.20

0.25

0.05

2.90

2.65

0.25

0.40

0.25

0.25

0.14

UNIT A1A2A3bpcE

(1)

(1) (1)(1)

D

20.1

19.9

eH

14.1

13.9

0.65

24.2

23.6

Note

1. Plastic or metal protrusions of 0.25 mm maximum per side are not included.

OUTLINE

VERSION

IEC JEDEC EIAJ

REFERENCES

SOT317-2 MO-112

2000 Feb 21 13

E

18.2

17.6

LL

p

1.0

0.6

0.15 0.10.21.95

H

D

EUROPEAN

PROJECTION

Z

D

0.8

0.4

Zywv θ

E

o

1.0

7

o

0.6

0

ISSUE DATE

97-08-01
99-12-27

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

SOLDERING
Introduction to soldering surface mount packages

Thistextgives a very brief insighttoacomplex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board byscreenprinting, stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating,soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

If wave soldering is used the following conditions must be
observed for optimum results:

• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27 mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswith leads on four sides, thefootprintmust
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement andbefore soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Feb 21 14

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

WAVE REFLOW

(1)

BGA, SQFP not suitable suitable

SOLDERING METHOD

HLQFP, HSQFP, HSOP, HTSSOP, SMS not suitable

(3)

PLCC

, SO, SOJ suitable suitable
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

(2)

(3)(4)
(5)

suitable

suitable
suitable

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

.

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
The package footprint must incorporate solder thieves downstream and at the side corners.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

2000 Feb 21 15

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

PURCHASE OF PHILIPS I

2

C COMPONENTS

2

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

C components conveys a license under the Philips’ I2C patent to use the

2000 Feb 21 16

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

NOTES

2000 Feb 21 17

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

NOTES

2000 Feb 21 18

Philips Semiconductors Product specification

Satellite demodulator and decoder TDA8044

NOTES

2000 Feb 21 19

Philips Semiconductors – a w orldwide compan y

Argentina: see South America
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Tel. [phone], Fax. [phone]
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Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

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Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
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Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
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Tel. [phone], Fax. [phone]

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Slovenia: see Italy
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Taiwan: Philips Semiconductors, 6F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

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209/2 Sanpavuth-Bangna Road Prakanong, BANGKOK 10260,
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Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
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Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

2000

Internet: http://www.semiconductors.philips.com

69

Printed in The Netherlands 753504/03/pp20 Date of release: 2000 Feb 21 Document order number: 9397 750 05972