through a 2.2µ capacitor
Minimum Input Gain-101dB
Maximum Input Gain30dB
Step Resolution2dB
VOLUMECONTROL
C
RANGE
A
A
V
A
VMAX
STEP
E
A
E
T
DC
mute
Control Range454749dB
Max. Attenuation454749dB
Step Resolution0.511.5dB
Attenuation Set ErrorAV= 0 to-24dB-1.001.0dB
A
= -24 to -47dB-1.501.5dB
V
Tracking ErrorAV= 0 to-24dB01dB
= -24 to -47dB02dB
A
V
DC Stepadjacent attenuation steps
from 0dB to A
V
max
0
0.5
3mV
Mute Attenuation80100dB
SPEAKERATTENUATORS
C
RANGE
S
V
A
STEP
E
A
DC
mute
Control Range76dB
Step Resolution0.511.5dB
Attenuation Set ErrorAV= 0 to-20dB-1.501.5dB
A
= -20 to -56dB-202dB
V
DC Stepadjacent attenuation steps03mV
Mute Attenuation80100dB
AUDIO OUTPUTS
V
CLIP
R
L
R
O
V
DC
Clipping Leveld = 0.3%2.12.6V
Output Load Resistance2KΩ
Output Impedance104070
DC Voltage Level3.8V
mV
RMS
Ω
GENERAL
E
NO
E
S/NSignal to Noise RatioAllgains 0dB; V
S
C
dDistortionA
Output NoiseAll gains = 0dB;
BW = 20Hz to 20KHz flat
Total TrackingErrorAV= 0 to-24dB01dB
t
A
= -24 to -47dB02dB
V
Channel Separation Left/Right80100dB
=0;VI=1V
V
BUSINPUT
515µV
O =1VRMS ;106dB
;0.010.08%
RMS
3/13
TDA7449L
ELECTRICALCHARACTERISTICS
(continued.)
SymbolParameterTest ConditionMin.Typ.Max.Unit
BUS INPUT
V
IL
V
IH
I
IN
V
O
Input Low Voltage1V
Input High Voltage3V
Input CurrentVIN= 0.4V-55
Output Voltage SDA
IO = 1.6mA0.40.8V
Acknowledge
TEST CIRCUIT
MUXOUTL
10
8
L-IN1
0.47µF
L-IN2
0.47µF
R-IN1
0.47µF
100K
9
100K
7
100K
G
0/30dB
2dB STEP
VOLUME
I2CBUS DECODER + LATCHES
SPKR ATT
LEFT
19
20
18
5
LOUT
SCL
SDA
DIG_GND
A
µ
6
R-IN2
0.47µF
100K
INPUT MULTIPLEXER
G
+ GAIN
APPLICATIONSUGGESTIONS
The first and the last stages are volume control
blocks. The control range is 0 to -47dB (mute) for
the first one, 0 to -79dB (mute) for the last one.
Both of them have 1dB step resolution.
The very high resolutionallows the implementation
of systemsfreefromanynoisyacousticaleffect.
10µF
4
2
3
D98AU870
ROUT
V
S
AGND
VOLUME
111
MUXOUTR
SPKR ATT
RIGHT
V
REF
SUPPLY
CREF
The TDA7449L audioprocessor provides 2 bands
tonescontrol.
CREF
The suggested 10µF reference capacitor (CREF)
value can be reduced to 4.7µF if the application
requiresfasterpower ON.
4/13
TDA7449L
Figure 2:
Figure 4:
THD vs. frequency
Channelseparationvs. frequency
Figure3:
THDvs. R
LOAD
5/13
TDA7449L
2
C BUS INTERFACE
I
Data transmission from microprocessor to the
TDA7449L and vice versa takes place through
the 2 wires I
2
C BUS interface, consisting of the
two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).
Data Validity
As shown in fig. 3, thedata on the SDA line must
be stable during the high period of the clock. The
HIGH and LOW state of the data line can only
change when the clock signal on the SCL line is
LOW.
Start and Stop Conditions
As shown in fig.4 a start condition is a HIGH to
LOW transition of the SDA line while SCL is
HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.
Byte Format
Every byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an ac-
Figure 3:
Data Validityon theI
2
CBUS
knowledgebit. The MSB is transferredfirst.
Acknowledge
The master (µP)puts a resistiveHIGH level on the
SDA line during the acknowledgeclock pulse (see
fig. 5). The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line
duringthisclock pulse.
The audio processor which has been addressed
has to generate an acknowledge after the reception of each byte, otherwise the SDAline remains
at the HIGH level during the ninth clock pulse
time. In this case the master transmitter can generate the STOP information in order to abort the
transfer.
Transmissionwithout Acknowledge
Avoiding to detect the acknowledge of the audio
processor,the µP canuse a simplertransmission:
simply it waits one clock without checking the
slaveacknowledging,and sends the new data.
This approach of course is less protected from
misworking.
Figure 4:
TimingDiagram of I
2
Figure 5: Acknowledgeon the I
6/13
CBUS
2
CBUS
TDA7449L
SOFTWARESPECIFICATION
InterfaceProtocol
The interface protocol comprises:
A start condition (S)
address
A subaddressbytes
A sequenceof data (N byte + acknowledge)
A stopcondition (P)
A chip addressbyte, containingthe TDA7449L
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S10001000ACKACKDATAACKP
D96AU420
SUBADDRESSDATA 1 to DATA n
XDATA
XXB
ACK = Acknowledge
S = Start
P = Stop
A = Address
B = Auto Increment
EXAMPLES
No IncrementalBus
rect chip address, a subaddress with the B = 0
(no incremental bus), N-data (all these data concern the subaddressselected),a stop condition.
The TDA7449L receives a startcondition,the cor-
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S10001000ACKACKDATAACKP
D96AU421
IncrementalBus
The TDA7449L receive a start conditions, the
correct chip address, a subaddresswith the B = 1
(incremental bus): now it is in a loop condition
with an autoincreaseof the subaddress whereas
CHIP ADDRESS
MSBLSBMSBLSBMSBLSB
S10001000ACKACKDATAACKP
D96AU422
SUBADDRESSDATA
XD3
XX0D2D1D0
SUBADDRESS from ”XXX1000” to ”XXX1111”of
DATAare ignored.
The DATA 1 concern the subaddress sent, and
the DATA 2 concern the subaddress sent plus
one in the loop etc, and at the end it receivers the
stop condition.
B = 1: INCREMENTAL BUSACTIVE
B = 0: NO INCREMENTALBUS
X = DON’T CARE
SUBADDRESS
In IncrementalBus Mode, the three ”not used” functions must be addressedin any case. For example to
refresh ”Volume= 0dB”and Speaker_R= -40dB”,the followingbytes mustbe sent:
SUBADDRESSXXX10010
VOLUME DATAX0000000
NOT USED 1 DATAXXXX1111
NOT USED 2 DATAXXXX1111
NOT USED 3 DATAXXXX1111
SPEAKER_R DATAX0000010
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publicationsupersedes and replaces all informationpreviously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
Australia - Brazil - Canada- China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands-