STB10NC50-1
N - CHANNEL 500V - 0.48Ω - 10A - I2PAK/D2PAK
PowerMESH MOSFET
PRELIMINARY DATA
■ TYPICALR
DS(on)
= 0.48 Ω
■ EXTREMELYHIGH dv/dt CAPABILITY
■ 100%AVALANCHETESTED
■ VERYLOW INTRINSIC CAPACITANCES
■ GATECHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
APPLICATIONS
■ HIGHCURRENT, HIGH SPEEDSWITCHING
■ SWITCHMODE POWER SUPPLIES(SMPS)
■ DC-AC CONVERTERS FOR WELDING
EQUIPMENTAND UNINTERRUPTIBLE
POWERSUPPLIESAND MOTORDRIVE
INTERNAL SCHEMATIC DIAGRAM
December 1999
1
2
3
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
DS
Drain-sour ce Voltage (VGS=0) 500 V
V
DGR
Drain- ga t e V oltage (RGS=20kΩ)
500 V
V
GS
Gate-sourc e Voltage ± 30 V
I
D
Drain C urrent (con tinuous) at Tc=25oC10A
I
D
Drain C urrent (con tinuous) at Tc= 100oC6.3A
I
DM
(•) Drain C urrent (puls ed ) 40 A
P
tot
Total Dissipation at Tc=25oC135W
Derating Factor 1.08 W/
o
C
dv/ dt(
1) Peak Diod e Rec o very volt ag e slope 3 V/ns
T
stg
Sto rage T e m pe r ature -65 to 1 50
o
C
T
j
Max. O pe rating Junc t ion Temp eratur e 150
o
C
(•) Pulse width limited by safe operating area (1)ISD≤ 10 A, di/dt ≤100 A/µs,VDD≤ V
(BR)DSS
,Tj≤T
JMAX
I2PAK D2PAK
1
3
TYPE V
DSS
R
DS(on)
I
D
ST B10NC50-1 500 V < 0.52 Ω 10 A
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