SGS Thomson Microelectronics ST19SF04 Datasheet
■
4
4
4
4
ENHANCED 8 BIT CPU WITH EXTENDED
ADDRESSING MODES
■
32 K BYTES OF USER ROM WITH
PARTITIONING
■
SYSTEM ROM
■
960 BYTES OF USER RA M WITH PARTITI ONI
NG
■
4 K BYTES OF USER EEPROM WITH
PARTITIONING
– Highly reliable CMOS EEPROM submicron
technology
– 10 years data retention
– 100,000 Erase/Write cycles endurance
– Separate Write and Erase cycles for fast "1"
programming
– 1 to 32 bytes Erase or Program
■
SECURITY FIREWALLS FOR MEMORIES
■
VERY HIGH SECURITY FEATURES
INCLUDING EEPROM FLASH PROGRAM
■
8 BIT TIMER WITH INTERRUPT CAPABILITY
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2 SERIAL ACCESS, ISO 7816-3 COMPATIBLE
■
3V ± 10% or 5V ± 10% SUPPLY VOLTAGE
■
POWER SAVING STANDBY MODE
■
CONTACT ASSIGNMENT COMPATIBLE ISO
7816-2
■
ESD PROTECTION GREATER THAN 5000V
ST19SF04
Smartcard MCU
With 4 KBytes of EEPROM
DATA BRIEFING
Micromodule (D3)
Wafer
May 2000
This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact
your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29
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ST19SF04
S
HARDWARE DESCRIPTION
The ST19SF04, a member of the ST19 device
family, is a serial access microcontroller especially
designed for very l arge v ol um e and c os t c omp eti tive secure portable objects.
The ST19SF04 is based on a STMi croelectr onics
8 bit CPU core including on-chi p memories: 960
Bytes of RAM, 32 K Bytes of USER ROM and 4 K
Bytes of EEPROM.
RAM, ROM and EEPROM memo ries ca n be con figured into partitions. Access rules from any
memory partition to anoth er parti tion are s etup by
the user defined Memory Access Control Logic.
Figure 1. Block Diagram
It is manufactured using the highly reliable ST
technology.
As all other ST19 family me mbers, it is ful ly compatible with the ISO standards for Smartcard applications.
SOFTWARE DESCRIPTION
Software development and firmware (ROM code/
options) generation are completed by the ST16-19
HDSE development system.
RAM EEPROM
960
BYTES
CLOCK
GENERATOR
MODULE
CLK
BYTES
MEMORY ACCESS FIREWALL
8 BIT
TIMER
4 K
ADMINISTRATOR
USER
ROM
BYTES
INTERNAL BUS
SECURITY
RESET
32 K
UNPREDICTABLE
NUMBER
GENERATOR
SYSTEM ROM
SYSTEM ROM
FIREWALL
8 BIT
CPU
SERIAL
I/O
INTERFACE
I/OGNDVcc
SCP 101b/D
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