SGS Thomson Microelectronics ST19KF16 Datasheet

With 1088 Bits Modular Arithmetic Processor

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8 BIT ARCHITECTURE CPU

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32 KBytes of USER ROM WITH PARTITIONING

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SYST EM ROM FO R L IBRAR I ES

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1984 Bytes of RAM WITH PARTITIONING

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16 KBytes of EEPROM WITH PARTITIONING – Highly reliable CMOS EEPROM technology – 10 year data retention – 100,000 Erase/Write cycle endurance – Separate Write and Erase cycles for fast “1”

programming

– 1 to 64 bytes Erase or Program in 1 ms

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1088 BITS MODULAR ARITHMETIC PROCESSOR

– Fast modular multiplication and squaring us-

ing Montgomery method

– Software Crypto Libraries in separate ROM

area for efficient algorithm coding using a set of advanced functions

– Software selectable operand length

up to 2176 bits

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SECURITY FIREWALLS FOR MAP AND MEMORIES

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VERY HIGH SECURITY FEATURES INCLUDING EEPROM FLASH PROGRAM AND RAM FLASH CLEAR

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8 BIT TIMER

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SERIAL ACCESS, ISO 7816-3 COMPATIBLE

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3V ± 10% or 5V ± 10% SUPPLY VOLTAGE

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POWER SAVING STANDBY MODE

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UP TO 10 MHz INTERNAL OPERATING FREQUENCY

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CONTACT ASSIGNMENT COMPATIBLE ISO 7816-2

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ESD PROTECTION GREATER THAN 5000V

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FAST CRYPTOGRAPHIC FUNCTIONS PROCESSING (5V

10%, 5MHz)

ST19KF16

Smar tcard MCU

DATA BRIEFING

Micromodule (D4)

Function Speed

RSA 512 bits signature with CRT * 20 ms RSA 512 bits signature without CRT 60 ms RSA 512 bits verification (e=$10001) 2 ms RSA 1024 bits signature with CRT 110 ms RSA 1024 bits signature without CRT 380 ms RSA 1024 bits verification (e=$10001) 5 ms RSA 2048 bits signature with CRT 800 ms RSA 2048 bits verification (e=$10001) 100 ms EC 160 bits signature 250 ms EC 160 bits verification 500 ms

*CRT: Chinese Remainder Theorem

Wafer

BD.KF16/9809VP1

This is Brief Data from STMicroelectronics. Details are subject to change without notice. For complete data, please contact your nearest Sales Office or SmartCard Products Divison, Rousset, France. Fax: (+33) 4 42 25 87 29

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ST19KF16

HARDWARE DESCRIPTION

The ST19KF16, a member of the ST19 device family, is a serial access microcontroller especially designed for very large volume and cost competitive secure portable objects, where high performance Public Key Algorithms will be implemented, to cut down initialization and communication costs and to increase security.

Its internal Modular Arithmetic Processor is designed to speed up crypt ographic cal cu lations using Public Key Algorithms. Based on a 1088 bit architecture, it processes modular multiplication and squaring up to 2176 bit operands.

The ST19KF16 is based on a S TMicroelectronics 8 bit CPU core including on-chip memo ries: 1984 Bytes of RAM, 32 KBytes of USER ROM and 16 KBytes of EEPROM.

RAM, ROM and EEPROM m em ories can be configured into partitions. Access rules from any memory partition to another partition are s etup by the user defined Memory Access Control Logic.

It is manufactured using the highly reliable ST CMOS EEPROM technology.

As all o ther ST19 f am ily m emb ers, it is fully com patible with the ISO standards for Smartcard applications.

SOFTWARE SUPPOR T

SOFTWARE DEVEL OPMENT Software development and firmware (ROM code/

options) generation are completed by the ST16-19 HDS development system.

CRYPTO LIBRARIES For an easy and efficient use of the Modular Arith-

metic Processor (MAP), ST proposes a complete set of firmware subroutines. This library is located in a specific ROM area , leaving 32 KBytes i n the User ROM for the application software. This library saves the operating system designer from coding first layer functions and allows the designer to concentrate on algorithms and Public Key Cryptographic (PKC) protocol implementation.

This library contains firmware functions for: – loading and unloading parameters and results

to or from the MAP – calculating Montgomery constants – basic mathematics including modula r squaring

and multiplication for various lengths – modular exponentiation using or not the Chi-

nese Remainder Theorem (CRT), – more elaborate funct ions such as R SA signa-

tures and authentications for any modulo length

up to 2176 bits long or DSA signature and veri-

fication and elliptic curves. – full internal key generation for signatures/au-

thentications. This guarantees that the secret

key will never be known outside the chip and

contributes to overall system security. – long random number generation – sha-1

Figure 1. Bloc k D ia gram

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RAM

1984

Bytes

CLOCK GENERATOR MODULE

CLK

EEPROM Bytes

MEMORY ACCESS FIREWALL

16 K

8 BIT TIMER

USER ROM

32 K

Bytes

SECURITY

ADMINISTRATOR

RESET VCC I/OGND

SYSTEM ROM AND CRYPTO LIBRARIES

INTERNAL BUS

UNPREDICTABLE NUMBER GENERATOR

1088 Bits

SYSTEM ROM AND MAP FIREWALL

8 BIT CPU

MAP

SERIAL I/O INTER FACE

SCP 133b/DS