SGS Thomson Microelectronics ST1305B Datasheet
Memory Card IC 192 bit High Endurance EEPROM
■ Single Supply Voltage (5 V)
■ Memory Divided Into:
– 16 bits of Circuit Identification
– 48 bits of Card Identification
– 48 bits of Count Data
– 16 b i ts of Certificate
– 24 bits of Transport Code
– 64 bits of Issuer Data
■ Counting Capability up to 262,144
■ Circuit Protected by Transport Code for Delivery
from ST to the Customer
■ 5 External Contacts Only (ISO 7816
Compat ib le)
■ Answer to Reset (Fully Compatible with ISO
7816-3)
■ E.S.D. Protection Greater Than 4000 V
■ Power-On and Low V
■ 1 Million Erase/Write Cycles (minimum)
■ 10 Year Data Retention (minimum)
■ 5 ms Programming Time (typical)
CC
Reset
ST1305B
With Secure Logic Access Control
DATA BRIEFING
1
1
Micromodule (D10)
1
1
Micromodule (D15)
Wafer
DESCRIPTION
The ST1305B is a 192-bit EEPROM device with
associated security logic to control memory access. The circuit includes counting capabilities
and thus is very well adapted to prepaid card applications.
The ST1305B is protected by hard-wired security
logic and special fuses. Th e memory is a rranged
as a matrix of 2 4x8 cell s, acc esse d i n a s erial bi t-
Table 1. Signal Names
CLK Clock
RST Reset
I/O Serial Data Input/Output
V
CC
GND Ground
October 1999
Complete data available under NDA.
Supply Voltage
Figure 1. Logic Diagram
V
CC
RST
ST1305B
CLK
GND
I/O
DS05B01
1/2
ST1305B
wise fashion for reading and programming, and in
a byte-wise fashion for internal erasing.
The device recognises three commands issued
via the RST and CLK pins (as described in the full
data sheet):
– RESET: to reset the internal address register to
00d
– READ: to increment the internal address regis-
ter, and read the data bit at that address
– PROG: to program the bit at the current ad-
dress.
Figure 2. Me m ory Map
000d
016d
064d
112d
Circuit Identification
Card Identification
Counters / Transport Code
Certificate
16 bits
48 bits
48 bits
16 bits
The device offers two distinct configurations:
– ISSUER: for the card manufacturer, allowing
special data to be written to the chip, during initialisation
– USER: for the end user of the card, restricting
access to the chip.
Before delivery, from ST to the card issuer, the device is placed in the ISSUER configuration. This
operation is performed by blowing the “test fuse”.
In USER Configuration
READ
EEPROM
Cells
Matrix
ONLY
READ, WRITE,
ERASE
128d
192d
260d
Issuer Defined Area
Unused
Fuses
64 bits
READ
ONLY
DS05B07
Table 2. Ordering Information Scheme
Example: ST1305B - W4 / XX YY
Delivery Form Transport Code
D10 Micromodule on Super 35 mm reel Given by ST
D15 Micromodule on Super 35 mm reel
W4 Wafer (180 µm thickness) Customer Code
Given by the Issuer
2/2
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