SGS Thomson Microelectronics M41T00 Datasheet

M41T00

■ 2.0V to 5.5V SUPPLY VOLTAGE

■ COUNTERS for SECONDS, MINUTES,

HOURS, DAY, DATE , MONTH, YEARS and CENTURY

■ YEAR 2000 COMPLIANT

■ SOFTWARE CLOCK CALIBRATION

■ AUTOMATIC SWITCH-OVER and DESELECT

CIRCUITRY

■ I

C BUS C O MPATI BLE

■ ULTRA-LOW BATTERY SUPPLY CURRENT

of 1µA

■ LOW OPERATING CURRENT of 300µA

■ OPERATING TEMP ERATURE of –40 to 85°C

■ AUTOMATIC LEAP YEAR COMPENSATION

■ SPECIAL SOFTWARE PROGRAMMABLE

OUTPUT

DESCRIPTION

The M41 T0 0 TIMEKEEPER

RAM is a low power Serial TIMEKEEPER with a built-in 32.768kHz os cillator (external crystal controlled). Eight bytes of the RAM are u sed for the clock/calenda r function and are configured in binary coded decimal (BCD) format. Addresses and data are transferred serially via a two-line bi-directional bus. The bu ilt-in address register is incremented automatically after each write or read data byte.

Table 1. Signal Names

OSCI Oscillator Input OCSO Oscillator Output

Serial Access TIMEKEEPER

SO8 (M)

150mil Width

Figure 1. Logic Diagram

OSCI

SCL

M41T00

BAT

OSCO

SDA

FT/OUT

SDA Serial Data Address Input / Output SCL Serial Clock V

BA T

Frequency Test / Output Driver (Open Drain)

Battery Supp ly Voltage Supply Voltage Ground

AI00530

1/15May 2000

M41T00

Table 2. Absolute Maximum Ratings

Symbol Parameter Value Unit

STG

Note: Stress es greater than thos e listed under "A bsolute Maximum Rati ngs" may cause permanent damage to the device. This i s a stre ss

rating onl y and funct i onal operat i on of the dev i ce at these or any other conditio ns above those indicated in the op erational section of this specification is not implied. Exposure to the absolute maximum rating conditions for extended periods of time may affect reliability.

CAUTION: Negative undershoots below –0.3V are not allowed on any pin while in th e B attery Ba ck- up m ode.

Ambient Operating Temperature –40 to 85 °C Storage Temperature (VCC Off, Oscillator Off) Input or Output Voltages –0.3 to 7 V Supply Voltage –0.3 to 7 V Output Current 20 mA Power Dissipation 0.25 W

–55 to 125 °C

Figure 2. SOIC Connections

M41T00

OSCI V

BAT

1 2 3 4

8 7 6 5

AI00531

FT/OUTOSCO SCL SDAV

The M41T00 clock has a built-in power sense circuit which detects power failures and automatically switches to the battery supply during power failures. The energy needed to sustain the RAM and clock operations can be supplied from a small lithium co in cell.

Typical data retention time is in excess of 5years with a 50mA/h 3V lithium cell. The M41T00 is supplied in 8 lead Plastic Small Outline package.

OPERATION

The M41T00 clock operates as a slave device on the serial bus. Access is obtained by implementing a start condition followed by the correct slave address (D0h). The 8 bytes contained in the device can then be accessed sequentially in the following order:

1. Seconds Regis ter

2. Minutes Register

3. Century/Hours Register

4. Day Register

5. Date Register

6. Month Register

7. Years Register

8. Control Register The M41T00 clock continually monitors V

out of tolerance condition. Shoul d V V

, the device terminates an ac ces s in progress

for an

fall belo w

and resets the device ad dress counter. Inputs to the device will not be recognized at this time to prevent erroneous data from being written to the device from an out of tolerance system. When V

falls below VSO, the device automatically switches over to the battery and powers down into an ult ra low current mode of operation to conserve battery life. Upon power-up, the device switches from battery to V

at VSO and recognizes inputs.

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Figure 3. Block Diagram

M41T00

OSCI

OSCO

FT/OUT

BAT

SCL

SDA

OSCILLATOR

32.768 kHz

VOLTAGE

SENSE and

SWITCH

CIRCUITRY

SERIAL

BUS

INTERFACE

DIVIDER

CONTROL

LOGIC

ADDRESS

1 Hz

SECONDS

MINUTES

CENTURY/HOURS

DAY

DATE

MONTH

YEAR

CONTROL

AI00603

Table 3. Register Map

Address

Data

D7 D6 D5 D4 D3 D2 D1 D0

0 ST 10 Seconds Seconds Seconds 00-59 1 X 10 Minutes Minutes Minutes 00-59

(1)

CEB

CB 10 Hours Hours Century/Hour 0-1/00-23 3 XXXXX Day Day 01-07 4 X X 10 Date Date Date 01-31

5 X X X 10 M. Month Month 01-12 6 10 Years Years Year 00-99 7 OUT FT S Calibration Control

Note: 1. When CEB is set to ’1’, CB will toggle from ’0’ to ’1’ or from ’1’ to ’ 0’ a t the turn of the century (dependent upon the initial value set).

Keys: S = SIGN Bit

When CEB is set to ’0’, CB will not toggle.

FT = FREQUENCY TEST Bit ST = STOP Bit OUT = Output level

X = Don’t care CEB = Cent ury Enable Bit CB = Century Bit

Function/Rang e

BCD Format

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M41T00

Table 4. AC Measurement Conditions

Input Rise and Fall Times ≤ 5ns

0.2V

0.3V

to 0.8V

to 0.7V

Input Pulse Voltages Input and Output Timing Ref.

Voltages

Note that Output Hi-Z is defined as the point where data is no longer driven.

2-WIRE BUS CHARACTERISTICS

This bus is intended for communication between different ICs. It consists of two lines: one bi-directional for data signals (SDA) and one for clock signals (SCL). Both the SDA and the SCL lines must be connected to a positive supply voltage via a pull-up resistor.

The following protocol has been defined: – Data transfer may be initiated only when the bus

is not busy.

– During data trans fer, the dat a line mus t remain

stable whenever the clock line is High. Changes in the data line while the clock line is High will be interpreted as control signals.

Accordingly, the following bus conditions have been defined:

Bus not busy. Both data and clock lines remain High.

Start data transfer. A change in the state of t he data line, from High to Low, while the clock is High, defines the START condition.

Stop data transfer. A change in the state of the data line, from Low to High, while the clock is High, defines the STOP condition.

Figure 4. AC Testing Load Circuit

0.8V

0.2V

0.7V

0.3V

AI02568

Data valid. The state of the data line represents valid data when after a start condition, the data line is stable for the duration of the High period of the clock signal. The data on the line may be changed during the Low period of the clock signal. There is one clock pulse per bit of data.

Each data transfer is initiated with a start condition and terminated with a stop condition. The number of data bytes transferred between the start and stop conditions is not limited. The information is transmitted byte-wide and each receiver acknowledges with a ninth bit.

By definition, a device that gives out a message is called "transmitter", the receiving de vice t hat g ets the message is called "rece iver". The device that controls the message is called "master". The devices that are controlled by the master are cal led "sla ve s".

Table 5. Capacitance

= 25 °C, f = 1 MHz)

Symbol Parameter Min Max Unit

(3)

OUT

Note: 1. Effective capacitance measure d wi th power su pply at 5V.

2. Sampled only, not 100% tested.

3. Outputs deselected.

4/15

(1, 2)

Input Capacitance (SCL) 7 pF Output Capacitance (SDA, FT/OUT) 10 pF Low-pass filter input time constant (SDA and SCL) 250 1000 ns

M41T00

Table 6. DC Characteristics

= –40 to 85°C; VCC = 2.0V to 5.5V)

Symbol Parameter Test Condition Min Typ Max Unit

Input Leakage Current

CC1

CC2

V V

BAT

Note: 1. STMicroelectroni cs recommends the RAYOVA C BR1225 or BR 1632 (or equivalent) as the battery sup pl y.

Output Leakage Current

Supply Current Switch Frequency = 100kHz 300 µA Supply Current (Standby) Input Low Voltage –0.3

Input High Voltage

Output Low Voltage

(1)

Battery Supply Voltage 2 3 3.5 V

Battery Supply Current

Table 7. Power Down/Up Trip Points DC Characteristics

0V ≤ V

OUT

≤ V

SCL, SDA = V

= 3mA

= 25°C, VCC = 0V,

Oscillator ON, V

≤ V

BAT

– 0.3V

= 3V

(1)

0.7 V

±1 µA ±1 µA

70 µA

0.3 V

VCC + 0.8

0.4 V

0.8 1 µA

(TA = –40 to 85°C)

Symbol Parameter Min Typ Max Unit

(2)

Note: 1. All voltages referenced to VSS.

2. Switch-over and deselect poi nt.

Battery Back-up Switchover Voltage

BA T

– 0.70 V

– 0.50 V

BAT

BA T

– 0.30

V V

Table 8. Crystal Electrical Characteristics

(Externally Supplied)

Symbol Parameter Min Typ Max Unit

Note: Load c apacitor s are i ntegra ted within the M41T 00. C ircuit board layout consi deratio ns fo r the 32.768k Hz cry stal of mini mum tr ace

lengths and isolation from RF generating signals should be taken into account . STMicroelectron i cs recommends the KDS DT-38 Tuning Fork Type quartz cry st al for industri al temperatur e operations .

KDS can b e contacted at 913-491-6825 or http://w ww.kdsj.co .j p for further in formation on t hi s crystal type.

Resonant Frequency 32.768 kHz Series Resistance 35 kΩ Load Capacitance 12.5 pF

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