SGS Thomson Microelectronics M29F016B Datasheet

M29F016B

16 Mbit (2Mb x8, Uniform Block) Single Supply Flash Memory

■ SINGLE 5V±10% SUPPLY VOLTAGE for

PROGRAM, ERASE and READ OPERATIONS

■ ACCESS TIME: 55ns

■ PROGRAMMING TIME

–8µs by Byte typical

■ 32 UNIFORM 64 Kbyte MEMORY BLOCKS

■ PROGRAM/ERASE CONTROLLER

– Embedded Byte Program algorithm – Embedded Multi-Block/Chip Erase algorithm – Status Register Polling and Toggle Bits – Ready/Busy Output Pin

■ ERASE SUSPEND and RESUME MODES

– Read and Program another Block during

Erase Suspend

■ TEMPORARY BLOCK UNPROTECTION

MODE

■ UNLOCK BYPASS PROGRAM COMMAND

– Faster Production/Batch Programming

■ LOW POWER CONSUMPTION

– Standby and Automatic Standby

■ 100,000 PROGRAM/ERASE CYCLES per

BLOCK

■ 20 YEARS DATA RETENTION

– Defectivity below 1 ppm/year

■ ELECTRONIC SIGNATURE

– Manufacturer Code: 20h – Device Code: ADh

TSOP40 (N)

10 x 20mm

Figure 1. Logic Diagram

A0-A20

M29F016B

SO44 (M)

DQ0-DQ7

AI02964

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M29F016B

Figure 2. TSOP Connections

A19 A18 A17 A16 G A15 A14 A13 A12

CC NC

A11

10 11

A9 A8 A7 A6 A5 A4

20 21

M29F016B

31 30

AI02969

A20 NC

RB DQ7 DQ6 DQ5 DQ4 V

DQ3 DQ2A10 DQ1 DQ0 A0 A1 A2 A3

Figure 3. SO Connections

RP A11 A12 A10

A9 A8 A7 A6 A5

A4 NC NC

DQ1

DQ3 V

1 2 3 4 5 6 7 8 9 10 11

M29F016B

12 13 14 15 16 17DQ0 18 19 20 21

44 43 42 41 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 2322

AI02965

A13 A14 A15 A16 A17 A18 A19 NC NC A20 NC W G RB DQ7 DQ6DQ2 DQ5 DQ4 V

Table 1. Signal Names

A0-A20 Address Inputs DQ0-DQ7 Data Inputs/Outputs E Chip Enable G Output Enable W Write Enable RP Reset/Block Temporary Unprotect RB Ready/Busy Output V

NC Not Connected Internally

Supply Voltage Ground

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M29F016B

Table 2. Absolute Maximum Ratings

Symbol Parameter Value Unit

Ambient Operating Temperature (Temperature Range Option 1) 0 to 70 °C

BIAS

STG

(2)

Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may

cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions forextended periods mayaffect device reliability. Referalso to theSTMicroelectronics SURE Program and other relevantquality documents.

2. Minimum Voltage may undershoot to –2V during transition and for less than 20ns during transitions.

Ambient Operating Temperature (Temperature Range Option 6) –40 to 85 °C Ambient Operating Temperature (Temperature Range Option 3) –40 to 125 °C Temperature Under Bias –50 to 125 °C

Storage Temperature –65 to 150 °C Input or Output Voltage –0.6 to 6 V Supply Voltage –0.6 to 6 V

Identification Voltage –0.6 to 13.5 V

SUMMARY DESCRIPTION

The M29F016B is a 16 Mbit (2Mb x8) non-volatile memory that can be read, erased and reprogrammed. These operations can be performedusing a single 5V supply. On power-up the memory defaults to its Read mode where it can be read in the same way as a ROM or EPROM.

The memory is divided into blocks that can be erased independently so it is possible to preserve valid data while old data is erased. Blocks can be protected in groups to prevent accidental Program or Erase commands from modifying the memory. Program and Erase commands are written to the Command Interface of the memory. An on-chip

(1)

programming or erasing the memory by taking care of all of the special operations that are required to update the memory contents. The end of a program or eraseoperation can be detected and any error conditions identified. The command set required to control the memory is consistent with JEDEC standards.

Chip Enable, Output Enableand Write Enable signals control the bus operation of the memory. They allow simple connection to most microprocessors, often without additional logic.

The memory is offered in a TSOP40 (10 x 20mm) and SO44 packages and it is supplied with all the bits erased (set to ’1’).

Program/Erase Controllersimplifies the process of

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M29F016B

Table 3. Uniform Block Addresses, M29F016B

Size

(Kbytes)

31 64 1F0000h-1FFFFFh 30 64 1E0000h-1EFFFFh 29 64 1D0000h-1DFFFFh 28 64 1C0000h-1CFFFFh 27 64 1B0000h-1BFFFFh 26 64 1A0000h-1AFFFFh 25 64 190000h-19FFFFh 24 64 180000h-18FFFFh 23 64 170000h-17FFFFh 22 64 160000h-16FFFFh 21 64 150000h-15FFFFh 20 64 140000h-14FFFFh 19 64 130000h-13FFFFh 18 64 120000h-12FFFFh 17 64 110000h-11FFFFh 16 64 100000h-10FFFFh 15 64 0F0000h-0FFFFFh 14 64 0E0000h-0EFFFFh 13 64 0D0000h-0DFFFFh 12 64 0C0000h-0CFFFFh 11 64 0B0000h-0BFFFFh 10 64 0A0000h-0AFFFFh

9 64 090000h-09FFFFh 8 64 080000h-08FFFFh 7 64 070000h-07FFFFh 6 64 060000h-06FFFFh 5 64 050000h-05FFFFh 4 64 040000h-04FFFFh 3 64 030000h-03FFFFh 2 64 020000h-02FFFFh 1 64 010000h-01FFFFh 0 64 000000h-00FFFFh

Address Range

Protection

Group

SIGNAL DESCRIPTIONS

See Figure 1, Logic Diagram, and Table 1, Signal Names, for abrief overview of the signals connected to this device.

Address Inputs (A0-A20). The Address Inputs select the cells in the memory array to access during Bus Read operations. During Bus Write operations they control the commands sent to the Command Interface of the internal state machine.

Data Inputs/Outputs (DQ0-DQ7). The Data Inputs/Outputs output thedatastoredattheselected address during a Bus Read operation. During Bus Write operations they represent the commands sentto theCommandInterfaceoftheinternalstate machine.

Chip Enable (E). The Chip Enable, E, activates the memory, allowing Bus Read and Bus Writeoperations to be performed. When Chip Enable is High, VIH, all other pins are ignored.

Output Enable (G). The Output Enable, G, controls the Bus Read operation of the memory.

Write Enable (W). The Write Enable, W,controls the Bus Write operation of the memory’s Command Interface.

Reset/Block Temporary Unprotect(RP). The Reset/Block Temporary Unprotect pin can be usedto apply a Hardware Reset to the memory or to temporarily unprotect all blocks that have been protected.

A Hardware Reset is achieved by holding Reset/ Block Temporary Unprotect Low, VIL, for at least t

. After Reset/Block Temporary Unprotect

PLPX

goes High, VIH, the memory will be ready for Bus Read and Bus Write operations after t t

, whicheveroccurs last. See the Ready/Busy

RHEL

PHEL

Output section, Table 14 and Figure 11, Reset/ Temporary Unprotect AC Characteristics for more details.

Holding RP at VIDwill temporarily unprotect the protected blocks in the memory. Program and Erase operations on all blocks will be possible. The transition from VIHtoVIDmustbe slower than t

PHPHH

Ready/Busy Output (RB). The Ready/Busy pin is an open-drain output that canbeusedto identify when the memory array can be read. Ready/Busy is high-impedance during Read mode, Auto Select mode and Erase Suspend mode.

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M29F016B

After a Hardware Reset, Bus Read and Bus Write operations cannot begin until Ready/Busy becomes high-impedance. See Table 14 and Figure 11, Reset/Temporary Unprotect AC Characteristics.

During Program or Erase operations Ready/Busy is Low, VOL. Ready/Busy will remain Low during Read/Reset commands or Hardware Resets until the memory is ready to enter Read mode.

The use of an open-drain output allows theReady/ Busy pinsfrom several memories to be connected to asinglepull-up resistor. A Low will then indicate that one, or more, of the memories is busy.

VCCSupply Voltage. The VCCSupply Voltage supplies the power for all operations (Read, Program, Erase etc.).

The CommandInterface is disabled when the V

Supply Voltage is less than the Lockout Voltage, V

. This prevents Bus Write operations from ac-

LKO

cidentally damaging the data during power up, power down and power surges. If the Program/ Erase Controller is programming or erasingduring this time then the operation aborts and the memory contents being altered will be invalid.

A 0.1µF capacitor should be connected between the VCCSupply Voltage pin and the VSSGround pin to decouple the current surges from the power supply. The PCB track widths must be sufficient to carry the currents required during program and erase operations, I

CC4

VSSGround. TheVSSGroundisthereference for all voltage measurements.

BUS OPERATIONS

There are five standard bus operations that control the device. These are Bus Read, Bus Write, Output Disable,Standby and Automatic Standby. See Table 4, Bus Operations,for a summary. Typically glitches of less than 5ns on Chip Enable or Write Enable are ignored by the memory and do not affect busoperations.

Bus Read. Bus Read operations read from the memory cells, or specific registers in the Command Interface. A valid Bus Read operation involves setting the desired addresson the Address Inputs, applying a Low signal, VIL, to Chip Enable and Output Enable and keeping Write Enable High, VIH. The Data Inputs/Outputs will output the value, see Figure 8, Read Mode AC Waveforms, and Table 11, Read AC Characteristics, for details of when the output becomes valid.

Bus Write. Bus Write operations write to the Command Interface. A valid Bus Write operation begins by setting the desired address on the Address Inputs. The Address Inputs are latched by the Command Interface on the falling edge of Chip Enable or Write Enable, whichever occurs last. The Data Inputs/Outputs are latched by the Command Interface on the rising edge of Chip Enable or WriteEnable,whichever occursfirst.OutputEnable must remain High, VIH, during the whole Bus Write operation. See Figures 9 and 10, Write AC Waveforms, and Tables 12 and 13, Write AC Characteristics, for details of the timing requirements.

Output Disable. The Data Inputs/Outputs are in the high impedance state when Output Enable is High, VIH.

Standby. When Chip Enable is High, VIH, the Data Inputs/Outputs pins are placed in the highimpedance state and the Supply Current is reduced to the Standby level.

When Chip Enable is at VIHthe Supply Current is reduced to the TTLStandby Supply Current, I

CC2

To further reduce the Supply Current to the CMOS Standby Supply Current, I

, Chip Enableshould

CC3

be held within VCC± 0.2V. For Standby current levels see Table 10, DC Characteristics.

During program or erase operations the memory will continue to use the Program/Erase Supply Current, I

, forProgramorEraseoperations un-

CC4

til the operation completes.

Table 4. Bus Operations

Operation E G W Address Inputs

Bus Read Bus Write Output Disable X V Standby Read Manufacturer

Code

Read Device Code

Note: X = VILor VIH.

Data

Inputs/Outpu ts

XXX Hi-Z

Cell Address Data Output

Command Address Data Input

XHi-Z

A0 = VIL,A1=VIL,A9=VID,

Others V A0 = VIH,A1=VIL,A9=VID,

Others V

or V

20h

ADh

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M29F016B

AutomaticStandby. IfCMOSlevels (VCC± 0.2V)

are usedto drive the busand the bus is inactive for 150ns or more the memory enters Automatic Standby where the internal Supply Current is reduced to the Standby Supply Current, I

CC3

. The Data Inputs/Outputs will still output data if a Bus Read operation is in progress.

Special Bus Operations

Additional bus operations can be performed to read the Electronic Signature and also to apply and remove Block Protection. These bus operations are intended for use by programming equipment and are not usually used in applications. They require VIDto be applied to some pins.

Electronic Signature. The memory has two codes, the manufacturer code and the device code, that can be read to identify the memory. These codes can be read by applying the signals listed in Table 4, Bus Operations.

Block Protection and Blocks Unprotec tion. Blocks can beprotectedin groups against accidental Program or Erase. See Table 3, Block Addresses, for details ofwhich blocks must be protected together as a group. Protected blocks can be unprotected to allow data to be changed.

There are two methods available for protecting and unprotecting the blocks, one for use on programming equipment and the other for in-system use. For further information refer to Application Note AN1122, Applying Protection and Unprotection to M29 Series Flash.

COMMAND INTERFACE

All Bus Write operations to the memory are interpreted by the Command Interface. Commands consist of one or more sequential Bus Write operations. Failureto observe a valid sequence of Bus Write operations will result in the memory returning to Read mode. The longcommand sequences are imposed to maximize data security.

The commands are summarized in Table 5, Commands. Refer to Table 5 in conjunction with the text descriptions below.

Read/Reset Command. The Read/Reset command returnsthememory to its Read mode where it behaves like a ROM or EPROM. It also resets the errors in the Status Register. Either one or three Bus Write operations can be used to issue the Read/Reset command.

If the Read/Reset command is issued during a Block Eraseoperationor following a Programming or Eraseerrorthenthe memory will take upto 10µs to abort. During the abort period no valid data can be read from the memory. Issuing a Read/Reset command during a Block Erase operation will leave invalid data in the memory.

Auto Select Command. The Auto Select command is used to read the Manufacturer Code, the Device Code and the Block Protection Status. Three consecutive Bus Write operations are required to issue the Auto Select command. Once the Auto Select command is issued the memory remains in Auto Select mode until another command is issued.

From the Auto Select mode the Manufacturer Code can be read using a Bus Read operation with A0 = VILandA1 = VIL. The other address bits may be set to either VILor VIH. The Manufacturer Code for STMicroelectronics is 20h.

The Device Code can be read using a Bus Read operation with A0 = VIHand A1 = VIL. The other address bits may be set to either VILor VIH. The Device Code for the M29F016B is ADh.

The Block Protection Status of each block can be read using a Bus Read operation with A0 = VIL, A1 = VIH, and A16-A20 specifying the address of the block. The other address bits may be set to either VILor VIH. If the addressed block is protected then 01his outputon the Data Inputs/Outputs, otherwise 00h is output.

Program Command. The Program command can be used to program a value to one address in the memory array at a time. The command requires fourBus Write operations,the final write operation latches theaddress and data in the internal state machine and starts the Program/Erase Controller.

If the address falls in a protected block then the Program command is ignored, the data remains unchanged. The Status Register is never read and no error condition is given.

During the program operation the memory will ignore all commands. It is not possible to issue any command to abort or pause theoperation. Typical program times are given in Table 6. BusRead operations during the program operation will output the Status Register on the Data Inputs/Outputs. See the section on the Status Register for more details.

After the program operation has completed the memory will return to the Read mode, unless an error has occurred. When an error occurs the memory will continue to output the Status Register. A Read/Reset command must beissued to reset the error condition and return to Read mode.

Note that the Program command cannotchange a bit set at ’0’ back to ’1. One of the Erase Commands must be used to set all the bits in ablock or in the whole memory from ’0’ to ’1’.

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M29F016B

Table 5. Commands

Bus Write Operations

Command

Read/Reset

Auto Select 3 555 AA 2AA 55 555 90 Program 4 555 AA 2AA 55 555 A0 PA PD Unlock Bypass 3 555 AA 2AA 55 555 20 Unlock Bypass

Program Unlock Bypass Reset 2 X 90 X 00 Chip Erase 6 555 AA 2AA 55 555 80 555 AA 2AA 55 555 10 Block Erase 6+ 555 AA 2AA 55 555 80 555 AA 2AA 55 BA 30 Erase Suspend 1 X B0 Erase Resume 1 X 30

Note: X Don’t Care, PA Program Address, PD Program Data, BA Any address in the Block. All values in the table are in hexadecimal.

The Command Interface only uses address bits A0-A10 to verify the commands, the upper address bits are Don’t Care.

Read/Reset. After a Read/Reset command, read the memory as normal until another command is issued. Auto Select. After an Auto Select command, read Manufacturer ID, Device ID or Block Protection Status. Program, Unlock Bypass Program, Chip Erase, Block Erase. After these commands read the Status Register until the Program/Erase

Controller completes and the memory returns to Read Mode. Add additional Blocks during Block Erase Command with additional Bus Write Operations until the Timeout Bit is set.

Unlock Bypass. After the Unlock Bypass command issue Unlock Bypass Program or Unlock Bypass Reset commands. Unlock Bypass Reset. After the Unlock Bypass Reset command read the memory asnormal until another command is issued. Erase Suspend. After the EraseSuspend command readnon-erasing memory blocksasnormal, issue Auto Select and Program commands

on non-erasing blocks as normal. Erase Resume. After the Erase Resume command the suspended Erase operation resumes, read the Status Register until the Program/

Erase Controller completes and the memory returns to Read Mode.

1X F0 3 555 AA 2AA 55 X F0

2X A0PAPD

1st 2nd 3rd 4th 5th 6th

Length

Addr Data Addr Data Addr Data Addr Data Addr Data Addr Data

Unlock Bypass Command. The Unlock Bypass

command is used in conjunction with the Unlock Bypass Programcommandtoprogram the memory. When the access time to the device is long (as with some EPROM programmers) considerable time saving can be made by using these commands. Three Bus Write operations are required to issue the Unlock Bypass command.

Once the Unlock Bypass command has been issued the memory will only accept the Unlock Bypass Program command and the Unlock Bypass Reset command. The memory can be readas if in Read mode.

Unlock Bypass Program Command. The Unlock Bypass Program command can be used to program one address in memory at a time. The command requires two Bus Write operations, the final

write operation latches the address and datainthe internal state machine and starts the Program/ Erase Controller.

The Program operation using the Unlock Bypass Program command behaves identically to the Program operation using the Program command. A protected block cannot be programmed; the operation cannot be abortedand theStatusRegister is read. Errors must be reset using the Read/Reset command, which leaves the device in Unlock Bypass Mode. See theProgram command for details on the behavior.

Unlock Bypass Reset Command. The Unlock Bypass Reset command can be used to return to Read/Reset mode from Unlock Bypass Mode. TwoBus Write operationsarerequiredtoissuethe Unlock Bypass Reset command.

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