The M27W102 is a low voltage 1 Mbit EPROM
offeredinthetworangesUV(ultravioleterase)and
OTP (one time programmable).It is ideallysuited
formicroprocessorsystemsrequiring large data or
programstorageandisorganizedas 65,536words
by 16 bits.
The M27V102 operates in the read mode with a
supply voltage as low as 3V. The decrease in
operating power allows either a reduction of the
size of the battery or an increase in the time between batteryrecharges.
The FDIP40W(window ceramic frit-seal package)
has a transparent lid which allows the user to
expose the chip to ultraviolet light to erase the bit
pattern. A new pattern can then be written to the
deviceby following theprogramming procedure.
For application where the content is programmed
only one time and erasure is not required, the
M27V102 is offered in PDIP40, PLCC32 and
TSOP40(10 x 14 mm) packages.
DEVICEOPERATION
Theoperating modes of the M27V102are listedin
theOperating Modestable. Asingle powersupply
is required in the read mode. All inputs are TTL
levelsexcept for Vpp and 12V onA9 for Electronic
Signature.
ReadMode
The M27V102 has two control functions, both of
whichmustbelogicallyactiveinordertoobtaindata
attheoutputs. ChipEnable(E) isthepowercontrol
and should be used for device selection. Output
Enable(G)isthe outputcontrolandshouldbe used
to gate data to the output pins, independent of
deviceselection. Assumingthatthe addressesare
stable,the addressaccesstime(t
thedelayfrom Etooutput(t
at the output after a delay of t
). Datais available
ELQV
OE
) is equal to
AVQV
from the falling
edge of G, assuming that E has been low and the
addresses have been stable for at least t
.
t
GLQV
AVQV
-
2/15
M27V102
Table 2. Absolute MaximumRatings
(1)
SymbolParameterValueUnit
T
A
T
BIAS
T
STG
V
IO
V
CC
V
A9
V
PP
Notes: 1. Except for therating ”Operating Temperature Range”, stresses above those listed in theTable ”AbsoluteMaximum Ratings”
2. Minimum DC voltage on Input or Output is –0.5V withpossible undershootto –2.0Vfor a periodless than 20ns. Maximum DC
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias–50 to 125
Storage Temperature–65 to 150°C
(2)
Input or Output Voltages (except A9)–2 to 7V
Supply Voltage–2 to 7V
(2)
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
may cause permanent damage to thedevice. These are stress ratings only and operation of the device at these or any other
conditions above those indicatedin the Operating sections of this specification is not implied. Exposure to Absolute Maximum
Rating conditions for extendedperiods may affectdevice reliability.Refer also to the STMicroelectronics SURE Programand other
relevant qualitydocuments.
voltage on Output is V
+0.5Vwith possible overshoot to VCC+2V for a periodless than 20ns.
CC
(3)
–40 to 125°C
°
C
Table 3. OperatingModes
ModeEGPA9V
ReadV
Output DisableV
ProgramV
VerifyV
Program InhibitV
StandbyV
Electronic SignatureV
Note: X=VIHor VIL,VID= 12V±0.5V
PP
IL
IL
IL
IL
IH
IH
IL
V
IL
V
IH
XV
V
IL
XXXVPPHi-Z
XXXV
V
IL
V
IH
XXV
PulseXV
IL
V
IH
V
IH
XV
CC
CC
or V
or V
PP
SS
SS
XVPPData Output
or V
CC
SS
V
ID
V
CC
Q0 - Q15
Data Output
Hi-Z
Data Input
Hi-Z
Codes
Table 4. ElectronicSignature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s CodeV
Device CodeV
IL
IH
00100000 20h
10001100 8Ch
StandbyMode
TheM27V102hasastandbymode whichreduces
the active current from 15mA to 20µA with low
voltageoperationV
≤ 3.6V,see Read Mode DC
CC
Characteristics table for details. The M27V102 is
placedin thestandbymodeby applyinga TTLhigh
signal to the E input. When in the standby mode,
the outputs are in a high impedance state, independentof the G input.
Two Line Output Control
BecauseEPROMs areusuallyusedin largermemory arrays, this product features a 2 line control
functionwhich accommodatesthe use of multiple
memoryconnection. Thetwo line control function
allows:
a. the lowestpossible memory powerdissipation,
b. complete assurancethat outputbus contention
will not occur.
3/15
M27V102
Table 5. AC MeasurementConditions
High SpeedStandard
Input Rise and Fall Times
Input Pulse Voltages0 to 3V0.4V to 2.4V
Input and Output TimingRef. Voltages1.5V0.8V and 2V
≤
10ns
≤
20ns
Figure3. AC TestingInput Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table6. Capacitance
SymbolParameterTest ConditionMinMaxUnit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input CapacitanceVIN=0V6pF
Output CapacitanceV
(1)
(TA=25°C, f = 1 MHz )
2.0V
0.8V
AI01822
Figure4. AC Testing LoadCircuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed
CL= 100pFfor Standard
CLincludes JIG capacitance
=0V12pF
OUT
OUT
AI01823B
Forthe mostefficientuseof thesetwocontrollines,
E should be decoded and used as the primary
deviceselecting function,while G shouldbe made
a common connection to all devices in the array
and connected to the READ line from the system
controlbus. Thisensuresthatall deselectedmemory devices are in their low power standby mode
and that the outputpinsare only active whendata
is requiredfrom a particularmemory device.
SystemConsiderations
The power switching characteristics of Advanced
CMOS EPROMsrequire carefuldecouplingof the
devices. The supply current, I
, has three seg-
CC
ments that are of interest to the system designer:
the standby current level, the active current level,
and transient current peaks that are produced by
thefallingand risingedgesof E. Themagnitudeof
4/15
transientcurrentpeaksisdependentonthe capacitive and inductive loading of the device at the
output.
The associated transient voltage peaks can be
suppressedby complying with the two line output
control and by properly selected decoupling capacitors. It is recommended thata 0.1µF ceramic
capacitor be used on every device between V
CC
andVSS. Thisshouldbea highfrequencycapacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
betweenVcc and V
for everyeight devices.The
SS
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitoris to overcome the voltage drop caused
by the inductiveeffectsof PCBtraces.
M27V102
Table 7. Read Mode DC Characteristics
(1)
(TA=0 to 70 °C or –40 to 85 °C;VCC= 3.3V ± 10%; VPP=VCC)
SymbolParameterTestConditionMinMaxUnit
I
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
V
IH
V
V
Notes: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
Table 8A. Read ModeAC Characteristics
Input Leakage Current0V ≤ VIN≤ V
LI
Output Leakage Current0V ≤ V
,G=VIL,I
E=V
Supply Current
IL
f = 5MHz, V
Supply Current (Standby) TTLE = V
Supply Current (Standby)
CMOS
E>V
– 0.2V,V
CC
Program CurrentVPP=V
Input Low Voltage–0.30.8V
IL
(2)
Input High Voltage2VCC+1V
Output Low VoltageIOL= 2.1mA0.4V
OL
Output High VoltageTTLIOH= –400µA2.4V
OH
Output High Voltage CMOSI
2. Maximum DCvoltage on Output is V
CC
+0.5V
(1)
= –100µAV
OH
OUT
CC
≤ V
CC
= 0mA,
OUT
≤ 3.6V
CC
IH
3.6V20
≤
CC
CC
– 0.7VV
CC
±10µA
±10µA
15mA
1mA
10
(TA=0 to 70 °C or –40 to 85 °C;VCC= 3.3V ± 10%; VPP=VCC)
A
µ
A
µ
SymbolAltParameterTest Condition
-90
(3)
MinMaxMinMax
t
t
AVQV
t
ELQV
t
GLQV
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
Notes: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously with or afterV
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurementconditions.
Address Valid to Output ValidE = VIL,G=V
ACC
tCEChip Enable Low to Output ValidG = V
tOEOutput Enable Low to Output ValidE = V
tDFChip Enable High to Output Hi-ZG = V
tDFOutput Enable Highto Output Hi-ZE = V