SGS Thomson Microelectronics M27C801-80N6X, M27C801-80N6TR, M27C801-80N1X, M27C801-80N1TR, M27C801-80K6X Datasheet

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8 Mbit (1Mb x 8) UV EPROM and OTP EPROM
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
ACCESS TIME: 45ns
LOW POWER CONSUMPTION:
– Active Current 35mA at 5MHz – Standby Current 100µA
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIME: 50µs/word
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h – Device Code: 42h
DESCRIPTION
The M27C801 is a n 8 Mbit EPROM of fe red i n the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for applica­tions where fast turn-around and pattern experi­mentation are important requirements and is organized as 1,048,576 by 8 bits.
The FDIP32W (window ceramic frit-seal package) has transparent lid which allows the user to ex­pose the chip to ultraviolet light to erase the bit pat­tern. A new pattern can then be written to the device by following the programming procedure.
For applications where the content is programmed only one time and erasure is not required, the M27C801 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.
M27C801
32
1
FDIP32W (F)
PLCC32 (K)
Figure 1. Logic Diagram
20
A0-A19 Q0-Q7
32
1
PDIP32 (B)
TSOP32 (N)
8 x 20 mm
V
CC
8
GV
PP
E
M27C801
V
SS
AI01267
1/16September 2000
M27C801
Figure 2A. DIP Connections
A19 V
1 2
A15
3
A12
4 5
A7
6
A6
7
A5
8
A4 A3 A2 A1 A0
Q0
Q2 SS
9 10 11 12 13 14 15 16
M27C801
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
AI01268
CC
A18A16 A17 A14 A13 A8 A9 A11 GV A10 E Q7 Q6 Q5Q1 Q4 Q3V
PP
Figure 2B. PLCC Connections
CC
A16
A7 A6 A5 A4 A3 A2 A1 A0
Q0
A12
9
Q1
A19
A15
1
M27C801
17
Q2
Q3
SS
V
V
32
Q4
A18
Q5
A17
25
Q6
A14 A13 A8 A9 A11 GV A10 E Q7
AI01814
PP
Figure 2C. TSOP Connections
A11 GV
A9
A8 A13 A14 A17 A18
V
CC
A19 A16 A15 A12
A7
A6
A5
A4 A3
1
M27C801
8
(Normal)
9
16 17
32
25 24
AI01269
A10 E Q7 Q6 Q5 Q4 Q3 V
SS
Q2 Q1 Q0 A0 A1 A2
PP
Table 1. Signal Names
A0-A19 Address Inputs Q0-Q7 Data Outputs E Chip Enable
V
G
PP
V
CC
V
SS
Output Enable / Program Supply Supply Voltage Ground
2/16
M27C801
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the ratin g " Operating Temperat ure Range", stresses above th ose listed i n the Tabl e " A bsolute M aximum Ratings" may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indi cated in t he Opera t in g sections of thi s specifi cation i s not imp l i ed. Exposu re to Ab solute Maxi m um Rati ng condi ­tions for extended per iods may aff ect device reliabilit y. Refer also to the STMicroel ectronics SURE Program an d other relevan t qual ­ity docum en ts .
2. Min imum DC volta ge on In put or O utput is –0.5V with possible under shoot t o –2.0V f or a period less th an 20ns. Maximu m DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias –50 to 125 °C Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V A9 Voltage –2 to 13.5 V Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC +2V for a period l ess than 20n s.
CC
(3)
–40 to 125 °C
Table 3. Operating Modes
Mode E
Read Output Disable Program Program Inhibit Standby Electronic Signature
Note: X = VIH or VIL, VID = 12V ± 0.5V.
V
IL
V
IL
V
Pulse V
IL
V
IH
V
IH
V
IL
GV
V
pp
V
IL
V
IH
PP
PP
A9 Q7-Q0
X Data Out X Hi-Z X Data In X Hi-Z
X X Hi-Z
V
IL
V
ID
Codes
Table 4. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code Device Code
V
IL
V
IH
00100000 20h 01000010 42h
3/16
M27C801
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times Input Pulse Voltages 0 to 3V 0.4 to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8 and 2V
10ns
20ns (10% to 90%)
Figure 3. AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
(1)
(TA = 25 °C, f = 1 MHz)
Input Capacitance Output Capacitance
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
DEVICE UNDER
TEST
CL = 30pF for High Speed CL = 100pF for Standard CL includes JIG capacitance
V
= 0V
IN
V
= 0V
OUT
1N914
3.3k
CL
6pF
12 pF
OUT
AI01823B
DEVICE OPERATION
The operating modes of the M27C801 are listed in the Operating Modes table. A single power supply is required in the read mode. All inputs are TTL levels exce pt for G
VPP and 12V on A9 for Elec-
tronic Signature and Margin Mode Set or Reset.
Read Mode
The M27C801 has two cont rol functions, both of which must be logically ac tive in order to obtain data at the output s. Chip Enable (E
) is the power control and should be used for device selection. Output Enable (G
) is the output control and should be used to gate data to the output pins, indepen­dent of device selection. Assuming that the ad-
4/16
dresses are stable, the address access time
) is equal to the delay from E to output
(t
AVQV
(t
). Data is available at the output after a delay
ELQV
of t
has been low and the addresses have been sta-
E ble for at least t
from the falling edge of G, assum ing that
GLQV
AVQV-tGLQV
.
Standby Mode
The M27C801 has a standby mode which reduces
the supply current from 35mA to 100µA. The M27C801 is placed in the standby mode by
applying a CMOS high signal to the E
input. When in the standby mode, the outputs are in a high im­pedance state, independent of the G
VPP input.
M27C801
Table 7. Read Mode DC Characteristics
(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
Symbol Parameter Test Condition Min Max Unit
I
LI
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
V
IH
V
OL
Input Leakage Current
Output Leakage Current
Supply Current
Supply Current (Standby) TTL Supply Current (Standby) CMOS Program Current Input Low Voltage –0.3 0.8 V
IL
(2)
Input High Voltage 2 Output Low Voltage Output High Voltage TTL
V
OH
Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter VPP.
2. Max imum DC voltage on Output i s V
Table 8A. Read Mode AC Characteristics
Output High Voltage CMOS
CC
+0.5 V.
(1)
0V ≤ V
0V ≤ V
E
= VIL, GVPP = VIL,
I
OUT
E
I
≤ V
IN
CC
≤ V
OUT
CC
= 0mA, f = 5MHz
E
= V
IH
> VCC – 0.2V
V
= V
PP
CC
I
= 2.1mA
OL
I
= –1mA
OH
= –100µAV
OH
±10 ±10
35 mA
1mA
100
10
V
+ 1
CC
0.4 V
3.6 V – 0.7
CC
(TA = 0 to 70 °C or –40 to 85 °C; VCC = 5V ± 10%)
M27C801
Symbol Alt Parameter
t
AVQVtACC
t
ELQV
t
GLQV
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
Note: 1. VCC must be ap pl i e d simultaneously with or before VPP and removed simultaneously or af ter V
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC meas urement conditions.
Address Valid to Output Valid
t
Chip Enable Low to Output Valid
CE
t
Output Enable Low to Output Valid
OE
t
Chip Enable High to Output Hi-Z
DF
t
Output Enable High to Output Hi-Z
DF
Address Transition to Output
t
OH
Transition
Test
Condition
E
= VIL,
G
VPP = V
G
VPP = V
E
= V
IL
G
VPP = V
E
= V
IL
= VIL,
E
G
VPP = V
IL
IL
IL
IL
-45
(3)
-60 -70
Min Max Min Max Min Max
45 60 70 ns
45 60 70 ns 25 30 35 ns
025025030ns 025025030ns
000ns
PP.
A
µ
A
µ
A
µ
A
µ
V
V
Unit
Two Line Outp ut C ontrol
Because EPROMs are usually used in larger memory arrays, the product feat ures a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control function allows:
a. the lowest possible memory power dissipation, b. complete assurance tha t output bus contention
will not occur.
For the most efficient use of these two control lines, E ry device selecting function, while G
should be decoded and used as the prima-
should be made a common connectio n to all devices in the array and connected to the READ
line from the system control bus. This ensures that all deselect­ed memory devices are in their low power standby mode and that the output pins are only active when data is required from a particular memory device.
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