– Active Current 35mA at 5MHz
– Standby Current 100µA
■ PROGRAMMING VOLTAGE: 12.75V
■ PROGRAMMING TIME: 50
■ ELECTRONIC SIGNATURE
s/word
µ
0.25V
±
– Manufacturer Code: 20h
– Device Code: 42h
DESCRIPTION
The M27C801 is an 8 Mbit EPROM offered in the
two ranges UV (ultra violet erase) and OTP (one
time programmable). It isideally suited for applications where fast turn-around and pattern experimentation are important requirements and is
organized as 1,048,576 by 8 bits.
The FDIP32W (window ceramic frit-seal package)
has transparent lid which allows the user to expose the chipto ultraviolet light to erasethebitpattern. A new pattern can then be written to the
device by following the programming procedure.
For applications where the content is programmed
only one time and erasure is not required, the
M27C801 is offered in PDIP32, PLCC32 and
TSOP32 (8 x 20 mm) packages.
A0-A19Address Inputs
Q0-Q7Data Outputs
EChip Enable
GV
V
V
PP
CC
SS
Output Enable / Program Supply
Supply Voltage
Ground
2/16
M27C801
Table 2. Absolute Maximum Ratings
(1)
SymbolParameterValueUnit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stresses above those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions
above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating conditions for extended periods may affect device reliability. Referalso to the STMicroelectronics SUREProgram andotherrelevant quality documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC
voltage on Output is V
3. Depends on range.
Ambient Operating Temperature
Temperature Under Bias–50 to 125°C
Storage Temperature–65 to 150°C
Input or Output Voltage (except A9)–2 to 7V
Supply Voltage–2 to 7V
A9 Voltage–2 to 13.5V
Program Supply Voltage–2 to 14V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125°C
Table 3. Operating Modes
ModeE
Read
Output DisableV
Program
V
Program InhibitV
Standby
Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
PulseV
IL
IH
V
IH
V
IL
GV
V
V
pp
V
IL
IH
PP
PP
A9Q7-Q0
XData Out
XHi-Z
XData In
XHi-Z
XXHi-Z
V
IL
V
ID
Codes
Table 4. Electronic Signature
IdentifierA0Q7Q6Q5Q4Q3Q2Q1Q0Hex Data
Manufacturer’s Code
Device Code
V
IL
V
IH
00100000 20h
01000010 42h
3/16
M27C801
Table 5. AC Measurement Conditions
High SpeedStandard
Input Rise and Fall Times≤ 10ns≤ 20ns (10% to 90%)
Input Pulse Voltages0 to 3V0.4 to 2.4V
Input and Output Timing Ref. Voltages1.5V0.8 and 2V
Figure 3. AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
SymbolParameterTest ConditionMinMaxUnit
C
IN
C
OUT
Note: 1. Sampled only,not 100% tested.
(1)
(TA=25°C, f = 1 MHz)
Input Capacitance
Output CapacitanceV
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3kΩ
DEVICE
UNDER
TEST
C
L
CL= 30pF for High Speed
CL= 100pF for Standard
CLincludes JIG capacitance
V
=0V
IN
=0V12pF
OUT
6pF
OUT
AI01823B
DEVICE OPERATION
The operating modes of the M27C801 are listed in
the Operating Modes table. A single power supply
is required in the read mode. All inputs are TTL
levels except for GVPPand 12V on A9 for Electronic Signature and Margin Mode Set or Reset.
Read Mode
The M27C801 has two control functions, both of
which must be logically active in order to obtain
data at the outputs. Chip Enable (E) is the power
control and should be used for device selection.
Output Enable(G) is the output control and should
be used to gate data to the output pins, independent of device selection. Assuming that the ad-
4/16
dresses are stable, the address access time
(t
) is equal to the delay from E to output
AVQV
(t
). Data is availableat the outputafter a delay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low and the addresses havebeen stable for at least t
AVQV-tGLQV
.
Standby Mode
The M27C801 has a standby mode which reduces
the supply current from 35mA to 100µA.
The M27C801 is placed in the standby mode by
applying a CMOS high signal to the E input. When
in the standby mode, the outputs are in a high impedance state, independent of the GVPPinput.
M27C801
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to 70°C or –40 to 85°C; VCC=5V±10%)
SymbolParameterTest ConditionMinMaxUnit
I
I
LO
I
CC
I
CC1
I
CC2
I
PP
V
V
IH
V
Input Leakage Current
LI
Output Leakage Current
Supply Current
Supply Current (Standby) TTL
Supply Current (Standby) CMOSE > VCC– 0.2V100µA
Program Current
Input Low Voltage–0.30.8V
IL
(2)
Input High Voltage2VCC+1V
Output Low VoltageIOL= 2.1mA0.4V
OL
Output High Voltage TTL
V
OH
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Maximum DC voltage on Output is V
Table 8A. Read Mode AC Characteristics
Output High Voltage CMOSI
+0.5V.
CC
(1)
0V ≤ V
0V ≤ V
OUT
E=V
,GVPP=VIL,
IL
= 0mA, f = 5MHz
I
OUT
E=V
V
PP=VCC
I
= –1mA
OH
= –100µAV
OH
≤ V
IN
CC
≤ V
CC
±10µA
±10µA
35mA
IH
1mA
10µA
3.6V
– 0.7V
CC
(TA= 0 to 70 °C or –40 to 85 °C; VCC=5V±10%)
M27C801
SymbolAltParameter
t
AVQVtACC
t
ELQV
t
GLQV
(2)
t
EHQZ
(2)
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after V
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Address Valid to Output Valid
t
Chip Enable Low to Output Valid
CE
t
Output Enable Low to Output Valid
OE
t
Chip Enable High to Output Hi-Z
DF
t
Output Enable High to Output Hi-Z
DF
Address Transition to Output
t
OH
Transition
Test
Condition
E=V
IL
GV
PP=VIL
GV
PP=VIL
E=V
IL
GV
PP=VIL
E=V
IL
E=V
IL
GV
PP=VIL
,
,
(3)
-45
-60-70
MinMaxMinMaxMinMax
456070ns
456070ns
253035ns
025025030ns
025025030ns
000ns
PP.
Unit
Two Line Output Control
Because EPROMs are usually used in larger
memory arrays, the product features a 2 line control function which accommodates the use of multiple memory connection. The two line control
function allows:
a. the lowest possible memory power dissipation,
b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control
lines, Eshould bedecoded and used as the primary device selecting function, while G should be
made a common connection to all devices in the
array and connected to the READ line from the
system control bus. Thisensures that all deselected memory devices are in their low power standby
mode and that the output pins are only active
when data is required from a particular memory
device.
5/16
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