SGS Thomson Microelectronics M27C256B-15F1, M27C256B-12C1TR, M27C256B-12C1, M27C256B-12B6, M27C256B-12B3 Datasheet

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1/16April 2001
M27C256B
256 Kbit (32Kb x 8) UV EPROM and OTP EPROM
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
ACCESS TIME: 45ns
LOW POWER CONSUMPTION:
PROGRAMMING VOLTAGE: 12.75V ± 0.25V
PROGRAMMING TIME: 100µs/word
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h – Device Code: 8Dh
DESCRIPTION
The M27C256B is a 256 Kbit EPROM offered in the two ranges UV (ultra violet erase) and OTP (one timeprogrammable). Itis ideally suitedformi­croprocessor systems and is organized as32,768 by 8 bits.
The FDIP28W (window ceramic frit-seal package) has a transparent lid which allows the user to ex­pose thechipto ultraviolet lightto erase thebitpat­tern. A new pattern can then be written to the device by following the programmingprocedure.
For applications where the content is programmed only one time and erasure is not required, the M27C256B is offered in PDIP28, PLCC32 and TSOP28 (8 x 13.4 mm) packages.
Figure 1. Logic Diagram
AI00755B
15
A0-A14 Q0-Q7
V
PP
V
CC
M27C256B
G
E
V
SS
8
1
28
28
1
FDIP28W (F) PDIP28 (B)
PLCC32 (C) TSOP28 (N)
8 x 13.4 mm
M27C256B
2/16
Figure 2B. LCC Connections
AI00757
A13
A8
A10
Q4
17
A0
NC
Q0
Q1
Q2
DU
Q3
A6
A3 A2 A1
A5 A4
9
A14
A9
1
V
PP
A11
Q6
A7
Q7
32
DU
V
CC
M27C256B
A12
NC
Q5
G
E
25
V
SS
Figure 2A. DIP Connections
A1 A0
Q0
A7
A4 A3 A2
A6 A5
A13
A10
A8 A9
Q7
A14
A11 G
E
Q5Q1
Q2
Q3V
SS
Q4
Q6
A12
V
PP
V
CC
AI00756
M27C256B
8
1 2 3 4 5 6 7
9 10 11 12 13 14
16 15
28 27 26 25 24 23 22 21 20 19 18 17
Figure 2C. TSOP Connections
A1
A0
Q0
A5
A2
A4 A3
A9
A11
Q7
A8
G
E
Q5
Q1
Q2
Q3
Q4
Q6 A13 A14
A12
A6
V
PP
V
CC
A7
AI00614B
M27C256B
28 1
22
78
14
15
21
V
SS
A10
Table 1. Signal Names
A0-A14 Address Inputs Q0-Q7 Data Outputs E Chip Enable G Output Enable V
PP
Program Supply
V
CC
Supply Voltage
V
SS
Ground NC Not Connected Internally DU Don’t Use
3/16
M27C256B
Table 2. Absolute Maximum Ratings
(1)
Note: 1. Except for the rating ”Operating Temperature Range”, stressesabove those listed in the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device atthese or any other conditions above those indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi­tions for extended periods may affect device reliability. Referalso tothe STMicroelectronics SUREProgram and otherrelevant qual­ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is V
CC
+0.5V withpossible overshoot to VCC+2V for a period less than20ns.
3. Depends on range.
Table 3. Operating Modes
Note: X = VIHor VIL,VID= 12V ± 0.5V.
Table 4. Electronic Signature
Symbol Parameter Value Unit
T
A
Ambient Operating Temperature
(3)
–40 to 125 °C
T
BIAS
Temperature Under Bias –50 to 125 °C
T
STG
Storage Temperature –65 to 150 °C
V
IO
(2)
Input or Output Voltage (except A9) –2 to 7 V
V
CC
Supply Voltage –2 to 7 V
V
A9
(2)
A9 Voltage –2 to 13.5 V
V
PP
Program Supply Voltage –2 to 14 V
Mode E G A9
V
PP
Q7-Q0
Read
V
IL
V
IL
X
V
CC
Data Out
Output Disable V
IL
V
IH
XVCCHi-Z
Program
V
IL
Pulse V
IH
X
V
PP
Data In
Verify V
IH
V
IL
XVPPData Out
Program Inhibit
V
IH
V
IH
X
V
PP
Hi-Z
Standby
V
IH
XX
V
CC
Hi-Z
Electronic Signature
V
IL
V
IL
V
ID
V
CC
Codes
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code
V
IL
00100000 20h
Device Code
V
IH
10001101 8Dh
M27C256B
4/16
DEVICE OPERATION
The operating modes of the M27C256B are listed in the Operating Modes. A single power supply is required in the read mode. All inputs are TTL lev­els except for VPPand 12V on A9 for Electronic Signature.
Read Mode
The M27C256B has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable(G) isthe outputcontrol and should be used to gate data to the output pins, indepen­dent of device selection. Assuming that the ad-
dresses are stable, the address access time (t
AVQV
) is equal to the delay from E to output
(t
ELQV
). Data is available at the output after delay
of t
GLQV
from the falling edge of G, assuming that E has been low andthe addresses have been sta­ble for at least t
AVQV-tGLQV
.
Standby Mode
The M27C256B has a standby modewhich reduc­es the supply current from 30mA to 100µA. The M27C256B is placed in the standby mode by ap­plying a CMOS high signalto the E input. When in the standby mode, theoutputs are ina high imped­ance state,independent of the G input.
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and FallTimes 10ns 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V Input and Output Timing Ref.Voltages 1.5V 0.8V and 2V
Figure 3. AC Testing Input Output Waveform
AI01822
3V
High Speed
0V
1.5V
2.4V
Standard
0.4V
2.0V
0.8V
Figure 4. AC Testing Load Circuit
AI01823B
1.3V
OUT
C
L
CL= 30pF for HighSpeed CL= 100pF for Standard CLincludes JIG capacitance
3.3k
1N914
DEVICE UNDER
TEST
Table 6. Capacitance
(1)
(TA=25°C, f = 1 MHz)
Note: 1. Sampled only, not 100% tested.
Symbol Parameter Test Condition Min Max Unit
C
IN
Input Capacitance
V
IN
=0V
6pF
C
OUT
Output Capacitance
V
OUT
=0V
12 pF
5/16
M27C256B
Table 7. Read Mode DC Characteristics
(1)
(TA= 0 to70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC=5V±5% or 5V ± 10%; VPP=VCC)
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Maximum DC voltage on Output is V
CC
+0.5V.
Table 8A. Read Mode AC Characteristics
(1)
(TA= 0 to70°C, –40 to 85°C, –40 to 105°C or –40 to 125°C; VCC=5V±5% or 5V ± 10%; VPP=VCC)
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. Speed obtained with High Speed AC measurement conditions.
Symbol Parameter Test Condition Min Max Unit
I
LI
Input Leakage Current 0V VIN≤ V
CC
±10 µA
I
LO
Output Leakage Current
0V V
OUT
V
CC
±10 µA
I
CC
Supply Current
E=V
IL
,G=VIL,
I
OUT
= 0mA, f = 5MHz
30 mA
I
CC1
Supply Current (Standby) TTL
E=V
IH
1mA
I
CC2
Supply Current (Standby) CMOS
E>V
CC
– 0.2V
100 µA
I
PP
Program Current
V
PP=VCC
100 µA
V
IL
Input Low Voltage –0.3 0.8 V
V
IH
(2)
Input High Voltage 2
V
CC
+1
V
V
OL
Output Low Voltage
I
OL
= 2.1mA
0.4 V
V
OH
Output High VoltageTTL
I
OH
= –1mA
3.6 V
Output High VoltageCMOS
I
OH
= –100µAV
CC
– 0.7V
V
Symbol Alt Parameter Test Condition
M27C256B
Unit
-45
(3)
-60 -70 -80
Min Max Min Max Min Max Min Max
t
AVQVtACC
Address Valid to Output Valid
E=V
IL
,G=V
IL
45 60 70 80 ns
t
ELQV
t
CE
Chip Enable Low to Output Valid
G=V
IL
45 60 70 80 ns
t
GLQVtOE
Output EnableLow to Output Valid
E=V
IL
25 30 35 40 ns
t
EHQZ
(2)
t
DF
Chip Enable High to Output Hi-Z
G=V
IL
0 25 0 30 0 30 0 30 ns
t
GHQZ
(2)
t
DF
Output Enable High to Output Hi-Z
E=V
IL
0 25 0 30 0 30 0 30 ns
t
AXQXtOH
Address Transitionto Output Transition
E=V
IL
,G=V
IL
0000ns
Two Line Output Control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control function allows:
a. the lowest possible memory power dissipation, b. complete assurance that output bus contention
will not occur.
For the most efficient use of these two control lines, Eshould be decoded andused as theprima­ry device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system controlbus. Thisensures that all deselect­ed memorydevices are in their low power standby mode and that the output pins are only active when data is desired from aparticular memoryde­vice.
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