Datasheet L6560D, L6560AD, L6560A, L6560 Datasheet (SGS Thomson Microelectronics)

L6560

L6560A

POWER FACTOR CORRECTOR

VERY PRECISE ADJUSTABLE INTERNAL
OUTPUTOVERVOLTAGEPROTECTION

HYSTERETICSTART-UP
(I

START-UP <0.5mA)

VERYLOW QUIESCENTCURRENT
(< 3.5mA)

INTERNALSTART-UP TIMER
TRANSITIONMODE OPERATING
TOTEMPOLEOUTPUTCURRENT:±400mA
DIP8/SO8PACKAGES

DESCRIPTION

The L6560/A is a monolithic integrated circuit in
Minidip and SO8 packages, designed as a con­troller and driver of a discrete powerMOS transis­tor for the implementation of active power factor
correction, for sinusoidal line current consump­tion.

Realized in mixed BCD technology, the chip inte­grates:

- An undervoltagelockout with micropowerstart­up andhyster es i s .

- An internal temperature compensated precise
bandgap reference.

- A stableerroramplifier.

- One quadrant multiplier.

- Current sense comparator.

- An output overvoltage protectioncircuit.

- A totem-pole output stage able to drive a
POWER MOS or IGBT devices with source
and sink current of 400mA. The chip works in
transition mode and is particularly intended
for lamp ballast applications and for low
powerSMPS.

June 2000



BLOCK DIAGRAM

ORDERING NUMBERS:

L6560 L6560D

L6560A L6560AD

Minidip SO8

MULTIPOWER BCD TECHNOLOGY

1/11

ABSOLUTE MAXIMUM RATINGS

Symbol Pin Parameter Value Unit

I

V

cc

8ICC+I

Z

30 mA

I

GD

7 Output Totem Pole Peak Current (2µs)

±

700 mA

INV, COMP

MULT

1, 2, 3 Analog Inputs & Outputs -0.3 to 7 V

CS 4 Current Sense Input -0.3 to 7 V

ZCD 5 Zero Current Detector 5 (source)

10 (sink)

mA
mA

P

tot

Power Dissipation @T

amb

=50°C (Minidip)

(SO8)

1

0.65

W

T

j

Junction Temperature Operating Range -25 to 150 °C

T

stg

Storage Temperature -55 to 150 °C

THERMAL DATA

Symbol Parameter SO 8 MINIDIP Unit

R

th j-amb

Thermal Resistance Junction-ambient 150 100

°

C/W

PIN FUNCTIONS

N. Name Function

1 INV Inverting input of the error amplifier. A resistive divider is connected betweenoutput regulated

voltage and this point, to provide the voltage feedback.

2 COMP Output of error amplifier. A feedback compensation network is placed between this pin and the

INV pin.

3 MULT Input of themultipler stage. A resistive divider connects to this pin the rectified mains. A

voltage signal, proportional to the rectified mains, appears on this pin.

4 CS Input to the comparator of the control loop. The current is sensed by a resistor and the

resulting voltage is applied to this pin.
5 ZCD Zero current detection input.
6 GND Ground of the control section.
7 GD Gate driver output. A push pull output stage is able to drive the Power MOS with peak current

of 400mA (source and sink).
8V

CC

Supply voltage of driver and control circuits.

PIN CONNECTION

L6560 - L6560A

2/11

ELECTRICALCHARACTERISTICS

(V

CC

= 14.5V; Tj=25°C unless otherwisespecified)

SUPPLY VOLTAGESECTION

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

V

CC

8 Operating Range after turn-on 11 18 V

V

CC ON

8 Turn-onThreshold L6560

L6560A

13.51114.51215.5
13

V

v

V

CC OFF 8 Turn-off Threshold

L6560

L6560A98.7109.61110.5

V
V

Hys 8 Hysteresis L6560

L6560A

4.3

2.5

4.7

2.8

5.1

3.1

V
V

SUPPLY CURRENT SECTION

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

I

START-U 8 Start-up Current before turn-on at:

V

CC

= 13V (L6560)

V

CC

= 10.5V (L6560A)

0.3 0.5 mA

I

CC

8 Operating Supply Current CL= 0nF @ 70KHz 2.5 3.5 mA

C

L

= 1nF @ 70KHz 3.2 4 mA

in OVP condition V

pin1

= 2.7V 0.9 1.3 mA

V

Z 8 Zener Voltage ICC = 25mA 18 20 22 V

ERROR AMPLIFIER SECTION

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

V

INV 1 Voltage Feedback Input

Threshold

2.46 2.5 2.54 V

–25≤T

J

≤85°C;12V< VCC<18V 2.43 2.56

T

S

Temperature Stability T

amb

= -25 to 85°C 0.5 %

R

L

Line Regulation VCC= 11 to 18V 1 4 mV

I

INV

1 Input Bias Current 0.1 1 µA

G

V

Voltage Gain Open loop 60 80 dB

I

COMP

2 Source Current (V1<V

ref

)V

COMP

= 5V 0.14 0.2 mA

Sink Current (V

1>Vref

) 0.5 1 mA

MULTIPLIERSECTION

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

V

MULT

3 Operating Voltage 0to 2.5 0to 4.2 V

∆V

CS

∆

V

mult

Output Max. Slope V

MULT

= from 0V to 1V

V

COMP

=6V

0.9 1.25 1.6

K Gain V

MULT

=1V V

COMP

= 5V 0.45 0.65 0.85 1/V

CURRENT SENSE COMPARATOR

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

V

CS 4 Voltage Threshold V

MULT

= 2.5V V

COMP

= 6V 1.6 1.9 V

I

CS 4 Input Bias Current 5 µA

t

d (H-L)

4 Delay to Output 200 400 ns

L6560 - L6560A

3/11

OVER VOLTAGEPROTECTION OVP

The output voltage is expected to be kept by the
operation of the PFC circuits close to its reference
value that is set by the ratio of the twoexternal re­sistors R

1 and R2 (see fig. 2), taking into consid-

eration that the non inverting input of the error
amplifier is biased inside the L6560 at 2.5V.

In steady state conditions, the current through R1
and R2 is:

I

SC

=

∆V

outsc

− 2.5

R1

or I

SC

=

2.5
R2

and, if the external compensation network is
made only with a capacitorC, the current through
C is equalzero.

When the output voltage increases abruptly the
current throughR1 becomes:

I

R1

=

V

out

−2.5

R1

I

R1

=

V

outsc

+∆V

OUT

− 2.5

R1

=

I

sc

+∆

I.

Since the current through R2 doesn’t change, the
∆I current must flow through the capacitorC and
enter in the error amplifier.

This current is mirrored inside the L6560, and
compared with a precise internal reference of
40µA. Whenever such 40µA limit is exceed, the
OVP protection is triggered (Dynamic OVP), and
the external power transistor is switched off, until
the overvoltage situation disappears. However if
the overvoltage persists, before that the transient
condition of dynamic circuit exhausts, an internal
comparator (Static OVP) latches the OVP condi­tion keeping the external power switch turned off
(see fig. 1).
The OVP value is threfore set by the equation
OVP= ∆Vout = R

1 ⋅

40µA.

Typical values for R

1,R2and C are reported in

the application circuit. The overvoltage can be set
independently from the average output voltage.
The precision in setting the overvoltage threshold
is 7% of the overvoltage value (for instance ∆V=
60V ± 4.2V).

ELECTRICALCHARACTERISTICS

(continued)

ZERO CURRENT DETECTOR

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

V

ZCD

5 Input Threshold Voltage Rising

Edge

1.8 2.3 V

Hysteresis 0.3 0.5 0.7 V

V

ZCD

5 Clamp Voltage I

ZCD

= 3mA 5 5.7 6.4 V

V

ZCD

5 Clamp Voltage I

ZCD

= –3mA 0.4 0.7 1 V

OUTPUT SECTION

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

V

GD 7 Dropout Voltage IGDsource = 200mA 1.2 2 V

I

GDsource = 20mA 0.7 1 V

I

GDsink

= 200mA 1.5 V

I

GDsink

= 20mA 0.3 V

t

r

7 Output Voltage Rise Time CL = 1nF 50 120 ns

t

f

7 Output Voltage Fall Time CL = 1nF 40 100 ns

OUTPUT OVERVOLTAGE SECTION

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

I

OVP

2 OVP Triggering Current 36 40 44

µ

A

RESTART TIMER

Symbol Pin Parameter Test Condition Min. Typ. Max. Unit

t

START

Start Timer 45 60 µs

L6560 - L6560A

4/11

+Vo

D93IN035B

-

+

2

R1

R2

Ccomp.

E/A

1

2.5V

∆I

-

+

X PWM

DRIVER

3.1V

40µA

∆I

Figure 2: OvervoltageProtection Circuit

V

OUT nominal

I

SC

40µA

E/A OUTPUT

3.1V

DYNAMIC OVP

STATIC OVP

D95IN219A

OVER VOLTAGE

Figure 1.

L6560 - L6560A

5/11

8

3

BRIDGE

4 x BY255

R9

1.5M
1%

C1

1µF

250V

R10
16K

1%

C2

22µF

25V

FUSE 4A/250V

Vac

(85V to 135V)

R3

68K 5%

D3 1N4150

D2

1N5248B

R2

100 5%

10nF

C6

R1 68K 5%

T

5

6

L6560

7

21

C3 330nF

R5 10 MOS

IRF740

R4 330

4

D1 BYT03-400

R7

1.5M
1%

C5

150µF

315V

Vo=240V

Po=100W

+

-

D94IN050B

TRANSFORMER
T: core THOMSON-CSF B1ET2910A (ETD 29x 16 x 10mm) OR EQUIVALENT

primary 90T of Litz wire 10 x 0.2mm
secondary 11T of #27 AWG (0.15mm)
gap 1.9mm for a total primary inductance of 0.6mH

R6

0.33
1W

R8

16K

1%

C4

1nF

+

-

C7

10nF

Figure 3:

Typical Application Circuit (100W)

8

3

BRIDGE

4 x BY255

R9

1.8M
1%

C1

1µF

400V

R10

6.2K
1%

C2

22µF

25V

FUSE 4A/250V

Vac

(175V to 265V)

R3

220K 5%

D3 1N4150

D2

1N5248B

R2

100 5%

4.7nF

C6

R1 68K 5%

T

5

6

L6560

7

21

C3 1µF

R5 10 MOS

STP8NA50

R4 330

4

D1 BYT13-600

R7
1M

1%

C5
47µF
450V

Vo=400V

Po=120W

+

-

D94IN049A

TRANSFORMER
T: core THOMSON-CSF B1ET2910A (ETD29 x 16 x 10mm) OR EQUIVALENT

primary 90T of Litz wire 10 x 0.2mm
secondary 7T of #27 AWG (0.15mm)
gap 1.25mmfor a total primary inductance of 0.8mH

R6

0.4

1W

R8

6.34K
1%

C4

1nF

+

-

C7

10nF

Figure 4:

Typical Application Circuit (120W)

L6560 - L6560A

6/11

Figure 5:

P.C.Boardand ComponentLayout of the Figg. 3 and 4 (1:1.25 scale)

-50 -25 0 25 50 75 100 125 T (°C)

39

40

41

42

I

OVP

(mA)

D94IN047

Figure6: OVPCurrentThresholdvs.Temperature

-25 0 25 50 75 100 125
T(°C)

9

10

12

13

14

V

CC-TH-ON

(V)

V

CC-TH-OFF

(V)

D94IN044

Figure7

: UndervoltageLockout Threshold vs.

Temperature

L6560 - L6560A

7/11

-50 0 50 100

2.46

2.48

2.50

T(°C)

V

REF

(V)

D94IN048

Figure9: VoltageFeedbackInput Thresholdvs.

Temperature

-200 -100 0 100 200 300 400

0

50

100

150

200

250

300

350

400

450

500

VCS(pin4)

(mV)

550

V

COMP

D94IN043

V

MULT

(pin3) (mV)

3.6

3.7

3.9

4.1

4.3

4.7

5.1

5.7

Figure13

: MultiplierCharacteristicsFamily

-5 0 5 10 15 20 VCC(V)

0

1

2

3

4

ICC

(mA)

D94IN045

CL=

1nF

f=

70KHz

TA=25°C

Figure 8: Supply Current vs. SupplyVoltage

0 100 200 300 400 IGD(mA)

0

0.5

1.0

1.5

2.0

V

PIN7

(V)

SINK

VCC= 14.5V

D94IN046

Figure 10

: Output SaturationVoltage vs. Sink

Current

-1.0 0.0 1.0 2.0 3.0
VMULT(pin3) (V)

4.0 5.0

0.0

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

1.8

V

CS

(pin4)

(V)

D94IN042

3.6

3.7

3.9

4.1

4.3

4.7

5.1

5.7

V

COMP

(pin2)

(V)

Figure 12

: MultiplierCharacteristicsFamily

0 100 200 300 400 IGD(mA)

0

VCC-2.0

VCC-1.5

VCC-1.0

VCC-0.5

V

PIN7

(V)

SOURCE

VCC= 14.5V

D94IN053

Figure11

: Output SaturationVoltage vs. Source

Current

L6560 - L6560A

8/11

Minidip

DIM.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 3.32 0.131

a1 0.51 0.020

B 1.15 1.65 0.045 0.065
b 0.356 0.55 0.014 0.022

b1 0.204 0.304 0.008 0.012

D 10.92 0.430

E 7.95 9.75 0.313 0.384

e 2.54 0.100
e3 7.62 0.300
e4 7.62 0.300

F 6.6 0.260

I 5.08 0.200
L 3.18 3.81 0.125 0.150
Z 1.52 0.060

OUTLINE AND

MECHANICAL DATA

L6560 - L6560A

9/11

DIM.

mm inch

MIN. TYP. MAX. MIN. TYP. MAX.

A 1.75 0.069
a1 0.1 0.25 0.004 0.010
a2 1.65 0.065
a3 0.65 0.85 0.026 0.033

b 0.35 0.48 0.014 0.019

b1 0.19 0.25 0.007 0.010

C 0.25 0.5 0.010 0.020
c1 45° (typ.)

D (1) 4.8 5.0 0.189 0.197

E 5.8 6.2 0.228 0.244

e 1.27 0.050

e3 3.81 0.150

F (1) 3.8 4.0 0.15 0.157

L 0.4 1.27 0.016 0.050

M 0.6 0.024

S8°(max.)

(1) D andF do notinclude mold flash or protrusions. Moldflash or

potrusions shall not exceed 0.15mm(.006inch).

SO8

OUTLINE AND

MECHANICAL DATA

L6560 - L6560A

10/11

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L6560 - L6560A

11/11