SGS Thomson Microelectronics L6451 Datasheet

L6451
28 CHANNEL INK JET DRIVER
ADVANCE DATA
40VDMOS OUTPUTBREAKDOWN PRECISEOUTPUTENERGY ESD OUTPUT PROTECTION WITH CLAMP-
ING DIODES VERYLOW QUIESCENTCURRENT PLCC44 OR PQFP44(10 x 10mm)
DESCRIPTION
The L6451 is realized in Multipower BCD Tech­nology which combines isolated DMOS power transistors with CMOS and Bipolar circuits on the same IC. By using mixed technology it has been possible to optimize the logic circuitry and the powerstage to achieve the best possible perform­ances.
Intended to be used in ink jet Printer Applications as 4 to 28 (2 x 14)lines selectable decoder/driver, the L6451 device driver has the advantages of low power CMOS inputs and logic, with 28 high current and high voltage DMOS outputs capable of sustaining a maximum of 40V. On systempower up the output drivers are locked out using the chip enable function; two enable in­puts areavailable for the differentdriver banks.
MULTIPOWER BCD TECHNOLOGY
PQFP44 PLCC44
An internal power-on system is implemented in order to avoid wrong output commutation during the supply voltage transients. Using a mask option during manufacturing allows a differentdecoding. Control of the energy delivered to the print head ismade by means of a specialcircuitry. All driver outputs are capable of withstanding a contactdischargeof ±8kV with the ICbiased.
BLOCK DIAGRAM (case of 4 bit)
May 1995
This is advanced information on a new product now in developmentor undergoing evaluation. Details are subject to change without notice.
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L6451
PLCC44PIN CONNECTION (Top view)
PQFP44PIN CONNECTION (Top view)
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ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
V
V
CLAMP
I
I
PEAK
V
V
T
T
OUT
OUT
T
DD
IN
amb
stg
J
Output Voltage 40 V Output Clamping Voltage 40 V Output Continuous Current 0.8 A Output Peak Current (with duty cycle = 10% TON=4µs) 2 A JunctionTemperature 150 °C LogicSupply Voltage 7 V InputVoltage Range -0.3V to VS+0.3 V Operating Temperature Range 0 to 70 °C Storage Temperature Range -55 to 150 °C
PIN FUNCTIONS
Name Function
V
DD
GND Logic and Power Ground.
OUT0 to OUT27 DMOS Outputs.
CLAMP This pin has to be connected to the power supply voltage of the head resistors. Each ofthe
INA, INB, INC, IND Decoder inputs.
COM1, COM2 A low logic input on these pins enables the outputs selected by the decoder inputs. CHIP ENABLE A logic high enable the chip.
5V Logic Supply.
output DMOS have their drain connected with the anode of a protection diode, all the cathodes of the protection diodes are connected to the clamp pin. In order to have thedevice supplied, the CLAMP pin needs to be connected to the power..
L6451
THERMAL DATA
Symbol Parameter PQFP44 PLCC44 Unit
R
th j-amb
(*) device mountedon PCB.
Thermal Resistance Junction-Ambient Max. 55 (*) 65 (*) °C/W
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