HIGHVOLTAGERAIL UP TO 600 V
dV/dt IMMUNITY +- 50 V/nsec IN FULL TEM-
PERATURERANGE
DRIVER CURRENTCAPABILITY:
400 mASOURCE,
650 mASINK
SWITCHING TIMES 50/30 nsec RISE/FALL
WITH 1nF LOAD
CMOS/TTL SCHMITT TRIGGER INPUTS
WITH HYSTERESISANDPULL DOWN
SHUTDOWN INPUT
DEAD TIME SETTING
UNDERVOLTAGELOCKOUT
INTEGRATEDBOOTSTRAPDIODE
CLAMPINGON Vcc
SO8/MINIDIPPACKAGES
DESCRIPTION
The L6384 is an high-voltage device, manufactured with the BCD”OFF-LINE” technology.It has
L6384
SO8Minidip
ORDERING NUMBERS:
L6384DL6384
an Half - Bridge Driver structure that enables to
drive N Channel PowerMOS or IGBT. The Upper
(Floating) Section is enabled to work with voltage
Rail up to 600V. TheLogic Inputs are CMOS/TTL
compatible for ease of interfacing with controlling
devices. Matched delays between Lower and Upper Section simplify high frequency operation.
Dead timesettingcan bereadily accomplishedby
means of an external resistor.
BLOCK DIAGRAM
V
CC
1
IN
V
CC
Idt
DT/SD
3
Vthi
2
DETECTION
BOOTSTRAP DRIVER
UV
DEAD
TIME
LOGIC
RS
LEVEL
SHIFTER
LVG
DRIVER
V
CC
HVG
DRIVER
H.V.
V
8
BOOT
C
BOOT
HVG
7
OUT
6
LVG
5
GND
4
D97IN518A
LOAD
May 2000
1/10
L6384
ABSOLUTE MAXIMUM RATINGS
SymbolParameterValueUnit
VoutOutput Voltage-3 toVboot -18V
VccSupply Voltage(*)- 0.3 to 14.6V
IsSupply Current(*)25mA
VbootFloating Supply Voltage-1 to 618V
VhvgUpper Gate Output Voltage-1 to VbootV
VlvgLower Gate Output Voltage-0.3 toVcc +0.3V
ViLogic Input Voltage-0.3 toVcc +0.3V
VsdShut Down/Dead Time Voltage-0.3 toVcc +0.3V
dVout/dtAllowed Output Slew Rate50V/ns
PtotTotal Power Dissipation (Tj = 85 °C)750mW
TjJunction Temperature150°C
TsStorage Temperature-50 to 150°C
(*) The device has an internal Clamping Zenerbetween GND and the Vcc pin, It must not be supplied by a Low Impedence Voltage Source.
Note: ESD immunity for pins 6, 7 and 8 is guaranteedup to 900 V (HumanBody Model)
PIN CONNECTION
IN
V
CC
DT/SD
GND
1
2
3
4LVG
D97IN519
V
8
7
6
BOOT
HVG
VOUT
5
THERMAL DATA
SymbolParameterSO8MinidipUnit
R
th j-amb
Thermal ResistanceJunction to Ambient150100°C/W
PIN DESCRIPTION
N.NameTypeFunction
1INILogic Input:it is in phase with HVG and in opposition of phase with LGV. It is compatible
2VccISupply input voltage: there is an internalclamp [Typ. 15.6V]
3DT/SDIHigh impedance pin with two functionalities. When pulled lower than Vdt [Typ. 0.5V] the
4GNDGround
to V
voltage. [Vil Max = 1.5V, Vih Min = 3.6V]
CC
device isshut down. A voltage higher than Vdt sets the dead time between high side gate
driver and low sidegate driver. The dead timevalue can be set forcing a certain voltage
level on the pin or connectinga resistor between pin 3 and ground.
Care must be taken to avoid below threshold spikes on pin 3 that can cause undesired
shut down of the IC. For this reason the connection of the components between pin 3 and
ground has to be as shortas possible. This pin can not be left floating for the same reason.
The pin has not be pulled through a low impedance to V
current source that feeds Rdt. The operative range is:Vdt....270K ⋅ Idt, that allows a dt
range of0.4 - 3.1µs.
, because of thedrop on the
CC
2/10
L6384
PIN DESCRIPTION
(continued)
N.NameTypeFunction
5LVGOLow Side Driver Output: the output stage can deliver 400mA source and 650mA sink [Typ.
Values].
The circuitguarantees 0.3V max on the pin (@ I
= 10mA) with VCC> 3V andlower than
sink
the turnon threshold. This allows to omit the bleederresistor connected between the gate
and thesourceof the external mosfet normally used to hold the pin low; thegate driver
ensures lowimpedance also in SD conditions.
6VoutOUpper Driver Floating Reference: layout care has to be taken to avoid below ground
spikes on this pin.
7HVGOHigh Side Driver Output: the output stage can deliver 400mA sourceand 650mA sink
[Typ. Values].
The circuitgurantees 0.3V max between this pin and Vout (@ I
= 10mA) with VCC>3V
sink
and lowerthan the turn on threshold.This allows to omit the bleeder resistorconnected
between thegate and the source of the external mosfet normally used to hold the pin low;
the gatedriver ensures low impedance also in SD conditions.
8VbootBootstrap Supply Voltage: it is the upper driverfloating supply. The bootstrapcapacitor
connected betweenthis pin and pin6 can be fed by an internal structure named ”bootstrap
driver” (a patentedstructure). This structure can replace the externalbootstrap diode.
RECOMMENDED OPERATINGCONDITIONS
SymbolPinParameterTest ConditionMin.Typ.Max.Unit
Vout6Output VoltageNote1580V
Vboot -
Vout
fswSwitching FrequencyHVG,LVGloadCL= 1nF400kHz
Vcc2Supply VoltageVclampV
T
Note 1: If the condition Vboot - Vout < 18V is guaranteed, Vout can range from -3 to 580V.
RdsonBootstrap Driver on Resistance (*)Vcc≥12.5V;IN= LOW125
High/Low Side Driver
Iso5,7Source Short Circuit CurrentVIN = Vih (tp < 10µs)300400mA
IsiSink Short Circuit CurrentVIN = Vil (tp < 10µs)500650mA
Logic Inputs
Vil2,3Low Level Logic Threshold Voltage1.5V
VihHigh LevelLogic Threshold Voltage3.6V
IihHigh Level Logic Input CurrentVIN = 15V5070
IilLow Level Logic Input CurrentVIN = 0V1
Iref3Dead Time Setting Current28
dt3 vs
5,7
Dead Time SettingRange (**)Rdt = 47k
Rdt = 146
Rdt = 270k
0.40.5
1.5
2.73.1
Vdt3Shutdown Threshold0.5V
10µA
µ
µ
µ
µs
µs
µ
Ω
A
A
A
s
(V
(*)
(**) Pin 3 is a highimpedence pin. Therefore dt canbe set also forcing a certain voltage V3on this pin. The dead time is the same obtained
is tested in thefollowing way: R
R
DSON
is pin 8 current when V
where I
1
with aRdt if it is: Rdt ⋅ Iref = V
CBOOT=VCBOOT1,I2
.
3
DSON
CC
=
I
1(VCC,VCBOOT1
when V
− V
−(VCC− V
CBOOT1)
)−I2(VCC,V
CBOOT=VCBOOT2
CBOOT2
CBOOT2
)
)
Figure 1. Input/OutputTiming Diagram
IN
SD
HVG
LVG
D99IN1017
4/10
L6384
Figure 2. TypicalRise and Fall Times vs.
Load Capacitance
time
(nsec)
250
200
150
100
50
0
012345C(nF)
For both high and low side buffers @25°C Tamb
D99IN1015
Tr
Tf
BOOTSTRAPDRIVER
A bootstrap circuitryis neededto supply the high
voltage section. This function is normally accomplished by a high voltage fast recovery diode (fig.
4a). In the L6384 a patented integratedstructure
replaces the external diode. It is realized by a
high voltage DMOS, driven synchronously with
the low side driver (LVG), with in series a diode,
as shownin fig. 4b
An internal charge pump (fig. 4b) provides the
DMOS driving voltage .
The diode connected in series to the DMOS has
been added to avoid undesirable turn on of it.
CBOOT selection and charging
To choose the proper C
BOOT
:
value the external
MOS can be seen as an equivalent capacitor.
This capacitor C
gate charge :
The ratio betweenthecapacitorsC
is related to the MOS total
EXT
Q
C
EXT
gate
=
V
gate
andC
EXT
BOOT
is proportionalto the cyclicalvoltage loss .
It hasto be:
C
>>>C
e.g.: if Q
gate
3nF. With C
BOOT
is 30nC and V
= 100nF the drop would be
BOOT
EXT
gate
is 10V, C
EXT
300mV.
If HVG has to be supplied for a long time, the
C
selectionhas to take into accountalso the
BOOT
leakage losses.
e.g.: HVG steady state consumptionis lower than
200µA, so if HVG T
supply 1µCtoC
EXT
is 5ms, C
ON
BOOT
has to
. This charge on a 1µFca-
Figure 3. QuiescentCurrent vs. Supply
Voltage
Iq
(µA)
4
10
3
10
2
10
10
02468101214VS(V)
pacitormeans a voltagedrop of 1V.
The internal bootstrap driver gives great advantages: the external fast recovery diode can be
avoided (it usually has great leakage current).
This structure can work only if V
OUT
GND (or lower) and in the meanwhilethe LVGis
on. The charging time (T
charge
) of the C
the time in which both conditions are fulfilled and
it has to be long enough to chargethe capacitor.
The bootstrap driver introduces a voltage drop
due tothe DMOS R
(typical value: 125
DSON
Ohm). At low frequency this drop can be neglected. Anywayincreasing the frequencyit
must be taken in to account.
The following equation is useful to compute the
drop on the bootstrap DMOS:
= I
V
drop
chargeRdson
where Q
power MOS, R
is the gate charge of the external
gate
is the on resistance of the
dson
bootstrap DMOS, and T
→ V
charge
Q
=
drop
T
charge
is the chargingtime
of the bootstrapcapacitor.
For example: using a power MOS with a total
gate charge of 30nC the drop on the bootstrap
DMOSis about1V, if the T
is
V
drop
hasto betakeninto accountwhenthe voltage
V
drop
droponC
BOOT
30nC
=
⋅ 125Ω ~ 0.8V
5µs
is calculated: if this dropis too high,
charge
is 5µs. In fact:
or the circuit topology doesn’t allow a sufficient
chargingtime,an externaldiodecan be used.
(1) D andF do not include moldflash or protrusions. Mold flash or
potrusions shallnot exceed0.15mm(.006inch).
mminch
0.065
OUTLINE AND
MECHANICAL DATA
SO8
9/10
L6384
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