
1/7June 2001
■ HIGH SPEED: t
PD
= 3.3 ns (TYP.) at VCC = 5V
■ LOW POWER DISSIPATION:
I
CC
= 2 µA (MAX.) at TA=25°C
■ HIGH NOISE IMMUNITY:
V
NIH
= V
NIL
= 28% VCC (MIN.)
■ POWER DOWN PROTECTION ON INPUTS
■ SYMMETRICAL OUTPUT IMPED ANCE:
|I
OH
| = IOL = 8 mA (MIN)
■ BALANCED PROPAGATION DELAYS:
t
PLH
≅ t
PHL
■ OPERATING VOLTAGE RANGE:
V
CC
(OPR) = 2V to 5.5V
■ PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 20
■ IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74VHC20 is a n advanced high-speed CM OS
DUAL 4-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C
2
MOS technology.
The internal circuit is composed of 3 stages
including buffer ou tput, which provides high noise
immunity and stable output.
Power down protection is provided on all inputs
and 0 to 7V can be accepted on inputs with no
regard to the supply voltage. This device can be
used to interface 5V to 3V.
All inputs and outputs are equipped with
protection circuits against stat ic discharge, giving
them 2KV ESD immunity and transient excess
voltage.
74VHC20
DUAL 4-INPUT NAND GATE
PIN CONNECTION AND IEC LOGIC SYMBOLS
ORDER CODES
PACKAGE TUBE T & R
SOP 74VHC20M 74VHC20MTR
TSSOP 74VHC20TTR
TSSOPSOP

74VHC20
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INPUT EQUIVALENT CIRCUIT PIN DESCRIPTION
TRUTH TABLE
X : Don‘t Care
ABSOLUTE MAXIMUM RATINGS
Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these conditions is
not implied
RECOMMENDED OPERATING CONDITIONS
1) VIN from 30 % to 70% of V
CC
PIN No SYMBOL NAME AND FUNCTION
1, 9 1A to 2A Data Inputs
2, 10 1B to 2B Data Inputs
3, 11 N.C. Not Connected
4, 12 1C to 2C Data Inputs
5, 13 1D to 2D Data Inputs
6, 8 1Y to 2Y Data Outputs
7 GND Ground (0V)
14
V
CC
Positive Supply Voltage
ABCDY
LXXXH
XLXXH
XXLXH
XXXLH
HHHHL
Symbol Parameter Value Unit
V
CC
Supply Voltage
-0.5 to +7.0 V
V
I
DC Input Voltage
-0.5 to +7.0 V
V
O
DC Output Voltage -0.5 to VCC + 0.5
V
I
IK
DC Input Diode Current
- 20 mA
I
OK
DC Output Diode Current
± 20 mA
I
O
DC Output Current
± 25 mA
I
CC
or I
GND
DC VCC or Ground Current
± 50 mA
T
stg
Storage Temperature
-65 to +150 °C
T
L
Lead Temperature (10 sec)
300 °C
Symbol Parameter Value Unit
V
CC
Supply Voltage
2 to 5.5 V
V
I
Input Voltage
0 to 5.5 V
V
O
Output Voltage 0 to V
CC
V
T
op
Operating Temperature
-55 to 125 °C
dt/dv
Input Rise and Fall Time (note 1) (V
CC
= 3.3 ± 0.3V)
(V
CC
= 5.0 ± 0.5V)
0 to 100
0 to 20
ns/V

74VHC20
3/7
DC SPECIFICATIONS
AC ELECTRICAL CHARACTERISTICS (Input t
r
= tf = 3ns)
(*) Vol tage range is 3. 3V ± 0.3V
(**) Voltage range is 5.0V ±
0.5V
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
V
IH
High Level Input
Voltage
2.0 1.5 1.5 1.5
V
3.0 to
5.5
0.7V
CC
0.7V
CC
0.7V
CC
V
IL
Low Level Input
Voltage
2.0 0.5 0.5 0.5
V
3.0 to
5.5
0.3V
CC
0.3V
CC
0.3V
CC
V
OH
High Level Output
Voltage
2.0
I
O
=-50 µA
1.9 2.0 1.9 1.9
V
3.0
I
O
=-50 µA
2.9 3.0 2.9 2.9
4.5
I
O
=-50 µA
4.4 4.5 4.4 4.4
3.0
I
O
=-4 mA
2.58 2.48 2.4
4.5
I
O
=-8 mA
3.94 3.8 3.7
V
OL
Low Level Output
Voltage
2.0
IO=50 µA
0.0 0.1 0.1 0.1
V
3.0
I
O
=50 µA
0.0 0.1 0.1 0.1
4.5
I
O
=50 µA
0.0 0.1 0.1 0.1
3.0
I
O
=4 mA
0.36 0.44 0.55
4.5
I
O
=8 mA
0.36 0.44 0.55
I
I
Input Leakage
Current
0 to
5.5
V
I
= 5.5V or GND
± 0.1 ± 1 ± 1 µA
I
CC
Quiescent Supply
Current
5.5
V
I
= VCC or GND
22020µA
Symbol Parameter
Test Condition Value
Unit
V
CC
(V)
C
L
(pF)
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay
Time
3.3
(*)
15 4.6 6.6 1.0 8.0 1.0 8.0
ns
3.3
(*)
50 7.1 10.1 1.0 11.5 1.0 11.5
5.0
(**)
15 3.3 5.0 1.0 6.0 1.0 6.0
5.0
(**)
50 4.8 7.0 1.0 8.0 1.0 8.0

74VHC20
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CAPACITIVE CHARACTERISTICS
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. I
CC(opr)
= CPD x VCC x fIN + ICC/2 (per gate)
TEST CIRCUIT
CL =15/50pF or equivalent (i ncludes jig and probe cap acitance)
R
T
= Z
OUT
of pulse generator (typically 50Ω)
WAVEFORM: PROPAGATION DELAYS (f=1MHz; 50% duty cycle)
Symbol Parameter
Test Condition Value
Unit
T
A
= 25°C
-40 to 85°C -55 to 125°C
Min. Typ. Max. Min. Max. Min. Max.
C
IN
Input Capacitance
6101010pF
C
PD
Power Dissipation
Capacitance
(note 1)
16 pF

74VHC20
5/7
DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. M AX.
A 1.75 0.068
a1 0.1 0.2 0.003 0.007
a2 1.65 0.064
b 0.35 0.46 0.013 0.018
b1 0.19 0.25 0.007 0.010
C 0.5 0.019
c1 45° (typ.)
D 8.55 8.75 0.336 0.344
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 7.62 0.300
F 3.8 4.0 0.149 0.157
G 4.6 5.3 0.181 0.208
L 0.5 1.27 0.019 0.050
M 0.68 0.026
S8° (max.)
SO-14 MECHANICAL DATA
PO13G

74VHC20
6/7
DIM.
mm. inch
MIN. TYP MAX. MIN. TYP. M AX.
A 1.2 0.047
A1 0.05 0.15 0.002 0.004 0.006
A2 0.8 1 1.05 0.031 0.039 0.041
b 0.19 0.30 0.007 0.012
c 0.09 0.20 0.004 0.0089
D 4.9 5 5.1 0.193 0.197 0.201
E 6.2 6.4 6.6 0.244 0.252 0.260
E1 4.3 4.4 4.48 0.169 0.173 0.176
e 0.65 BSC 0.0256 BSC
K0° 8°0° 8°
L 0.45 0.60 0.75 0.018 0.024 0.030
TSSOP14 MECHANICAL DATA
c
E
b
A2
A
E1
D
1
PIN 1 IDENTIFICATION
A1
L
K
e
0080337D

74VHC20
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consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from
its use. No li cense is granted by implication or otherwise unde r any patent or patent rights of STMicroelectronics. Specifications
mentioned in this publication ar e subject to change without notice. This publication supersedes and replaces all information
previously supplied. S TMicroelectronics products are not authorized for use as critica l components in life suppo rt devices or
systems without express written approval of STMicroelectronics.
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