SGS TS68483A User Manual

AND ALPHANUMERIC CONTROLLER

.

FULLY PROGRAMMABLE TIMING GENER­ATOR

.

ALPHANUMERIC AND GRAPHIC DRAWING
CAPABILITY

.

EASY TO USE AND POWERFUL COMMAND
SET:

- VECTOR, ARC, CIRCLE WITH DOT OR
PEN CONCEPT AND PROGRAMMABLE
LINE STYLE,

- FLEXIBLE AREA FILL COMMAND WITH
TILING PATTERN,

- VERYFASTBLOCK MOVE OPERATION,

- CHARACTER DRAWING COMMAND, ANY
SIZEAND FONTS AVAILABLE

.

LARGE FRAME BUFFER ADDRESSING
SPACE(8 megabytes) UP TO 16 PLANES OF
2048 x 2048

.

UP TO 256 COLORCAPABILITIES

.

MASK BIT PLANES FOR GENERAL CLIP­PING PURPOSE

.

FRAME BUFFER CAN BE BUILT WITH
STANDARD 64 K OR 256 KDRAM OR DUAL­PORT-MEMORIES(video-RAM)

.

EXTERNAL SYNCHRONIZATION CAPABIL­ITY

.

ON CHIP VIDEO SHIFT REGISTERS FOR
DOTRATE UPTO 18 MEGADOTS/S

.

8 OR 16-BIT BUS INTERFACE COMPATIBLE
WITH MARKET STANDARD MICROPROC­ESSORS

.

HMOS2 TECHNOLOGY

.

68 - PINPLCC PACKAGE

.

FOR DETAILED INFORMATION, REFER TO
TS68483USER’S MANUAL

DESCRIPTION

The TS68483 isan advancedcolor graphic proc­essor that drastically reduces the CPU software
overhead for allgraphic tasks in medium and high
range graphic applications such as business and
personal computer, industrial monitoring system
and CAD systems.

TS68483A

HMOS2 ADVANCED GRAPHIC

PLCC68

(Plastic Chip Carrier)

ORDER CODE : TS68483A

PIN CONNECTIONS

CYF1

D10
D11
D12

Vss

D13
D14

D15

CYF0

D3D2D1D0PC/HS

987654321

10

D4

11

D5

12

D6

13

D7

14

D8

15

D9

16
17
18
19

NC

20

NC

21
22
23

24

CS

25

26

DS

272928

NC

R/W

AE

SYNC IN

HVS/VS

BLK

686667

30313233343536373839404142

A1

A2

A3

A4

A5

A6

A7

B0

B1

A0

IRQ

Y2

Y1NCY0

CYS

6564636261

P1P2P3

P0

60
59
58
57
56
55

54
53
52
51
50
49
48
47
46
45

44

43

CLK

ADM15
ADM14
ADM13
ADM12
ADM11
ADM10
ADM9
ADM8

Vcc

ADM7
ADM6
ADM5
ADM4
ADM3
ADM2
ADM1
ADM0

68483-01.EPS

September 1993

1/30

TS68483A

PIN DESCRIPTION

Name Type Function Description

MICROPROCESSOR INTERFACE

D (0 : 15) I/O Data Bus These sixteen bidirectional pins provide communication with either an 8

A (0 : 7) I Address Bus These eigth pins select the internal register to be accessed. The

AE I Address Enable When TS68483 is connected to a non-multiplexed microprocessor bus,

DS I Data Strobe Active Low

R/W I Read/Write - In non-multiplexed bus mode, this signal controls the direction of

CS I Chip Select This input selects the TS68483 registers for the current buscycle. A

IRQ O Interrupt Request This active-lowopen drain output acts to interrupt the microprocessor.

MEMORY INTERFACE

ADM

I/O Address/Data Memory These multiplexed pins act as address and data bus for display

(0 : 15)

CYS O Memory Cycle Start The falling edge of this output indicates the beginning of a memory

Y (0 : 2) O Memory Address These outputs provide the least significant bits of the Y logical address.
B (0 : 1) O Bank Number These outputs provide the number of the memory bank to be accessed

CYF (0 : 1) O Memory Cycle Status These outputs indicate the nature of thecurrent memory cycle (Read,

VIDEO INTERFACE

P (0 : 3) O Video Shift Register

Outputs

PC/HS O Phase Comparator/

Horizontal Sync.

HVS/VS O Composite or Vertical

Sync.

SYNC IN I External Sync Input This input receives an external composite sync. signal to synchronize

BLK O Blanking This output provides the blanking interval information.

OTHER PINS

V

CC

V

SS

S Power Supply + 5 V Supply
S Ground Ground

CLK I Clock Clock Input

or 16-bit host microprocessor data bus.

address can be latched by AEfor direct connection to address/data
multiplexed microprocessor busses.

this input must be wired to VCC.
For directconnection to a multiplexed microprocessor bus, the falling
edge of AE latches the address on A (0 : 7)pins and the CS input. With
an Intel type microprocessor, AE is connected to the processor
Address Latch Enable (ALE)signal.

- In non-multiplexed bus mode, DS low enables the bidirectionnaldata
buffersand latches theA (0 : 7) lines on its high to low transition.
Data to be written are latched on the rising edge of this signal.

- In multiplexed bus mode, this signal low enables the output data
buffersduring a read cycle. With intel microprocessors, this pin is
connected to the RD signal.

dataflow through the bidirectional data buffers.

- In multiplexed bus mode, this signal low enables the input data
buffers. The entering data are latched on its risingedge. With Intel
microprocessors, this pin is connected to the WR signal.

low levelcorresponds to an asserted chip select.
In multiplexed mode, this input is strobed by AE.

memory interface.

cycle.

during the current memory cycle.

Write, Refresh, Display).

These four pins correspond to the outputs of the internal video shift
registers.

This output can be programmed to provide either the phase comparator
output or the horizontal sync. signal.

This output can be programmed to provide either the composite sync.
signal or the verticalsync. signal.

TS68483. This input must be grounded if not used.

68483-01.TBL

2/30

BLOCK DIAGRAM

TS68483A

MICROPROCESSOR INTERFACE

AE, DS

R/W, CS

R0

R1
R2
R3

R12

V

52

CC

19

V

SS

R23

DRAWING

AND

ACCESS

PROCESSOR

D [0:15] A [0:7] IRQ

48

16

GENERATOR

R4

R10

VIDEO

TIMING

38

43

2
5
4

3

SYNC IN

ADDRESS

VIDEO

SHIFT

REGISTERS

DATA

32

21

DATA

32

CLK

BLK
PC/HS
HVS/VS

VIDEO
INTERFACE

P [0:3]

DISPLAY MEMORY LOGIC

65

CYS CYF [0:1] B [0:1] Y [0:2] ADM [0:15]

232

DISPLAYMEMORY INTERFACE

16

ABSOLUTEMAXIMUMRATINGS

Symbol Parameter Value Unit

V

CC*

V

in*

T

A

T

stg

P

Dm

* With respect to VSS.
Stresses above those hereby listed may cause permanent damage to the device. Theratings are stress ones only and functionaloperation of
the deviceattheseor anyconditions beyondthose indicatedin theoperational sections of thisspecificationsis not implied.Exposure to maximum
rating conditions for extended periods may affect device reliability. Standard MOS circuits handling procedure should beused toavoid possible
damage to the device.

Supply Voltage – 0.3, 7.0 V
Input Voltage – 0.3, 7.0 V
Operating Temperature Range 0, 70 °C
Storage Temperature Range – 55, 150 °C
Max Power Dissipation 1.5 W

3/30

68483-02.EPS

68483-02.TBL

TS68483A

ELECTRICALCHARACTERISTICS

= 5.0 V ± 5%,VSS=0, TA=TLto TH) (unless otherwisespecified)

(V

CC

Symbol Parameter Min. Typ. Max. Unit

V

CC

V

IL

V

IH

Iin Input Leakage Current 10 µA

V

OH

V

OL

P

D

C

in

I

TSI

Supply Voltage 4.75 5 5.25 V
Input Low Voltage – 0.3 0.8 V
Input High Voltage 2 V

Output HighVoltage (I

= – 500 µA) 2.4 V

Ioad

Output Low Voltage

= 4 mA ; ADM (0 : 15), I

I

Ioad

= 1 mA ; other Outputs

Ioad

CC

0.4 V

Power Dissipation 700 mW
Input Capacitance 15 pF
Three State (off state) InputCurrent 10 µA

V

68483-03.TBL

I - GENERALOPERATION
I.1 - Introduction

The TS68483 is an advanced color graphics con­trollerchip. It isdirectlycompatiblewithmostpopu­lar8 or 16-bit microprocessors.
Itsdisplaymemory, containingtheframebufferand
the character generators,may be assembled from
standarddynamic RAM components.
On-chipvideo shift registersand fully programma­ble Video Timing Generator allow the TS68483 to
be used in a wide range of terminals or computer
design.
Additionalinformationonapplicationscan befound
in the TS68483User’s Manual.

I.2 - TypicalApplication BuildingBlocks

In atypical using TS68483,a hostprocessordrives
a display unit which drives in turn a color CRT
monitor.

The display unitconsists of four hardwarebuilding
blocks:

- an TS68483advanced graphics controller,

- a displaymemory (dynamic RAM),

- adisplaymemoryinterface,comprisinga fewTTL
parts,

- a CRTinterface of CRT drivers.

For enhanced graphics, the CRT interface may
include a color look-up table circuit. For high pixel
rate (over 18 Mpixels/s), the CRT interface must
includehigh speed video shift registers.
Thedisplaymemoryinterfaceand organizationare
discussedin full details in theUser’s Manual.

I.3 - TS68483 Functions

All the TS68483functionsare under the controlof
the host microprocessor via 24 directly accessible
16-bitregisters. These registers are referred to by
their decimalindex (R0-R23)(see Figure 1).

Figure1 : Register Map

15 087
R0
R1
R2
R3
R4
R5
R6
R7
R8
R9
R10
R11
R12
R13
R14
R15
R16
R17
R18
R19
R20
R21
R22
R23

Sx Sy

TEXLIN

XOR

H

DWX FPY

FPX BKX

DWY

CONF

STATUS

STOP

MODECOMMAND

MARGINCOLOR

YOR

BPY

BKY

dy dx
Yd
Xd

DYd
DXd
RAD

Ys
Xs

DYs
DXs

C0
C1

COMMAND,
DRAWING
ATTRIBUTES

VIDEO
TIMING
GENERATOR

SHORTRELATIVE
REGISTER

DESTINATION
POINTER

AUXILIARY
GEOMETRIC
ARGUMENTS

SOURCE
POINTER

I.3.1 - VIDEO TIMING AND DISPLAY PROCES­SOR (R4 to R10).

Thevideo timing generatoris fully programmable:
anypopularhorizontalscanning period from 20 µs
to 64 µs may be freelycombinedwith any number

68483-03.EPS

4/30

TS68483A

of lines per field (up to 1024). The address of the
displayviewport (this part ofthe displaymemory to
be actually displayed on the screen) is fully pro­grammable. The display processor provides the
display dynamic RAM refresh (see video timing
generatorsection for details).

I.3.2 -DRAWING ANDACCESSCOMMANDS (R0
to R3, R12 to R23).

The 16 remaining registers are used to specify a
comprehensive set of commands. The highly or­thogonal drawing command set allows the user to
”draw” in the displaymemory such basic patterns
as lines, arcs, polylines, polyarcs, rectangles and
characters. Efficient procedures are available for
either area filling and tiling or line drawing and
texturing.Lines may be drawnwith a PEN in order
to get thick strokes. Any drawing is specified in a

13x213

2

drawingcoordinate system.

Toaccessthe displaymemory, the hostmicroproc­essor has an indirect, sequential access to any
”window”. Accesscommands can be used to load
the charactergeneratorsas well asto loador save
arbitrarywindows stored in the frame buffer.

I.4 - Data Type Definitions

PIXEL : this is the smallest color spot displayable
on theCRT.

PEL: a PictureElement is the codingof a PIXELin
the display memory. The TS68483 can handle 4
differentPEL formats :

- 4 colorbits - short

- 4 colorbits + 1 mask bit - short masked

- 8 colorbits - long

- 8 colorbits + 1 mask bit - long masked
DRAWING COORDINATES : (see Figure 2)

The drawing commands are specified and com­putedin a 2
drawing coordinates are clipped and mapped into
the 2

11x211

13x213

cyclical coordinatesystem.The

display memory addressing space.
Furtherclippingto the actualframe buffersizemay
be performedby the user designed memory inter­face.

DISPLAYMEMORY:
This is the dedicatedmemory to the display unit.
This memory is addressed as four banks of 4-bit
plane each.

BITPLANE :
Each bit planehasa maximumcapacityof2

11x211

bits. A byte wide organization of each bit plane is
required.

MEMORYADDRESS : (see Figure3).
In order to addressone bit in the display memory,
the user must specify :

- Abank number(2 bits)B = 0 to3

- Abit plane number (2 bits) Z = 0 to 3

- AY address (11bits) Y = 0 to 2047

- An X address (11bits) X = 0 to2047
MEMORYWORD : (see Figure 3)

A32-bitmemory word canbe either read or written
during each memory cycle (8 CLK periods), one
byte at a time in each bit plane in the addressed
bank. The memory bandwidth is in the 6 to 8Mby­tes/srange.

VIEWPORT :
This is anyrectangulararray of pels located in the
displaymemory.

FRAMEBUFFER :
This is the biggest viewport which can be held in
the display memory. The frame buffer maps a
window at the origin of the drawingcoordinates. A
short pel frame buffer may be locatedin anybank.
Alongpel framebuffermustbe locatedinthe”bank
0, bank 1” pair.

DISPLAYVIEWPORT :
This is the viewportwhich is displayedon screen.

MASK BIT PLANE:
Whenmaskedpelsareused,amaskbitplanemust
be associated to a frame buffer. Mask bit planes
may be locatedin anyplane of bank 3.

CELL :
ACELLis anypatternstored inthedisplaymemory
asa rectangulararrayof bitmappedelements.The
drawing of any CELL may be specified with a
scalingfactor.

CHARACTER :
Thisis aone bitper elementCELL.It maybe stored
in anybit plane,then coloredand drawnin a frame
bufferby use of PRINTCHARACTER command.

OBJECT :
This is a one short pel per element CELL. It may
bedrawnorloadedinaframebuffer.Asourcemask
bit may be associated to each element. An OB­JECT may then be printed in anotherlocation by
use of a PRINT OBJECTcommand.

PEN :
This is the patternwhich is repeatedlydrawnalong
the coordinatesdefinedby eithera LINEoran ARC
command.

The PEN may be a DOT (singlepel), a CHARAC­TERor an OBJECT.

5/30

TS68483A

Figure2 : CyclicalDrawing Coordinates to Display Memory Mapping

Y

13

2

11

2

11

0

2

13

2

BANK 0

X

Figure3 : The DisplayMemory AddressingSpace

Z

32

8

8

8

8

2

1

XY0

7

3

BANK0 BANK 1 BANK 2 BANK3

Y

BANK 1

Z

4

3

2

1

0

X

BANK3

MASK

M

BITS

7

6

5

LONG PELS

SHORT PELS

68483-04.EPS

THE MEMORY WORD

II - COMMANDS
II.1 - Introduction

The command set is strongly organized in five
subsetor commandtypes.

DRAWING COMMANDS :

- LINEAR(line, arc)

- AREA(rectangle,trapezium, polygon, polyarc)

- PRINTCELL (print character,print object)
ACCESSCOMMANDS
CONTROLCOMMANDS (movecursor,abort)

The commandsare parametered ; this means that
anycommand can be executed with options freely
selected out of a given option set. This option set
is common for any command of a given type. For
example,any drawing command may be parame­tered for destinationmaskbit use.

The command code also defines the command
type and its parameters.A command iscompletely
defined when a valuehas been set for each of its

6/30

4 BANKS OF 4 BIT PLANES EACH

arguments.
These arguments are :

- the geometric arguments given in the drawing
coordinate system for every drawing command.
They are automaticallymapped into the destina­tion framebuffer ;

- the parametric valuesare the values required by
the selectedparameters ;

- the attribute valuesare the other values required
by adrawing command ; colors or scaling factors
for example ;

- the display memory addresses.

The command code is specified in register R0.
Beforeinitiating a commandexecution,each argu­ment must be specified in its dedicatedregister : ­an Xd, Yd drawing coordinate pair for example, is
always locatedin registers R14, R15.

The monitoringof acommandexecutionisdone by
reading the status register R12 or using the IRQ
signal.

68483-05.EPS

Table1 : Command Set Structure

Command Drawing Mode Type Group

Line
Arc

Rectangle
Trapezium
Polygon
Polyarc

Print Char
Print Object

Load Viewport
Save Viewport
Modify Viewport

Move Cursor Abort Control

Up to the Pen Linear
Monochrome Area

Bichrome
Polychrome

Cell

Access

TS68483A

Drawing

Management

68483-04.TBL

II.2 - Pointers and GeometricArguments (see
Figure4)

Pointersare used to specify main geometric argu­mentsand display memory addresses.

II.2.1 - DISPLAYMEMORY ADDRESS
Abit in the displaymemory is addressedby :

- a banknumber B =0 to 3

- a plane number Z = 0 to 3

- an X address X = 0 to 2047

- a Y addres Y = 0 to 2047
II.2.2 - DESTINATIONPOINTER :

RegistersR14 to R17
This pointer gives the coordinate (Xd, Yd) and

dimension(DXd, DYd) of eithera lineor a window
in the drawingcoordinate system. These drawing
coordinates are easily mapped into a PEL DIS­PLAYMEMORYaddress.

(X, Y) coordinatesare clippedto 11bits in order to
get the Xd, Yd destination pel addresses.

A bank number Bd must be explicitly provided to
addressa destinationframebuffer.Whenlong pels
are used, Bd must be even.

Whenmasked pelsare used, the destinationmask
planenumber Zd(implicitly inbank 3) mustalsobe
provided.

II.2.3-SOURCEPOINTER:RegistersR20 toR23.
A source cell such as a character, a pen or an

object, is addressed by the source pointer in the
displaymemory.

Asource pointer specifies :

- a banknumber Bs = 0 to 3

- a Ysaddress Ys = 0 to 2047

- an Xsaddress; this addressis a byte addressso
thatthe 3 LSBs are not specified Xs = 0 to 255

- a celldimension DXs, DYs

- a bit plane address Zs.

Whena characteris addressed,Zsgivesthe plane
number into the bank Bs. When an object is ad­dressed Zs gives the source mask plane number
in the bank B3.

II.2.4 - NOTES:

1. The TRAPEZIUM command makes a special

use of R21. In this case, R21 holds an X1
drawingcoordinatewhich has the same format
as Xd.

2. The ARC and POLYARC commands require

two extra geometric parameters (RAD and
STOP). They are specified in the drawing
coordinatessystemandstoredinregistersR18,
R19.

3. Anydrawingcommand may be parameteredto

use short incremental dimensions, DXY in
register R13 instead of the standard DXd, DYd
in the ”R16, R17” registerpair (see Figure 5).

4. The access commands use the destination

pointer location as a data buffer. The memory
add resses an d dimension of the ac cess
viewport are then specified in the source
pointer,independentlyof the data transfer.

5. DXd, DYd and DYs may specify a negative

value.In thiscase,theymust becodedbya sign
(0 = positive, 1 = negative) and an 11-bit
absolute value.

7/30

TS68483A

Figure4 : Pointers

1514131211109876 45 3210

R14

Bd

Yd

13-bit positive valueBank number

Pel
address

R15

R16

R17

R20

R21

Character cell plane (PCA)

or source mask plane (PVS, PVF)

R22

Zd

Plane number 13-bit positive value

S

Sign

S

Sign

Bs

Bank number

Zs

S

Sign

Xd

DYd

Absolute value

DXd

Absolute value

Ys

11-bit positive value

Xs

8-bit positive value

DYs

Absolute value

DESTINATION
POINTER

Byte
address

SOURCE
POINTER

U DXs

R23

Underlined (cell)

Reserved
Don’t care
Only used with TRAPEZIUM command

Note : Sign value

S = 0 positive
S = 1 negative + absolute value

Figure5 : Short DimensionRegister R13

76543210

SS

R13

dy dx

8/30

11-bit positive value

II.3 - DestinationMask and Source Mask

Amask bit may be associatedto any pel stored in
the display memory.

II.3.1 - DESTINATION MASK USE (DMU)
Any drawing command may be parametered for
destinationmask use.In thiscase, any destination
pel cannot be modified when its mask bit is reset.

68483-07.EPS

68483-06.EPS

TS68483A

In other words :

- When the destination mask use (DMU) parame­ter isset :

- a pel may be modifiedwhen its mask bit is set

- a pel cannot be modified when its mask bit is

reset.

- When the destination mask use (DMU) parame­ter iscleared :

- a pel may be modified, independently of its

maskbit value.
This provides a very flexible clipping mechanism
not restricted to rectangularwindows. (See desti­nation pointer section for destinationmask bit ad­dressing).

II.3.2 - SOURCEMASK USE (SMU)
APRINTOBJECTcommand maybe parametered
for sourcemaskuse. In thiscase, thesource mask
bit associated with any source pel is read first.
When its mask bit is cleared, a source pel is con­sideredas transparent.(Seesourcepointersection
for source mask bit addressing).

In other words :

- When the SMU parameter is set, the color ofa

destination pel, mapped by a given source pel,
may take this source color value only when this
sourcebit maskis set. The destinationpel keeps
its own color value when the source bit mask is
cleared.

- When the SMU parameter is cleared, a source

pel color may be mapped into destination pel
color independentlyof the sourcebit mask value.

The source bit mask acts as a TRANSPAR­ENCY/OPACITYflag which is enabled by SMU.A
PRINTOBJECT command may be independently
parameteredbybothSMUandDMU.Thisprovides
a very powerfultiling, print object or move mecha­nism.

II.4 - DrawingAttributes
Figure6 : Color Register

01234567

ODD

BANK

EVEN
BANK

The general drawing attributes are the colors, the
drawingmode, and the scalingfactor.

II.4.1.COLORS : RegistersR1 andR2
Two 8-bit color values, C0 and C1, may be speci-

fied in registers R1 and R2. The low order 4-bit
nibble of a color value is drawn in an even bank.
Thehighordercolornibbleisdrawninanoddbank.
When long pels are used, banks 0 and 1 are
generally addressed as the frame buffer. When

short pels are used, any bank may hold a frame
buffer.In thiscase, thebankparityselectsthe color
nibble used. (See destination pointer section for
bankaddressing).

II.4.2.DRAWINGMODE : RegisterR0
The drawing mode defines the transforms to be
applied to the pels designated by the drawing
commands. There are threedrawing modes.

II.4.3.MONOCHROME MODE
Any AREA drawing command, RECTANGLE for
instance,defines through its geometricarguments
anactive set of destinationpels, that is to saya set
ofpels to be modified.
When DMU = 1, this active set is further reduced
by the masking mechanism to only these destina­tionpels with a bit mask set.
The active destination pels are then modified ac­cordingto two elementarytransforms codedin R0.

COLORTRANSFORM:
The color value C of each active pel is modified
according to one color transform selected out of
four :

- 00 - printed in C0 : C ← C0

- 01 - printed in C1 : C ← C1

- 10 - printed in ”transparent”: C← C

- 11 - complemented: C← C
This yields to a reversiblemarker mode.
MASK BITTRANSFORM :

The destination mask bit of each active pel is
modifiedaccordingto onemask transformselected
out of four :

- 00 - reset bit mask : M ← 0

- 01 - set bit mask : M ← 1

- 10 - no modification: M ← M

- 11 - complementbit mask : M ← M
This scheme allows the color bits and the mask bit

ofany pelbelongingto theactiveset tobemodified
independently. The color transform is performed
first.

II.4.4 - BICHROMEMODE
APRINTCHARACTER commandismore complex
because it involves two different active sets :
FOREGROUND and BACK GROUND.
TheFOREGROUNDis that set of destinationpels
printedfrom set elements inthe charactercell.The

68483-08.EPS

BACKGROUND is made of all the remaining pels
belongingto the destinationwindow.
When DMU = 1, the FOREGROUND and BACK
GROUND are further reduced by the destination
masking mechanism(see Figure 8).

A bichromedrawingmodeis definedby 4 elemen­tary and independent transforms (see Fig­ure 7) :

- a color transform and a mask transform for the
FOREGROUND PELS

9/30