Semiconductor NCP730 User Manual

LDO Regulator, 150 mA,
38V, 1 mA I

, with PG

Q

NCP730

The NCP730 device is based on unique combination of features −
very low quiescent current, fast transient response and high input and
output voltage ranges. The NCP730 is CMOS LDO regulator designed
for up to 38 V input voltage and 150 mA output current. Quiescent
current of only 1 mA makes this device ideal solution for battery−
powered, always−on systems. Several fixed output voltage versions
are available as well as the adjustable version.

The device (version B) implements power good circuit (PG) which
indicates that output voltage is in regulation. This signal could be used
for power sequencing or as a microcontroller reset.

Internal short circuit and over temperature protections saves the
device against overload conditions.

Features

• Operating Input Voltage Range: 2.7 V to 38 V

• Output Voltage: 1.2 V to 24 V

• Capable of Sourcing 200 mA Peak Output Current

• Very Low Quiescent Current: 1 mA typ.

• Low Dropout: 290 mV typ. at 150 mA, 3.3 V Version

• Output Voltage Accuracy ±1%

• Power Good Output (Version B)

• Stable with Small 1 mF Ceramic Capacitors

• Built−in Soft Start Circuit to Suppress Inrush Current

• Over−Current and Thermal Shutdown Protections

• Available in Small TSOP−5 and WDFN6 (2x2) Packages

• These Devices are Pb−Free and are RoHS Compliant

Typical Applications

• Battery Power Tools and Equipment

• Home Automation

• RF Devices

• Metering

• Remote Control Devices

• White Goods

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MARKING DIAGRAMS

TSOP−5

5

1

(Note: Microdot may be in either location)

1

GND

SN SUFFIX

CASE 483

XXX = Specific Device Code
A = Assembly Location
Y = Year
W = Work Week
G = Pb−Free Package

WDFN6 (2x2)

MT SUFFIX

CASE 511BR

XX = Specific Device Code
M = Date Code

PIN ASSIGNMENTS

TSOP−5

IN

EN

NC/ADJ 2

1

2

3

CASE 483

WDFN6 (2x2)

OUT 1

EP

GND 3

5

1

5

4

6 IN

5 NC/PG

4 EN

XXXAYWG

G

1

XX M

OUT

NC/ADJ/PG

© Semiconductor Components Industries, LLC, 2018

March, 2021 − Rev. 1

CASE511BR

(Top Views)

ORDERING INFORMATION

See detailed ordering and shipping information on page 29 of
this data sheet.

1 Publication Order Number:

NCP730/D

NCP730

Ǔ

TYPICAL APPLICATION SCHEMATICS

C
1nF

V

OUT=5V

C
1mF

OUT

FF

V

IN=6−38V

C

IN

1mF

OFF

IN

NCP730A 5.0V

TSOP−5 / WDFN−6

ON

EN

GND

OUT

NC

V

OUT=5.0V

C
1mF

OUT

V

IN=6−38V

C

IN

1mF

OFF

IN

NCP730A ADJ

TSOP−5 / WDFN−6

ON

EN

GND

OUT

ADJ

1.2V

R1
2M4

R2
750k

Figure 1. Fixed Output Voltage Application (No PG) Figure 2. Adjustable Output Voltage Application (No PG)

V

IN=6−38V

C

IN

1mF

OFF

IN

NCP730B 5.0V

TSOP−5 / WDFN−6

ON

EN

GND

OUT

NC

PG

R

PG

100k

V

OUT=5.0V

PG

C
1mF

OUT

V

IN=6−38V

C

IN

1mF

OFF

ON

IN

NCP730B ADJ
Only WDFN−6

EN

GND

OUT

ADJ

PG

1.2V

R1
2M4

R2
750k

C
1nF

FF

C
1mF

V

OUT

OUT=5V

R
100k

PG

PG

Figure 3. Fixed Output Voltage Application with PG Figure 4. Adjustable Output Voltage Application with PG

R

V

OUT

+ V

ADJ

@ǒ1 )

1

) I

@ R

1

R

ADJ

2

EN

IN

OUT

UVLO Comparator

UVLO

1.95 V

V

= 300nA

EN−PU

I

CCEN

V−REFERENCE

AND SOFT−START

V

REF

1.2V

EA

Current limit

R

ADJ1

VFB=1.2V

Enable

EN Comparator

0.9 V

THERMAL

SHUTDOWN

PG Comparator

93% of V

Note:

REF

Blue objects are valid for ADJ version

Green objects are valid for FIX version

DEGLITCH

DELAY TMR

R

ADJ2

ADJ

GND

PG

NC

Brown objects are valid for B version (with PG)

Figure 5. Internal Block Diagram

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2

NCP730

PIN DESCRIPTION − TSOP−5 package

Pin No. Pin Name Description

1 IN Power supply input pin.

2 GND Ground pin.

3 EN Enable input pin (high − enabled, low − disabled). If this pin is connected to IN pin or if it is left uncon-

4 ADJ/PG/NC ADJ (ADJ device version only):

5 OUT Output pin.

PIN DESCRIPTION − WDFN−6 package

Pin No. Pin Name Description

1 OUT Output pin.

2 NC/ADJ ADJ (ADJ device version only):

3 GND Ground pin.

4 EN Enable input pin (high − enabled, low − disabled). If this pin is connected to IN pin or if it is left

5 NC/PG PG (ADJ/FIX device versions with PG functionality):

6 IN Power supply input pin.

EP EPAD Exposed pad pin. Should be connected to the GND plane.

nected (pull−up resistor is not required) the device is enabled.

• Adjust input pin. Could be connected to the output resistor divider or to the output pin directly.

PG (FIX device versions with PG functionality):

• Power good output pin. High level for power ok, low level for fail. If not used, could be left

unconnected or shorted to GND.

NC (FIX device versions without PG functionality):

• Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.

• Adjust input pin. Could be connected to the output resistor divider or to the output pin directly.

NC (all FIX device versions):

• Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.

unconnected (pull−up resistor is not required) the device is enabled.

• Power good output pin. High level for power ok, low level for fail. If not used, could be left

unconnected or shorted to GND.

NC (ADJ/FIX device versions without PG functionality):

• Not internally connected. This pin can be tied to the ground plane to improve thermal dissipation.

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3

NCP730

MAXIMUM RATINGS

Rating Symbol Value Unit

VIN Voltage (Note 1)

VOUT Voltage

EN Voltage

ADJ Voltage

PG Voltage

Output Current

PG Current

Maximum Junction Temperature

Storage Temperature

ESD Capability, Human Body Model (Note 2)

ESD Capability, Charged Device Model (Note 2)

Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.

1. Refer to ELECTRICAL CHARACTERISTICS and APPLICATION INFORMATION for Safe Operating Area.

2. This device series incorporates ESD protection and is tested by the following methods:

ESD Human Body Model tested per ANSI/ESDA/JEDEC JS−001, EIA/JESD22−A114
ESD Charged Device Model tested per ANSI/ESDA/JEDEC JS−002, EIA/JESD22−C101

THERMAL CHARACTERISTICS (Note 3)

Characteristic Symbol WDFN6 2x2 TSOP−5 Unit

Thermal Resistance, Junction−to−Air R

Thermal Resistance, Junction−to−Case (top) R

Thermal Resistance, Junction−to−Case (bottom) R

Thermal Resistance, Junction−to−Board (top) R

Thermal Characterization Parameter, Junction−to−Case (top) Psi

Thermal Characterization Parameter, Junction−to−Board [FEM] Psi

3. Measured according to JEDEC board specification (board 1S2P, Cu layer thickness 1 oz, Cu area 650 mm2, no airflow). Detailed description

of the board can be found in JESD51−7.

ELECTRICAL CHARACTERISTICS (V

(effective capacitance – Note 4), T

Parameter

Recommended Input Voltage V

Output Voltage Accuracy

ADJ Reference Voltage ADJ version only V

ADJ Input Current V

Line Regulation VIN = V

Load Regulation I

Quiescent Current (version A) VIN = V

Quiescent Current (version B) VIN = V

Ground Current I

Shutdown Current (Note 9) VEN = 0 V, I

Output Current Limit V

Short Circuit Current V

Dropout Voltage (Note 6) I

Power Supply Ripple Rejection VIN = V

= −40°C to 125°C, ADJ tied to OUT, unless otherwise specified) (Note 5)

J

IN

= V

OUT−NOM

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

Test Conditions Symbol Min Ty p Max Unit

TJ = −40°C to +85°C

TJ = −40°C to +125°C −1 − 2

= 1.2 V I

ADJ

OUT−NOM

= 0.1 mA to 150 mA

OUT

OUT−NOM

OUT−NOM

= 150 mA I

OUT

= V

OUT

= 0 V I

OUT

= 150 mA V

OUT

OUT−NOM

I

= 10 mA

OUT

+ 1 V to 38 V and VIN ≥ 2.7 V

+ 1 V to 38 V, I

+ 1 V to 38 V, I

= 0 mA, VIN = 38 V I

OUT

OUT−NOM

+ 2 V

V

IN

V

V

V

FB/ADJ

V

I

T

J(MAX)

T

ESD

ESD

OUT

EN

PG

OUT

I

PG

STG

HBM

CDM

−0.3 to [(VIN + 0.3) or 40 V; whichever is lower]

thJA

thJCt

thJCb

thJBt

JCt

JB

= 0 mA

OUT

= 0 mA − 1.8 3.0

OUT

− 100 mV I

10 Hz

−0.3 to 40 V

−0.3 to (VIN + 0.3) V

−0.3 to 5.5 V

−0.3 to (VIN + 0.3) V

Internally limited mA

3 mA

150 °C

−55 to 150 °C

2000 V

1000 V

61 142 °C/W

200 80 °C/W

14 N/A °C/W

46 110 °C/W

3 21 °C/W

46 113 °C/W

= 1 mA, CIN = C

OUT

2.7 − 38 V

−1 − 1

− 1.2 − V

−0.1 0.01 0.1

− − 0.2 %V

− − 0.4 %V

− 1.3 2.5 mA

− 325 450

− 0.35 1.5

200 280 450 mA

200 280 450 mA

− 290 480 mV

− 80 −

V

DV

DV

GND

SHDN

OLIM

OSC

PSRR

IN

OUT

ADJ

ADJ

O(DVI)

O(DIO)

I

Q

DO

10 kHz − 70 −

OUT

V

= 1.0 mF

%

mA

OUT

OUT

mA

mA

dB

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4

NCP730

ELECTRICAL CHARACTERISTICS (V

(effective capacitance – Note 4), T

= −40°C to 125°C, ADJ tied to OUT, unless otherwise specified) (Note 5) (continued)

J

IN

= V

OUT−NOM

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

= 1 mA, CIN = C

OUT

OUT

= 1.0 mF

Parameter UnitMaxTypMinSymbolTest Conditions

Power Supply Ripple Rejection VIN = V

I

OUT

OUT−NOM

= 10 mA

Output Voltage Noise f = 10 Hz to 100 kHz

+ 2 V

100 kHz

PSRR

− 42 −

1 MHz − 48 −

FIX−3.3 V

V

N

− 195 − mV

dB

RMS

FIX−5.0 V − 240 −

FIX−15.0 V − 460 −

ADJ set to 5.0 V
C

= 100 pF

FF

ADJ set to 5.0 V
C

= 10 nF

FF

EN Threshold VEN rising V

EN Hysteresis VEN falling V

EN Internal Pull−up Current VEN = 1 V, VIN = 5.5 V I

EN−PU

EN Input Leakage Current VEN = 30 V, VIN = 30 V I

Start−up time (Note 7)

V

OUT−NOM

V

OUT−NOM

≤ 3.3 V

> 3.3 V 300 600 1000

t

Internal UVLO Threshold Ramp VIN up until output is turned on V

Internal UVLO Hysteresis Ramp VIN down until output is turned off V

PG Threshold (Note 8) V

PG Hysteresis (Note 8) V

PG Deglitch Time (Note 8) t

PG Delay Time (Note 8) t

falling V

OUT

rising V

OUT

PG−DG

PG−DLY

PG Output Low Level Voltage (Note 8) IPG = 1 mA V

PG Output Leakage Current (Note 8) VPG = 30 V I

Thermal Shutdown Temperature Temperature rising from TJ = +25°C T

Thermal Shutdown Hysteresis Temperature falling from T

SD

EN−TH

EN−HY

EN−LK

START

IUL−TH

IUL−HY

PG−TH

PG−HY

PG−OL

PG−LK

SD

T

SDH

− 132 −

− 82 −

0.7 0.9 1.05 V

0.01 0.1 0.2 V

0.01 0.3 1

−1 0.05 1

100 250 500 ms

1.6 1.95 2.6 V

0.05 0.2 0.3 V

90 93 96 %

0.1 2 4 %

75 160 270

120 320 600

− 0.2 0.4 V

− 0.01 1

− 165 − °C

− 20 − °C

mA

mA

ms

ms

mA

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Effective capacitance, including the effect of DC bias, tolerance and temperature. See the Application Information section for more

information.

5. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at T

Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.

= 25°C.

A

6. Dropout measured when the output voltage falls 100 mV below the nominal output voltage. Limits are valid for all voltage versions.

7. Startup time is the time from EN assertion to point when output voltage is equal to 95% of V

8. Applicable only to version B (device option with power good output). PG threshold and PG hysteresis are expressed in percentage of nominal

OUT−NOM

.

output voltage.

9. Shutdown current includes EN Internal Pull−up Current.

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5

VIN = V

OUT−NOM

2.0%
V

= (V

IN

I

= 1 to 150 mA

OUT

1.5%

1.0%

(V)

OUT

0.5%

0.0%

-0.5%

-1.0%

OUTPUT VOLTAGE, V

-1.5%

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

+ 1 V) to 38 V, VIN≥ 2.7 V

OUT-NOM

= 15 V

V

OUT-NOM

V

= 1.2 V

OUT-NOM

NCP730

TYPICAL CHARACTERISTICS

OUT

High limit

V

OUT-NOM

Low limit

= 1 mA, C

= 5 V

= 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified

OUT

-2.0%

-40 -20 0 20 40 60 80 100

JUNCTION TEMPERATURE, TJ(°C)

120

Figure 6. Output Voltage vs. Temperature Figure 7. Ground Current vs. Load

(NCP730−5.0V, Version−B)

Figure 8. Quiescent Current vs. Temperature

(Version−A)

1.6

High limit

1.4

A)

1.2

μ

(

SHDN

1.0

0.8

0.6

0.4

SHUTDOWN CURRENT, I

0.2

0.0

-40 -20 0 20 40 60 80 100

Note:
Shutdown current is measured at IN pin
and includes EN pin pull-up current.

JUNCTION TEMPERATURE, TJ(°C)

V
V

IN

EN

= 38 V

= 0 V

120

Figure 9. Quiescent Current vs. Temperature

(Version−B)

1.10

1.05

High limit

(V)

1.00

EN -TH

0.95

0.90

0.85

0.80

0.75

Low limit

0.70

ENABLE THRESHOLD VOLTAGE, V

0.65

0.60

-40 -20 0 20 40 60 80 100

JUNCTION TEMPERATURE, TJ(°C)

Figure 10. Shutdown Current vs. Temperature Figure 11. Enable Threshold Voltage vs.

Temperature

120

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6

VIN = V

1.6

1.4

A)

μ

(

1.2

EN-PU

1.0

0.8

OUT−NOM

High limit

TYPICAL CHARACTERISTICS

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

= 1 mA, C

OUT

NCP730

= 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified

OUT

A)

μ

(

0.10

High limit

0.08

ADJ

0.06

0.6

0.4

ENABLE PULL- UP CURRENT, I

0.2

0.0

-40 -20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 12. Enable Internal Pull−Up Current vs.

Temperature

500

450

V

= V

OUT

400

(mV)

350

DROP

300

250

200

150

100

DROPOUT VOLTAGE, V

= 150 mA

I

OUT

All output voltage versions

50

0

-40 -20 0 20 40 60 80 100

Figure 14. Dropout Voltage vs. Temperature

VEN= 1 V

120

- 100 mV

OUT-NOM

JUNCTION TEMPERATURE, TJ(°C)

0.04

0.02

ADJ INPUT CURRENT, I

0.00

-40 -20 0 20 40 60 80 100

TEMPERATURE (°C)

Figure 13. ADJ Input Current vs. Temperature

High limit

120

120

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VIN = V

OUT−NOM

TYPICAL CHARACTERISTICS

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

= 1 mA, C

OUT

NCP730

= 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified

OUT

4.3 V

150 mA

1 mA

+58 mV

3.3 V

-120 mV

C1: V

IN

(ac) 50 mV/div

C2: V

OUT

C4: I

OUT

1.0 V/div 20.0 ms/div

100 mA/div

Figure 15. Load Transient − NCP730−3.3 V,

C

= 1 mF

OUT

38.0 V

150 mA

1 mA

+58 mV

3.3 V

V

IN

8.3 V

V

IN

150 mA

I

OUT

1 mA

I

OUT

+55 mV

V

OUT

3.3 V

V

OUT

-115 mV

C1: V

IN

C2: V

(ac) 50 mV/div

OUT

C4: I

OUT

2.0 V/div 20.0 ms/div

100 mA/div

Figure 16. Load Transient − NCP730−3.3 V,

C

= 1 mF

OUT

V

IN

4.3 V

V

IN

150 mA

I

OUT

1 mA

I

OUT

+37 mV

V

OUT

3.3 V

V

OUT

-120mV

C1: V

C2: V

C4: I

IN

OUT

OUT

(ac) 50 mV/div

10.0 V/div 20.0 ms/div

100 mA/div

Figure 17. Load Transient − NCP730−3.3 V,

C

= 1 mF

OUT

4.3 V

150 mA

1 mA

3.3 V

-50 mV

+30 mV

C1: V

IN

C2: V

(ac) 50 mV/div

OUT

C4: I

OUT

Figure 19. Load Transient − NCP730−3.3 V,

1.0 V/div 50.0 ms/div

100 mA/div

C

= 22 mF

OUT

-60 mV

C1: V

IN

C2: V

(ac) 50 mV/div

OUT

C4: I

OUT

1.0 V/div 50.0 ms/div

100 mA/div

Figure 18. Load Transient − NCP730−3.3 V,

C

= 10 mF

OUT

V

IN

V

IN

I

OUT

I

OUT

6.0 V

150 mA

1 mA

+55 mV

V

OUT

5.0 V

V

OUT

-115 mV

C1: V

IN

C2: V

(ac) 50 mV/div

OUT

C4: I

OUT

5.0 V/div 20.0 ms/div

100 mA/div

Figure 20. Load Transient − NCP730−5.0 V,

C

= 1 mF

OUT

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VIN = V

OUT−NOM

TYPICAL CHARACTERISTICS

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

= 1 mA, C

OUT

NCP730

= 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified

OUT

38.0 V

150 mA

1 mA

+48 mV

5.0 V

-112 mV

C1: V

IN

C2: V

(ac) 50 mV/div

OUT

C4: I

OUT

10.0 V/div 20.0 ms/div

100 mA/div

Figure 21. Load Transient − NCP730−5.0 V,

C

= 1 mF

OUT

6.0 V

150 mA

1 mA

V

IN

6.0 V

V

IN

150 mA

I

OUT

V

OUT

1 mA

5.0 V

+36 mV

I

OUT

V

OUT

-60mV

C1: V

IN

(ac) 50 mV/div

C2: V

OUT

C4: I

OUT

5.0 V/div 50.0 ms/div

100 mA/div

Figure 22. Load Transient − NCP730−5.0 V,

C

= 10 mF

OUT

V

15.5 V

IN

V

IN

150 mA

I

OUT

1 mA

I

OUT

5.0 V

+34 mV

-53 mV

C1: V

IN

(ac) 50 mV/div

C2: V

OUT

C4: I

OUT

5.0 V/div 50.0 ms/div

100 mA/div

Figure 23. Load Transient − NCP730−5.0 V,

C

= 22 mF

OUT

38.0 V

150 mA

1 mA

15.0 V

+50 mV

-110 mV

C1: V

IN

(ac) 100 mV/div

C2: V

OUT

C4: I

OUT

10.0 V/div 20.0 ms/div

100 mA/div

V

OUT

15.0 V

+55 mV

V

OUT

-120 mV

C1: V

IN

(ac) 100 mV/div

C2: V

OUT

C4: I

OUT

10.0 V/div 20.0 ms/div

100 mA/div

Figure 24. Load Transient − NCP730−15.0 V,

C

= 1 mF

OUT

V

IN

V

15.5 V

IN

150 mA

I

OUT

1 mA

I

OUT

+40 mV

V

OUT

15.0 V

V

OUT

-105 mV

C1: V

IN

(ac) 50 mV/div

C2: V

OUT

C4: I

OUT

10.0 V/div 50.0 ms/div

100 mA/div

Figure 25. Load Transient − NCP730−15.0 V,

C

= 1 mF

OUT

Figure 26. Load Transient − NCP730−15.0 V,

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9

C

OUT

= 10 mF

VIN = V

mA

00mA

mA

= 1

00mA

OUT−NOM

TYPICAL CHARACTERISTICS

+ 1 V and VIN ≥ 2.7 V, VEN = 1.2 V, I

= 1 mA, C

OUT

NCP730

= 1.0 mF, ADJ tied to OUT, TJ = 25°C, unless otherwise specified

OUT

15.5 V

150 mA

1 mA

+45 mV

15.0 V

-98 mV

C1: V

IN

(ac) 50 mV/div

C2: V

OUT

C4: I

OUT

10.0 V/div 50.0 ms/div

100 mA/div

Figure 27. Load Transient − NCP730−15.0 V,

C

= 22 mF

OUT

5.3 V

4.3 V

+3.5 mV

+2 mV

3.3 V

I=1

OUT

C

= 1

OUT

V

V

V

15.5 V

IN

V

IN

150 mA

I

OUT

1 mA

I

OUT

+16 mV

V

OUT

15.0 V

V

OUT

-44 mV

C1: V

IN

(ac) 20 mV/div

C2: V

OUT

C4: I

OUT

10.0 V/div 100.0 ms/div

100 mA/div

Figure 28. Load Transient − NCP730−15.0 V,

C

= 50 mF

OUT

I=1

OUT

μ

IN

OUT

F

C

5.3 V

4.3 V

+9.5 mV

+7 mV

3.3V

OUT

= 1

μ

F

V

IN

V

OUT

-2.5 mV

C1: V 2.0 V/div 50.0μs/div

IN

C2: V

(ac) 5 mV/div

OUT

-3 mV

-6 mV

C1: V 2.0 V/div 10.0

IN

C2: V

(ac) 10 mV/div

OUT

-8 mV

Figure 29. Line Transient − NCP730−3.3 V Figure 30. Line Transient − NCP730−3.3 V

9.3 V

8.3 V

+1 mV

-1 mV

C1: V 2.0 V/div 50.0μs/div

IN

C2: V

(ac) 5 mV/div

OUT

+1 m V

-1 mV

3.3 V

V

I=1

OUT

C

OUT

V

IN

μ

OUT

F

9.3 V

8.3 V

+2 mV

-2 mV

C1: V 2.0 V/div 10.0μs/div

IN

C2: V

(ac) 10 mV/div

OUT

+2 mV

-2 mV

Figure 31. Line Transient − NCP730−3.3 V Figure 32. Line Transient − NCP730−3.3 V

I=1

OUT

C

= 1

OUT

3.3 V

μ

V

V

s/div

IN

μ

F

OUT

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