Semiconductor NCP361, NCV361 User manual

NCP361, NCV361
USB Positive Overvoltage Protection Controller with Internal PMOS FET and Overcurrent Protection
The NCP361 disconnects systems at its output when wrong VBUS operating conditions are detected at its input. The system is positive overvoltage protected up to +20 V.
Thanks to an integrated PMOS FET, no external device is necessary, reducing the system cost and the PCB area of the application board.
The NCP361 is able to instantaneously disconnect the output from the input if the input voltage exceeds the overvoltage threshold (5.675 V). Thanks to an overcurrent protection, the integrated PMOS is turning off when the charge current exceeds current limit (see options in ordering information).
The NCP361 provides a negative going flag (FLAG) output, which alerts the system that voltage, current or overtemperature faults have occurred.
In addition, the device has ESDprotected input (15 kV Air) when bypassed with a 1 mF or larger capacitor.
Features
Overvoltage Protection up to 20 V
Onchip PMOS Transistor
Overvoltage Lockout (OVLO)
Undervoltage Lockout (UVLO)
Overcurrent Protection
Alert FLAG Output
EN Enable Pin
Thermal Shutdown
Compliance to IEC6100042 (Level 4)
8 kV (Contact) 15 kV (Air)
ESD Ratings: Machine Model = B
ESD Ratings: Human Body Model = 2
UDFN6 2x2 mm and TSOP5 3x3 mm Packages
NCV Prefix for Automotive and Other Applications Requiring
Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable
This is a PbFree Device
Applications
USB Devices
Mobile Phones
Peripheral
Personal Digital Applications
MP3 Players
Set Top Boxes
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MARKING
DIAGRAMS
6 PIN UDFN
CASE 517AB
5
1
TSOP−5
CASE 483
xxx = Specific Device Code M = Date Code A = Assembly Location Y = Year W = Work Week G = Pb−Free Package (Note: Microdot may be in either location)
PIN CONNECTIONS
1
GND
2
IN
3
UDFN
IN
1
GND
2
EN
3
TSOP−5
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet.
1
xxx AYWG
1
6
5
4
5
4
xx M
G
G
FLAGEN
OUT
OUT
OUT
FLAG
© Semiconductor Components Industries, LLC, 2012
February, 2019 Rev. 5
1 Publication Order Number:
NCP361/D
NCP361, NCV361
INPUT
EN
1 mF 25 V X5R 0603
LDO V
INPUT
34
IN
C1
EN
OUT OUT
NCP361
FLAG
GND
2
5
61
OUTPUT
1 mF 25 V X5R 0603
C2
FLAG
Figure 1. Typical Application Circuit (UDFN Pinout)
Thermal Shutdown
REF
Soft Start
UVLO OVLO
FLAG Power
R1 1M
2 1
FLAG_State
J2
OUTPUT
(2 out pins in UDFN package)
FLAGV
Figure 2. Functional Block Diagram
PIN FUNCTION DESCRIPTION (UDFN Package)
Pin No. Name Type Description
1 EN INPUT Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the
2 GND POWER Ground
3 IN POWER Input Voltage Pin. This pin is connected to the VBUS. A 1 mF low ESR ceramic capacitor, or larger,
4, 5 OUT OUTPUT Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is
6 FLAG OUTPUT Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin
output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND or to a I/O pin. This pin does not have an impact on the fault detection.
must be connected between this pin and GND.
above OVLO threshold or below UVLO threshold. A 1 mF capacitor must be connected to these pins. The two OUT pins must be hardwired to common supply.
goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to VCC must be added.
PIN FUNCTION DESCRIPTION (TSOP5 Package)
Pin No. Name Type Description
1 IN POWER Input Voltage Pin. This pin is connected to the VBUS. A 1 mF low ESR ceramic capacitor, or larger,
2 GND POWER Ground
3 EN INPUT Enable Pin. The device enters in shutdown mode when this pin is tied to a high level. In this case the
4 FLAG OUTPUT Fault Indication Pin. This pin allows an external system to detect a fault on VBUS pin. The FLAG pin
5 OUT OUTPUT Output Voltage Pin. The output is disconnected from the VBUS power supply when the input voltage is
must be connected between this pin and GND.
output is disconnected from the input. To allow normal functionality, the EN pin shall be connected to GND or to a I/O pin. This pin does not have an impact on the fault detection.
goes low when input voltage exceeds OVLO threshold. Since the FLAG pin is open drain functionality, an external pull up resistor to VCC must be added.
above OVLO threshold or below UVLO threshold. A 1 mF capacitor must be connected to this pin.
NOTE: Pin out provided for concept purpose only and might change in the final product
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NCP361, NCV361
MAXIMUM RATINGS
Rating Symbol Value Unit
Minimum Voltage (IN to GND) Vmin
in
Minimum Voltage (All others to GND) Vmin 0.3 V
Maximum Voltage (IN to GND) Vmax
in
Maximum Voltage (All others to GND) Vmax 7.0 V
Maximum DC Current from Vin to Vout (PMOS) (Note 1) Imax 600 mA
Thermal Resistance, JunctiontoAir TSOP−5
R
q
JA
UDFN
Operating Ambient Temperature Range T
Storage Temperature Range T
Junction Operating Temperature T
ESD Withstand Voltage (IEC 61000−4−2)
A
stg
J
Vesd 15 Air, 8.0 Contact Human Body Model (HBM), Model = 2 (Note 2) Machine Model (MM) Model = B (Note 3)
Moisture Sensitivity MSL Level 1
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected.
1. With minimum PCB area. By decreasing R
2. Human Body Model, 100 pF discharged through a 1.5 kW resistor following specification JESD22/A114.
, the current capability increases. See PCB recommendation page 9.
q
JA
3. Machine Model, 200 pF discharged through all pins following specification JESD22/A115.
0.3 V
21 V
305
°C/W
240
40 to +85 °C
65 to +150 °C
150 °C
kV
2000
200
V V
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NCP361, NCV361
ELECTRICAL CHARACTERISTICS
(Min/Max limits values (40°C < T
Characteristic Symbol Conditions Min Typ Max Unit
Input Voltage Range V
Undervoltage Lockout Threshold UVLO Vin falls down UVLO threshold 2.85 3.0 3.15 V
Uvervoltage Lockout Hysteresis UVLO
Overvoltage Lockout Threshold OVLO Vin rises up OVLO threshold 5.43 5.675 5.9 V
Overvoltage Lockout Hysteresis OVLO
Vin versus V
Dopout V
out
Overcurrent Limit I
Supply Quiescent Current Idd No Load, Vin = 5.25 V 20 35 mA
Standby Current I
Zero Gate Voltage Drain Current
FLAG Output Low Voltage
FLAG Leakage Current
EN Voltage High V
EN Voltage Low V
EN Leakage Current
TIMINGS
Start Up Delay t
FLAG going up Delay
Output Turn Off Time t
Alert Delay t
Disable Time t
Thermal Shutdown Temperature T
Thermal Shutdown Hysteresis T
< +85°C) and Vin = +5.0 V. Typical values are TA = +25°C, unless otherwise noted.)
A
1.2 20 V
50 70 90 mV
50 100 125 mV
Vol
I
DSS
in
drop
lim
std
flag
hyst
hyst
Vin = 5 V, I charge = 500 mA 150 200 mV
Vin = 5 V 550 750 950 mA
Vin = 5 V, EN = 1.2 V 26 37 mA
VDS = 20 V, VGS = 0 V 0.08 mA
Vin > OVLO
Sink 1 mA on FLAG pin
FLAG
EN
t
start
on
off
leak
ih
il
leak
From Vin > UVLO to V
From Vin > UVLO to FLAG = 1.2 V, See Fig 3 & 10 3.0 ms
From Vin > OVLO to V
FLAG level = 5 V 5.0 nA
Vin from 3.3 V to 5.5 V 1.2 V
Vin from 3.3 V to 5.5 V 0.55 V
EN = 5.5 V or GND 170 nA
= 0.8xVin, See Fig 3 & 9 4.0 15 ms
out
0.3 V, See Fig 4 & 11
out
Vin increasing from 5 V to 8 V at 3 V/ms.
No output capacitor.
stop
From Vin > OVLO to FLAG 0.4 V, See Fig 4 & 12
Vin increasing from 5 V to 8 V at 3 V/ms
dis
From EN 0.4 to 1.2V to V
0.3 V, See Fig 5 & 13
out
Vin = 4.75 V.
No output capacitor.
sd
sdhyst
400 mV
0.7 1.5 ms
1.0 ms
3.0 ms
150 °C
30 °C
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