Seiko G1216, G121600N000 User Manual

AN.No.G121600N000-3D0E

LIQUID CRYSTAL DISPLAY MODULE

G 1 2 1 6 0 0 N 0 0 0

USER’S MANUAL

Seiko Instruments Inc.

AN.No.G121600N000-3D0E

- i -

This manual provides technical information covering functions and operational
instructions for the G1216 liquid crystal display modules made by Seiko
Instruments Inc. Pleas e read throu gh this m anual bef ore operat ing the product.
Distribution of this manual to th ir d p ar ties for any purpose other th an o per at ion of
the product is prohib ited. The descriptio ns herein are s ubject to cha nge without
prior notice.

Revision Record

Version

Revision Date

1 Original December 1993

Copyright



1993 by Seiko Instruments Inc.

Printed in Japan

AN.No.G1216001N000-3D0E

- ii -

CONTENTS

1. GENERAL

1.1 General..................................................................................................... 1

1.2 Features.................................................................................................... 1

1.3 Absolute Max imum Ratings ..................................................................... 2

1.4 Mechanical .............................................................................................. 2

1.5 Electrical Characteristics .......................................................................... 2

1.6 Optical Characteristics.............................................................................. 3

1.7 LC Panel Life Time................................................................................... 4

1.8 Dimensions............................................................................................... 5

2. CIRCUIT CONFIGURATION

2.1 Block Diagram .......................................................................................... 6

2.2 Segment Drivers (HD61202).................................................................... 6

2.3 Common Driver (HD61203)...................................................................... 12

2.4 Bias Vo lta ge Generat or ............................................................................ 12

3. OPERATING INSTRUCTIONS

3.1 Terminal Functions................................................................................... 13

3.2 Timing Characteristics.............................................................................. 14

3.3 Reset Function ......................................................................................... 15

3.4 Instructions ............................................................................................... 16

3.5 Contrast Adjustment and Power Supply Example ................................... 20

3.6 MPU Connec ti on Diagram........................................................................ 20

4. PRECAUTIONS................................................................................................... 21

INDEX

AN.No.G121600N000-3D0E

- 1 -

1.

GENERAL

1.1 General
The G1216 is a very thin LCD module on which a full-dot m atrix LCD panel and a CMOS IC driver are

integrated. The LCD panel used here features wide viewing angle and high contrast. This full dot
configuration allows a wide variety of patterns to be displayed depending upon the input data. The
display position is the intersection point of the matrix transparent electrodes. This prevents display
distortion and displacem ent. Incorporating a display RAM and a displa y timing signal generator int o the
G1216 allows for direct connection with the MPU circuit without using an LCD controller.

1.2 Features



12864 full dot matrix configuration



1/64 duty, 1/9 bias



Two 4096-bit internal display data RAMs



An internal display timing signal generator



8-bit parallel interface



Instructions:

Display Data Read/W rite, Display ON/OFF, Display Start L ine, X-Address (Page) Set, Y- Address
Set, and Status Read.



Two types of power supply: VDD=+5 V, V

LC



Reflective, gray mode



Positive display

Display data “H”: Display ON: blue display color
Display data “L”: Display OFF: gray background



A wide operating temperature rang e

AN.No.G121600N000-3D0E

- 2 -

1.3 Absolute Maximum Ratings

Vss = 0 V

-

0.3

V

DD

-19.0

-0.3

-20

-30
+20
+20

Ta = 25C

5010%RH



65%RH

—



48 hrs



1000 hrs

7.0

V

DD

+ 0.3

V

DD

+ 0.3
+ 70
+ 80

+85
+65

V
V
V



C



C
%RH
%RH

V

DD

V

LC

V

IN

T

opr

T

stg

—
—

Power supply

voltage

Input voltage

Operating

temperat ur e

Storage

temperat ur e

Storage humidity

Item Symbol Conditions Min. Max. Unit

1.4 Mechanical Characteristics
Item Standard

Dot configuration 12864 dot
Module dimensions ( H  V  T ) [ mm ] 75.0  52.7  6.8
Viewing area ( H  V ) [ mm ] 60.0  32.5
Active display area ( H  V ) [ mm ] 55.01  27.49
Dot dimensions ( H  V ) [ mm ] 0.4  0.4
Dot pitch ( H  V ) [ mm ] 0.43  0.43
Weight [ g ] 35 max.

H : Horizontal V : Vertical T : Thickness (max.)

1.5 Electrical Characteristics

V

DD

= 5 V5%, VSS = 0 V, Ta = -20C to +70C

Input

voltage

1

Input

voltage

2

Output

voltage

3

V
V
V
V
V
V
V

V
mA
mA

H

Z

V

DD

0.3V

DD

V

DD

0.8
—

0.4

5.25

-3.0

4.0

4.0
—

—
—
—
—
—
—

5.00

-8.2

2.0

1.8

71.4

0.7

V

DD

0

2.0
0

2.4

—

4.75

-12.0
—
—
—

—
—
—
—

I

OH

=- 205 A

I

OL

= 1.6 mA

—
—

V

DD

=5 V, Ta = 25C

V

LC

=- 8.2 V

—

High
Low
High
Low
High
Low

V

IHC

V

ILC

V

IHT

V

ILT

V

OH

V

OL

V

DD

V

LC

I

DD

I

LC

f

FRM

Item Symbol UnitMin. Typ. Max.

Power supply

voltage

Current consumpt ion

4

Frame frequency

Conditions

1

Applied to RST.

2

Applied to DB0 to DB7, E, R/W, D/I, CS1 and CS2.

3

Applied to DB0 to DB7.

4

Display patterns: checkered patterns.

AN.No.G121600N000-3D0E

1.6 Optical Characteristics

Note 4

Note 3

40
100
630

2300

100

200
1000
3500

—
—
—
—

—5.53.0

Refer to notes

1 and 2

—
—



—
—
—

-20
—
—

-20
—
—

—
20
40
—
40
60

-20°C

25°C

Response time

θ = 0°
φ = 0°

Vopr=14.1 V

θ = 0°
φ = 0°

Vopr=13.2 V

t

on

t

off

t

on

t

off

25°CC

θ = 0°
φ = 0°

Vopr=13.2 V

C ≥ 2.0
φ = 270°
Vopr=13.2 V

C ≥ 2.0
φ = 0°
Vopr=13.2 V

Contrast

25°C

25°C

θ

1

θ

2

θ2-θ

1

θ

1

θ

2

θ2-θ

1

Viewing angle

Measuring instrument : Canon illuminometer LC-3S

1/64 duty, 1/9 bias, f

FRM

= 71.4 Hz, Vopr = VDD-VLC , LED backlight: OFF

Item Sym. Conditions RemarkMin.Temp. Typ. Max.

ms

—

Degree

Unit

θ2θ

1

2.0

Cmax.

Viewing angle

Contrast C

Y’(φ=180°)

θ2θ

1

Light
(reflective LCD)

Sensor

LCD panel

Y (φ=0°)
(θ=90°)

φ

Z’

Z (θ=0°)

θ

X (φ=90°)

X’

Note 1: Definition of angle θ and

φ

Note 2: Definition of viewing angles θ1 and θ2

Remark: The optimum viewing angle by visual

inspection and angle θ at Cmax do not
always match.

AN.No.G121600N000-3D0E

- 4 -

Brigh

tness of non-selected dot (reflection)

B

2

C =

Brightness of selected dot (reflection) B

1

t

off

t

on

Sel

ected status

(display ON)

10%

B

2

B

1

0

(%)

Operating voltage(V)

Brightness for selected dot

Brightness curve
for non-selected
dot

Non-selected
status

100%

90%

V

opr

: Operating voltage ton: Response time (rise)

f

FRM

: Frame frequency t

off

: Response time (fall)

Note: Measurement must be made using a transmissive LCD panel.

V

opr

1/f

FRM

Note 4: Definition of response time

Note 3: Definition of contrast (C)

Brightness
(reflection)

Dark

Light

Brightness

(V)

N

on-selected status

(display OFF)

1.7 LC panel life time

Life time

1

hrs100,000 or more

25C10C
<65%RH

Item UnitConditions Standard

1

Definition of life time: the time up to occurrence of any of the following:



Contrast reduces to 30% of the initial value.



Current consumption becomes three times the initial value.



Orientation deteriorates significantly.



The display malfunctions.

AN.No.G121600N000-3D0E

1.8 Dimensions

Power supply voltage: +5.0 V
GND: 0 V
LC drive voltage
Data bus (LSB)
Data bus
Data bus
Data bus
Data bus
Data bus

Data bus

Functions

DB

7

CS1
CS2
RST
R/W

D/I

E

F

GND

NC

NC

Data bus (MSB)
Chip select (1)
Chip select (2)
Reset
Read/Write
Data/Instruction
Enable
Frame ground

1

—

—

I/O terminal functions

Unit: mm

General dimensional tolerance:

±

0.5

11
12
13
14
15
16
17
18
19

20

V

DD

V

SS

V

LC

DB

0

DB

1

DB

2

DB

3

DB

4

DB

5

DB

6

1
2
3
4
5
6
7
8
9

10

Sym.No.

Figure 1 Dimensions

FunctionsSym.No.

1

F

GND

is connected to the metallic frame of the module. Use this frame when grounding.

AN.No.G121600N000-3D0E

- 6 -

2. RCUIT CONFIGURATION

2.1 Block Diagram
This product consists of two HD61202 segment drivers, an HD61203 common driver and a bias

voltage generator. Figure 2 shows the block diagram.

CS2

RST, R/W, D / I, E

DB

0

to DB

7

V

DD

CS1

V

SS

64

12864 full dot matrix LCD

Segment Driver 1

V

LC

Va, Vc, Vd, V

f

V

a

V

b

V

e

V

f

Segment Driver 2

Common Driver

Bias Voltage

Generator

FRM
M
CL2



1



2

64 64

Figure 2 Block Diagram

2.2 Segment Drivers (HD61202)
The segment driver is a 64 drive out put CMOS IC. The G1216 is driven wit h the panel d ivided into

two right and left displays. A segm ent driver controls the divided sc reen. 8 bits of data transm itted
from the MPU are saved in the int er na l d ispl a y RA M, an d t he s e gment signal is generate d to dri ve t he
LC. 1 bit of display RAM data corresponds to 1 dot lighting or non-lighting on the LC panel.

AN.No.G121600N000-3D0E

2.2.1 Block Diagram (Segment Driver)

Input and Output Buffer

Instruction Register

X, Y-Address

Counter

Z-Address

Counter

Display Start Line

Register

Busy Flag

Display Data RAM

4096 bit

CS R/W D/I

DB0 to DB

7

E

LC Driver

Display ON/OFF

M

FRM

CL

φ

1

RST

Input RegisterOutput

Register

Display Data Latch

Segment Driver

V

DD

V

SS

V

LC

8

6

Interface Control

4

V

a

V

c

V

d

V

f

64

64

8

8

8

8

9

9

6

6

Y1 Y2

Y64

φ

2

Figure 3 Segment Driver

AN.No.G121600N000-3D0E

- 8 -

2.2.2 Functions and Operations of Main Blocks
(1) Interface Control Unit

The interface control unit consists of the following blocks:



Input and output buffer



Input and output register



Instruction re gister

The above blocks are selected according to the following combinations of R/W and D/I signals:

D / I R / W Functions

1 1 Output Register Read

Internal Operation (Display Data RAM  Output Register)

10

Input Register Write

Internal Operation (Input Resister  Display Data RAM)
0 1 Bus y Check and Status Read
0 0 Instruction



Input and output buffer

The data is transmitted through eight data buses (DB

0

to DB7).

DB

7

...... MSB (most significant bit)

DB

0

...... LSB (least significant bit)

The data can be input and output only when th e Chip Selec t is select ed. Therefor e, if the Chip
Select is not selected, the internal condition remains unchanged and instruction will not be
executed, even when changing the signal of the input terminals excluding the RST (reset)
terminal.

Note that the RST operates regardless of CS1 and CS2.



Input and output register

This product is provided with an input register and an output register so that the product can
interface with MPUs having speed differing from the internal operation.



Input register

The input register is a register that is used for temporarily storing the data to be written in
the display data RAM. The data to be written from the MPU to the input register will be
automatically written in the display data RAM through internal operation.

When the Chip Select is selected and R / W = 0, D / I =0, the data is written in the register,
synchronized with the fall of signal E.



Output register
The output register is a register that is used for temporarily storing the data to be read from

the display data RAM.

AN.No.G121600N000-3D0E

- 9 -

In order to read the content of the outp ut register, the Chip Sel ect must be selected, D/I must be
1, and R/W must be 1. When executing the “Read” instruction, the contents of the output
register stored at that time are output dur ing the tim e that “E” is 1. When “ E” falls, displa y data
of the currently indicated address is written in the output register. After that, the address
advances by one.

The contents of the output register are re written by the Read ins truction. The data is r etained
by the address set or other instructions. Acc ordi ngly, when performing the addr ess s et, and nex t
executing the Read ins truction, the data of the s pecified address is not output and the data of
the address which is specified is out put at the secon d data read tim e. Therefore, when s etting
the address, a dummy read is needed once. See Figure 4.

Busy
Check

Data Read
(dummy)

Address
Set
(Address
N)

N+1 add

ress data

N+2

N

N+1

N add

ress data

D / I

R/W

E

Address

Output Re gister

DB0 to DB

7

Busy
Check

Busy
Check

Data Read
(N address
data)

Busy
Check

Data Read
(N+1 address
data)

Figure 4 Read Timing

(2) Busy flag

The status when busy flag is “1” means that the module is operating internally. Instructions
other than he Status Read are not availabl e at this tim e. The busy flag is o utput to DB

7

by the

Status Read instruction. Ensure that the busy flag is “0” before executing the instruction.

BUSY

E

T

BUSY

F is freq ue ncy of



1 or 2

(1 / 2 the s o urce oscillatio n frequency of HD6 1203): 215 k Hz typ.

1

F





T

BUSY



3

F



Figure 5 Busy Flag

(3) Display ON/OFF Flip/Flop

The display ON/OFF Flip/Flo p is a flip-flop function that determ ines whether the display data
corresponding to the R AM data is output to the segm ent on the LCD (ON status ) or goes to all
nonlit status regardless of the RAM data (OFF s tatus ). This is controlled by the display ON/OFF
instruction. When the R ST signal becomes “0,” the disp lay goes to OFF status. This flip-flop
status is output to DB

5

by the Status Read instruction.

Even when performing display ON/OFF, the data inside the RAM is not affected.

AN.No.G121600N000-3D0E

- 10 -

(4) Display start line register

The display start line r egister is a re gister which det ermines the lin e address (see Figure 6) for
which data is displa yed on the top line of the LCD screen when dis playing the contents of the
display data RAM on the LCD screen. It is also used to scroll the dis play. The 6 bit (0 to 63)
display start line information is written in this register by the Display Start Line Set Instruction.

The contents of this register are transm itted to address c ounter Z at “H ” lev el of the FRM signal
(common driver output) which indicates the display start on the screen.

(5) Z-address counter

The Z-address counter generates the addres s to output the displ ay data synchroni zed with the
common signal. This is a 6-bit counter which cou nts at the f all of the CL s ignal (c ommon driver
output). The contents of the display start line regis ter are preset to the Z-addr ess counter at
“H” level of the FRM signal (common driver output).

(6) Display data RAM

The display data RAM is a RAM that stores the dis p lay dot data. 1 bit of RAM dat a c or res ponds
to lighting (data=1) or non- lighting ( data = 0) of 1 dot of the disp lay on the LCD screen. F igure
6 shows the relationsh ip bet ween the ad dr es s and data inside the RAM o n e ith er the righ t or left
screen (6464 dots). In this case, the display start line is 0.

AN.No.G121600N000-3D0E

Figure 6 Relationship Between Display and Data Inside Display RAM

62 63 641 2 3 4 5

COM62
COM63
COM64

0

0

0

1

111

1

101

0

001

00010

001

00010

001

00001

111

11000

010

000

000

001

000

011

111

110

00111110000

000

000

000

0

010

0

DB0(LSB)
DB

1

DB

2

DB

3

DB

4

DB

5

DB

6

DB7(MSB)

Y

0 Y1 Y2 Y3 Y4

Y61Y62Y

63

X=1

X=2

X=7

X=0

Y-address

COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9

Display pattern
(Display start line: 0)

Segment driver output
Y1 to Y

64

Data inside
display RAM

100

0

Line 0
Line 1

Line 2

Line 62
Line 63

Common driver
output
X1 to X

64

Line address

X- address
(page)

(7) X, Y- address counter

X, Y- ddress counter is a 9-bit counter which gives the address of the internal display data
RAM. It is necessary to set the X-address counter of the three upper bits, and the Y-address
counter of the six lower bits using differing instructions.

l X-address counter

Address counter X is a simple register that is not provided with a count function. The
address is set by instruction.

AN.No.G121600N000-3D0E

l Y-address counter

This counter sets the address by instruction and is automatically advanced by the read/write
operation. Counting is performed by looping the values 0 to 63.

2.3 Common driver (HD61203)
The common driver is a 64 drive output CMOS IC. Incorporating an oscillation circuit, this driver

generates the common signal and timing signals (LC AC drive control, and one-frame timing signal)
necessary for the LC display, and controls the display by supplying the timing signals to the segment
drivers.

2.4 Bias voltage generator
Six levels of standard voltage Va to Vf are applied to the drivers as a bias voltage. This voltage is

generated by resistance division of Vopr and driven by a voltage follower through an operational
amplifier.

–

+–+–+–+

C

R

1

V

opr

V

DD

1 / 9 bias: R2= (9-4) R1= 5 R

1

V

a

V

b

V

c

V

d

V

e

V

f

Operational

Amplifier

Figure 7 Bias Voltage Generator

C

R

1

C

R

2

C

R

1

C

R

1

V

LC

AN.No.G121600N000-3D0E

- 13 -

3. OPERATING INSTRUCTIONS

3.1 Terminal Functions

Table 1 Terminal Functions

8 I/O MPU

Common terminal for tristate input and output, and data bus.

Functions

Destination

I/O

QTY

Signal

DB

0

to

DB

7

E 1

Enable
Write (R/W =0):Latches data of DB

0

to DB7 at the fall of E.

Read (R/W=1):Outputs data to DB

0

to DB7 while “E” keeps a

high level.

Input MPU

R/W 1 Input MPU

Read/Write selection
R/W=1: Wh en E=1 and CS1= 0 or CS2=0, the data i s output

to DB

0

to DB7 and read is available by MPU.

R/W=0: Wh en CS1=0 or CS2 = 0, DB

0

to DB7 are ready for

receiving the input.

D/I 1 Input MPU

Data/Instruction selection
D/I=1: Indicates that the data in DB

0

to DB7 is the display

data.

D/I=0: Indicates that the data in DB

0

to DB7 is the

instruction code.

CS1, CS2 2 Input MPU

Chi

p select input. Data input and output is poss

ibl

e under

the following status:

Terminal No.

Status

RST 1 Input MPU

Reset signal
Setting the RST signal to a low level allows for initial setup.

(1) ON /OFF register: 0 setup (display OFF)
(2) Di s play start line re gister: 0 line setup (d i s play starts

from 0 line)
The setup status is retained until the status is changed by an
instruction after reset is released.

V

DD

1



Power Power terminal for logic (+5 V)

V

SS

1



Power GND terminal (0 V)

V

LC

1



Power Power terminal for LC drive

1

F

GND

terminal is connected to the metallic frame of the module. Use this terminal when

grounding the frame.

F

GND

1

 

Frame ground

1

CS2CS1

LCM display screen

CS1

0

CS2

0

CS1: C

ontrols the

LCM left half displ

ay screen

(SEG1

to
SEG64).
CS2: Contr ols t he LCM right half display scree n (SEG65 to
SEG128).

AN.No.G121600N000-3D0E

3.2 Timing Characteristics

-

-

­25
25

-

-

-

320

-

-

1000

450
450

-

-

140

10

200

­10
20

t

CYC

P

WEH

P

WEL

t

r

t

f

t

AS

t

AH

t

DSW

t

DDR

t

DHW

t

DHR

-

-

-

-

-

-

-

-

-

-

-

ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1, 2
1
2, 3
1
2

E cycle time
E pulse width (H)
E pulse width (L)
E rise time
E fall time
Address setup time
Address hold time
Data setup time
Data delay time
Data hold time during write
Data hold time during read

Note

unit

Max.

Typ.

Min.

Symbol

Item

t

f

t

CYC

t

CYC

R / W

2.4V

0.4V

t

DDR

t

DHR

t

AH

t

AH

2.0V

0.8V
t

AS

t

AS

2.0V

0.8V

t

DHW

t

DSW

t

AS

t

AS

2.0V

0.8V

t

AH

t

AH

t

r

2.0V

0.8V

P

WEL

2.0V

0.8V

P

WEH

D

1

Test point

C R

R

L

D

2

D

3

D

4

Note 1: When the MPU writes:

Note 3: Load circuits (DB0 to DB7)

E

t

f

t

r

P

WEL

2.0V

0.8V

P

WEH

Note 2: When the MPU reads:

DB0 to DB

7

RL= 2.4 k

Ω

R = 11 k

Ω

C = 130 pF (including jig capacity)
Diodes D1 to D4 are 1S2074 H .

E

DB0 to DB

7

R / W
CS1, CS2

D/I

CS1, CS2
D/I

2.0V

0.8V

AN.No.G121600N000-3D0E

- 15 -

3.3 Reset Function
Setting the RST terminal to a low level when the power is on allows for initial setup.



Display OFF



Display start line register: Set address 0.

While the RST rem ains at a low level, instructi ons other than the status read cannot be accep ted.
Execute other instructions after confirming that DB

4

=0 (reset release) and DB7=0 (ready) , usi ng the

status read instruction.
The power conditions for power-on initial setup are as follows:.

Item

Reset time

Rise time

Symbol

t

RST

t

r

Min

1.0



Typ.





Max



200

unit



s

ns

t

RST

t

r

0.3V

DD

V

DD

RST

4.5V

0.7V

DD

If the RESET is exec uted during operation, retention of the c ontents of all registers (excluding an
ON/OFF register) and the RAM is not guaranteed. Always set them again.

AN.No.G121600N000-3D0E

3.4 Instructions

3.4.1 General
Instructions are listed on Table 2. Instructions other than the Status Read instruction will not be

executed if they are sent while another instruction is already being executed. The busy flag is “1”
when executing the instruction. Check whether or not the flag is “1” before transmitting the
instructions from the MPU.

Table 2 List of Instructions

1

R/W D / I DB7DB6DB5DB4DB3DB2DB1DB

0

Code

Instruction

Function

Display
ON / OFF

Display start
line

X-address
(page) set

Y-address
set

Status read

Display data
write

Display data
read

0 0 0 0 1 1 1 1 1 1/0

0 0 1 1

Display start lines

( 0 to 63 )

0 0 0 1

Y-address
( 0 to 63 )

1 0

B

U

S
Y

0

ON

/

OFF

R
E
S
E
T

0 0 0

0 0 1 0 1 1 1

X-address(page)

(0 to 7)

0 1 Write Data

1 1 Read Data

Turns ON / OFF total display. Data and internal

status in the display RAM remain unchanged.
1: ON 0 : OFF

Determines the RAM line to be displayed on the
top line (COM1) on the display.

Sets the X-address of the RAM (page) in the X­address (page) register.

Set Y-address of the RAM in the Y-address
counter.

Reads the status.
RESET 1: Reset 0: Normal
ON/OFF 1: Display OFF 0: Display ON
BUSY 1: during internal operation

0: READY status

Accesses the RAM
in which address
has been specified
beforehand. After
that the Y-address
advances by one.

2

3

4

5

6

7

Note: The BUSY time varies depending upon the frequency Fφ (:215 kHz (typ.) ) of φ1 , φ2 (1/Fφ ≤ T

BUSY

≤ 3/Fφ).

0

Writes data DB0 (LSB) to
DB7 (MSB ) on the data bus
into the display RAM.

Reads data DB0 (LSB) to
DB7 (MSB) from the display
RAM into the data bus.

3.4.2 Detailed explanation

(1) Display ON/OFF

DB

0

Code

D/I DB

7

0 0 1 1 1 1 1 D

R/W

0 0

Turns the display ON when D=1, and OFF when D=0. When the display is turned OFF by D=0, the
original display appears if D is set to 1 because the display data is retained in the display data RAM.

AN.No.G121600N000-3D0E

- 17 -

(2) Display start line

DB

0

Code

D/I DB

7

1 1 A A A A A A

R/W

0 0

Upper bits

Lower bits

Sets the display data RAM line address expressed with binary AAAAAA in the display start line
register. When displaying the content of the display data RAM, the display data on the line addresses
which are set in the register is displayed on the top line on the LCD screen. For address
configuration inside the disp lay data, refer to Figure 6. Figure 8 shows display examples of start
lines 0 to 3



Figure 8 Relationship Between Display Start Lines and Displays

Display start line=0

COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10

-

-

­COM59
COM60
COM61
COM62
COM63
COM64

COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10

-

-

­COM59
COM60
COM61
COM62
COM63
COM64

Display start line=1

Display start line

=2

COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10

-

-

­COM59
COM60
COM61
COM62
COM63
COM64

COM1
COM2
COM3
COM4
COM5
COM6
COM7
COM8
COM9
COM10

-

-

­COM59
COM60
COM61
COM62
COM63
COM64

Display start line=3

AN.No.G121600N000-3D0E

(3) X-address (page) set

DB

0

Code

D/I DB

7

1 0 1 1 1 A A A

R/W

0 0

Upper bits

Lower bits

The display data RAM “X” address (page) which is expressed with binary AAA is set in the X-address
register. Following write/read operations from the MPU are performed on the specified X-address
(page) until the next X-address (page) set is performed. The configuration of display data RAM and
X-address is shown in Figure 9.

(4) Y-address set

DB

0

Code

D/I DB

7

0 1 A A A A A A

R/W

0 0

Upper bits Lower bits

The display data RAM Y- address which is expressed with binary AAAAAA is set in the Y-address
counter. After that the Y-address counter advances by one each time write/read is performed from
the MPU. The configuration of the display data RAM and Y-address is shown in Figure 9.

Figure 9 Display Data RAM Address Configuration

Page 0

Y-address

DB

0

to
DB

7

X=0

Page 1

DB

0

to
DB

7

X=1

Page 6

DB

0

to
DB

7

X=6

Page 7

DB

0

to
DB

7

X=7

0 1 2 3 4 - - - - - - - - - - - - - - - 61 62 63

AN.No.G121600N000-3D0E

- 19 -

(5) Status read

ON/OFF

DB

0

Code

D/I DB

7

RESET

0 0 0 0

R/W

1 0 0

BUSY

BUSY: When BUSY=1, it means that the the module is operating internally and the next

instruction is not accepted until BUSY=0. After confirming that BUSY=0, it is necessary to
perform the next write.

ON/OFF: Indicates that the display is OFF when ON/OFF=1.

Indicates that the display is ON when ON/OFF=0.

RESET: Indicates that initial setup is performed by the RST signal.

Indicates that the initialization is being performed when RESET=1 and instructions other
than the Status Read instruction are not accept ed.
When RESET=0, initialization is completed and operation status is normal.

(6) Display data write

DB

0

Code

D/I DB

7

D D D D D D D D

R/W

0 1

Upper bits

Lower bits

Writes 8-bit binary data DDDDDDDD in the display data RAM. After the write is completed, the Y­address is automatically advanced by one

(7) Display data read

DB

0

code

D/I DB

7

D D D D D D D D

R/W

1 1

Upper bits

Lower bits

Read 8-bit binary data DDDDDDDD from the display data RAM. After read is performed, the Y­address is automaticall y advanced by one. A dummy read is neces sary once, imm ediately after the
address set is completed. For details, refer to segment driver output register section.

AN.No.G121600N000-3D0E

3.5 Contrast Adjustment and Power Supply Example
The LC panel viewing angle and display screen contrast are greatly affected by the ambient

temperature. The recommended LC drive voltage (Vopr) at each temperature is given below. Vopr is
a value at which the best display is visually obtained. This value does not always correspond to the
value at which the best contrast (Cmax.) is obtained. A contrast adjustment circuit example is shown
below

Figure 10 Contrast Adjustment

V

opr

= VDD-V

LC

Temperature (°C)

Voltage (V

opr

)

-20

13.5

0

13.0

25

12.5

50

11.5

70

10.5

V

DD

V

SS

V

LC

G1216

R

A

C1

C2

12 V

RA=10 k

Ω

RB=1.2 k

Ω

RV (variable resistor)
=10 k

Ω

C1, C2=10 µF

R

V

R

B

5V

3.6 MPU Connection Diagram

Figure 11 Example of Connection to Z80A

G1216

D/I
RST

R/W

DB0 to DB

7

E

CS1

CS2

Z80A

V

DD

V

SS

V

LC

Z80 PIO

Decoder

D0 to D7

A0 to A15

RD

IORQ

M1

INT

φ

RD

IORQ

M1

INT

φ

A0

A1

A / B

C / D

CE

D0 to D7

A0 to A7

B1

B0

B2
B3
B4
B5

AN.No.G121600N000-3D0E

- 21 -

4. PRECAUTIONS

Safety



If the LCD panel is damaged, be careful not to get the liquid crystal in your mouth. If the liquid
crystal touches your skin or clothes, promptly wash it off using soap and plenty of water.

Handling



Avoid static electricity, as it will damage the CMOS LSI.



The LCD panel is made of plate glass. Do not hit or crush it.



Do not remove the panel or frame from the module.



The polarizer of the display is very fragile. Handle it very carefully.

Mounting and design



Mount the module by using the specified mounting parts and holes.



To protect the module against external pressure, place a transparent plate (e.g., acrylic or glass)
on the module, leaving a small gap between the display surface and transparent plate.

Module

Exterior face

Screw



Example

Transparent plate

Small gap



Design the system so that no input signal is given unless the power-supply voltage is applied.



Keep the module dry. Avoid condensation to prevent the transparent electrodes from being
damaged.

Storage



Store the module in a dark place, where the temperature is 25C  10C and the relative humidity
below 65%.



Do not store the module near organic solvents or corrosive gases.



Keep the module (including accessories) safe from vibration, shock and external pressure.

Cleaning



Do not wipe the polarizer with a dry cloth, as it may scratch the surface.



Wipe the module gently with a soft cloth soaked with a petroleum benzine.



Do not use ketonic (ketone) solvents (ketone and acetone) or aromatic solvents (toluene and
xylene), as they may damage the polarizer.

AN.No.G121600N000-3D0E

INDEX

- A -

Active display area ............................................................................. 2

- B -

Bias voltage generator ................................................................. 6, 12

Block diagram................................................................................. 6, 7

Busy flag......................................................................................... 7, 9

- C -

Chip select................................................................................ 6, 8, 13

Cleaning ........................................................................................... 21

Common driver............................................................................. 6, 12

Contrast........................................................................................ 3, 20

Contrast adjustment ......................................................................... 20

Current consumption..........................................................................2

- D -

Definition of contrast........................................................................... 4

Definition of response time................................................................ 4

Definition of viewing angles................................................................ 3

Display data RAM................................... 1, 7, 8, 10, 11, 16, 17, 18, 19

Display data read ....................................................................... 16, 19

Display data write.......................................................................16, 19

Display ON/OFF........................................................................... 7, 16

Display ON/OFF flip-flop ................................................................... 9

Display start line ........................................................7, 10, 11, 16, 17

Display start line register.............................................................. 7, 10

Dot dimensions................................................................................... 2

Dot pitch ............................................................................................. 2

- E -

Enable .......................................................................................... 6, 13

- F -

Frame frequency ................................................................................ 2

- I -

Input and output buffer ..................................................................7, 8

Input register ................................................................................. 7, 8

Input voltage....................................................................................... 2

AN.No.G121600N000-3D0E

- L -

LC drive voltage ........................................................................... 6, 20

LC panel life time................................................................................ 4

LED backlight characteristics ............................................................. 4

- O -

Operating temperature ....................................................................... 2

Output register............................................................................... 7, 8

Output voltage.................................................................................... 2

-P -

Power supply example ..................................................................... 20

Power supply voltage ............................................................... 2, 6, 21

- R -

Recommended LC drive voltage...................................................... 20

Reset ................................................................................. 6, 8, 13, 15

Response time ................................................................................... 3

- S -

Segment driver............................................................................... 6, 7

Status read...................................................................8, 9, 15, 16, 19

Storage............................................................................................. 21

Storage humidity ................................................................................ 2

Storage temperature ......................................................................... 2

- T-

Terminal functions ........................................................................... 13

- V -

Viewing angle..................................................................................... 3

Viewing area....................................................................................... 2

- W -

Weight ................................................................................................ 2

- X -

X-address counter............................................................................ 11

X, Y-address counter.................................................................... 7, 11

- Y -

Y-address counter......................................................................11, 12

- Z -

Z-address counter ........................................................................ 7, 10

Z80A ............................................................................................... 20

Seiko Instruments Inc.

Head Office

Components Overseas Marketing & Sales Department
1-8, Nakase, Mihama-ku, Chiba-shi, Chiba 261, Japan
Phone: [phone] FAX: [phone]

Seiko Instruments U.S.A. Inc.

Electronic Components Division
2990 W. Lomita Blvd., Torrance Calif. 90505, USA Phone: [phone] FAX: [phone]

Seiko Instruments GmbH

Siemensstrasse 9b, 63263 Neu-Isenburg, Germany Phone: [phone] FAX: [phone]

Seiko Instruments ( H. K. ) Ltd.

Sales Division
4-5/F, Wyler Centre 2, 200 Tai Lin Pai Road, Kwai Chung, N.T., Kowloon, Hong Kong
Phone: [phone] FAX: [phone]

Seiko Instruments Taiwan Inc.

5F-1 No. 99, SEC.2, Chung Shan N. Rd., Taipei 104, Taiwan, R.O.C.
Phone: [phone] FAX: [phone]