SANYO VPC-C40EX, VPC-C40E, VPC-C40, VPC-C40GX WARNING

WARNING

Do not use solder containing lead.

This product has been manufactured using lead-free solder in order to help preserve the environment. Because of this, be sure to use lead-free solder when carrying out repair work, and never use solder containing lead.

Lead-free solder has a melting point that is 30 - 40°C (86 104°F) higher than solder containing lead, and moreover it does not contain lead which attaches easily to other metals. As a result, it does not melt as easily as solder containing lead, and soldering will be more difficult even if the temperature of the soldering iron is increased. The extra difficulty in soldering means that soldering time will increase and damage to the components or the circuit board may easily occur. Because of this, you should use a soldering iron and solder that satisfy the following conditions when carrying out repair work.

Soldering iron

Use a soldering iron which is 70 W or equivalent, and which lets you adjust the tip temperature up to 450°C (842°F). It should also have as good temperature recovery characteristics as possible. Set the temperature to 350°C (662°F) or less for chip components, to 380°C (716°F) for lead wires and similar, and to 420°C (788°F) when installing and removing shield plates. The tip of the soldering iron should have a C-cut shape or a driver shape so that it can contact the circuit board as flat or in a line as much as possible.

Note:

If replacing existing solder containing lead with lead-free solder in the soldered parts of products that have been manufactured up until now, remove all of the existing solder at those parts before applying the lead-free solder.

Solder

Use solder with the metal content and composition ratio by weight given in the table below. Do not use solders which do not meet these conditions.

Metal content

Composition ratio by weight

Lead-free solder is available for purchase as a service tool. Use the following part number when ordering:

Part name: Lead-free solder with resin (0.5 mm dia., 500 g) Part number: VJ8-0270

Tin (Sn) Silver (Ag)

96.5 %

3.0 %

Copper (Cu)

0.5 %

– 2 –

1. OUTLINE OF CIRCUIT DESCRIPTION

1-1. CCD CIRCUIT DESCRIPTION

1. IC Configuration

The CCD peripheral circuit block basically consists of the following ICs. IC903 (MN39830PMJ-A) CCD imager IC901 (AN20112A) V driver IC905 (AD9996BBCZ) CDS, AGC, A/D converter,

H driver, vertical TG

Pin 1

Pin 13

2. IC903 (CCD)

[Structure]

Interline type CCD image sensor

Optical size 1/2.5 type format Effective pixels 2864 (H) X 2160 (V) Pixels in total 2934 (H) X 2171 (V) Optical black

Horizontal (H) direction: Front 12 pixels, Rear 58 pixels Vertical (V) direction: Front 6 pixels, Rear 5 pixels

Dummy bit number Horizontal : 28 Vertical :7

Pin No.

Symbol Pin Description

Fig. 1-1.Optical Black Location (Top View)

Photo diode

VDD

GND

13 14

Vertical shift register

Output part

Horizontal shift register

11 12 23 24 17 18 19

Fig. 1-2. CCD Block Diagram

Waveform

Voltag e

8 9

ø ø ø

GND

SUBSW

V6 V5B V5A V4 V3B V3A V3L V3R

V2 V1 V1S

V5R V5L

Vsub

1, 23, 24

2, 3

4, 7, 8, 9, 11

5, 6, 10

12, 15

20, 21

5L, V5R, V6

5A, V5B Vertical register transfer clock

V1S, V2, V3L,

V3R, V4

1, V3A, V3B

VDD

ØRG

GND

Vertical register transfer clock

Signal output

Circuit power DC 12 V

Reset gate clock

GND Protection transister bias

Substrate controlSUB SW

SUB

L, H1

Substrate clock

Horizontal register transfer clock

Table 1-1. CCD Pin Description

-6.0 V, 0 V

-6.0 V, 0 V, 12 V

-6.0 V, 0 V

-6.0 V, 0 V, 12 V

Aprox. 12 V

4.5 V, 7.8 V

GND 0 V

-6.0 V

0, 3.3 V (When importing all picture element: 3.3 V)

Aprox. 6 V (Different from every CCD)

0 V, 3.3 V

When sensor read-out

– 3 –

3. Part of IC905 (generation of vertical transfer clock, H Driver) and IC901 (V Driver)

An H driver (part of IC905) and V driver (IC901) are necessary in order to generate the clocks (vertical transfer clock, horizontal transfer clock and electronic shutter clock) which driver the CCD. IC905 has the generation of horizontal transfer clock and the function of H driver, and is an inverter IC which drives the horizontal CCDs (H1 and H2). It carries out generating vertical transfer clock, and output to IC901. In addition the XV1-XV6 signals which are output from IC905 are vertical transfer clocks, and the XSG signal is superimposed onto XV1, XV3 and XV5 at IC901 in order to generate a ternary pulse. In addition, the XSUB signal which is output from IC101 is used as the sweep pulse for the electronic shutter, and the RG signal which is output from IC905 is the reset gate clock.

4. IC905 (H Driver, CDS, AGC and A/D converter)

IC905 contains the functions of H driver, CDS, AGC and A/D converter. As horizontal clock driver for CCD image sensor, HØ1 (A and B) and HØ2 (A and B) are generated inside, and output to CCD. The video signal which is output from the CCD is input to pin (A6) of IC905. There are sampling hold blocks generated from the SHP and SHD pulses, and it is here that CDS (correlated double sampling) is carried out. After passing through the CDS circuit, the signal passes through the AGC amplifier (VGA: Variable Gain Amplifier). It is A/D converted internally into a 14-bit signal, and is then input to ASIC (IC101). The gain of the VGA amplifier is controlled by pin (A2), (B3) and (C4) serial signal which is output from ASIC (IC101).

REFB

REFT

OSUB

OV1

RESET

SUBCNT

VDC

CH1

V5R

V5L

V3R

V3L

V1S

CLI

AD9996

14-BIT

ADC

CLAMP

INTERNAL

REGISTERS

CLO

DOUT

SCK

SDI

VMSUB

3-level

2-level

24OV2

2-level

23OV4

2-level

21OV6

3-level

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

2-level

3-level

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

Level

conversion

VHH

OV5R

OV5L

OV3R

OV3L

OV1S

OV5A

OV5B

OV3A

OV3B

GND

CH2

CH4

CH3

CH5

SUB

CCDIN

3V INPUT

1.8V OUTPUT

1.8V INPUT

3V OUTPUT

H1 TO H8

XV1 TO XV24

XSUBCK

CDS

-3dB, 0dB, +3dB

LDO REG

CHARGE

PUMP

HORIZONTAL

DRIVERS

VERTICAL

TIMING

CONTROL

GP01 TO GP08

Fig. 1-4. IC905 Block Diagram

6~42 dB

VGA

INTERNAL

CLOCKS

PRECISION

TIMING

GENERATOR

SYNC

GENERATOR

VREF

SYNC

Fig. 1-3. IC901 Block Diagram

– 4 –

1-2. CP1, VF1 and TB1 CIRCUIT DESCRIPTION

1. Circuit Description

1-1. Digital clamp

The optical black section of the CCD extracts averaged values from the subsequent data to make the black level of the CCD output data uniform for each line. The optical black section of the CCD averaged value for each line is taken as the sum of the value for the previous line multiplied by the coefficient k and the value for the current line multiplied by the coefficient 1-k.

1-2. Signal processor

1. γ correction circuit

This circuit performs (gamma) correction in order to maintain a linear relationship between the light input to the camera and the light output from the picture screen.

2. Color generation circuit

This circuit converts the CCD data into RGB signals.

3. Matrix circuit

This circuit generates the Y signals, R-Y signals and B-Y signals from the RGB signals.

4. Horizontal and vertical aperture circuit

This circuit is used gemerate the aperture signal.

1-3. AE/AWB and AF computing circuit

The AE/AWB carries out computation based on a 64-segment screen, and the AF carries out computations based on a 6segment screen.

1-4. SDRAM controller

This circuit outputs address, RAS, CAS and AS data for controlling the SDRAM. It also refreshes the SDRAM.

1-5. Communication control

1. SIO

This is the interface for the 8-bit microprocessor.

2. PIO/PWM/SIO for LCD

8-bit parallel input and output makes it possible to switch between individual input/output and PWM input/output.

1-6. TG/SG

Timing generated for 6 million pixel horizontal addtion CCD control.

1-7. Digital encorder

It generates chroma signal from color difference signal.

2. Outline of Operation

When the shutter opens, the reset signals (ASIC and CPU) and the serial signals (“take a picture” commands) from the 8-bit microprocessor are input and operation starts.

When the TG/SG drives the CCD, picture data passes through the A/D and CDS, and is then input to the ASIC as 10-bit data. The AF, AE, AWB, shutter, and AGC value are computed from this data, and three exposures are made to obtain the optimum picture. The data which has already been stored in the SDRAM is read by the CPU and color generation is carried out. Each pixel is interpolated from the surrounding data as being either R, G, and B primary color data to produce R, G and B data. At this time, correction of the lens distortion which is a characteristic of wide-angle lenses is carried out. After AWB and γ processing are carried out, a matrix is generated and aperture correction is carried out for the Y signal, and the data is then compressed by JPEG and is then written to card memory (SD card). When the data is to be output to an external device, it is taken data from the memory and output via the USB I/F. When played back on the LCD and monitor, data is transferred from memery to the SDRAM, and the image is then elongated so that it is displayed over the SDRAM display area.

3. LCD Block

During EE, the YUV of 640 x 480 conversion is carried out for the 12-bit RGB data which is input from the A/D conversion block of the CCD to the ASIC in order to be displayed on the video, and then transferred to the SDRAM. The data which has accumulated in the SDRAM is converted to digital YUV signal in conformity to ITUR-601 inside the ASIC by SDRAM control circuit inside the ASIC, the data is sent to the LCD driver IC and displayed the image to LCD panel after gamma conversion is carried out. If the shutter button is pressed in this condition, the 12-bit data which is output from the A/D conversion block of the CCD is sent to the SDRAM (DMA transfer), and is displayed on the LCD as a freeze-frame image. During playback, the JPEG image data which has accumulated in the SD card is converted to YUV signals. In the same way as for EE, the data is then sent to the SDRAM, converted to digital YUV signal in conformity to ITUR-601 inside the ASIC, the data is sent to the LCD driver IC and displayed the image to LCD panel. The LCD driver is converted digital YUV signals to RGB signals from ASIC, and these RGB signals and the control signal which is output by the LCD driver are used to drive the LCD panel. The RGB signals are 1H transposed so that no DC component is present in the LCD element, and the two horizontal shift register clocks drive the horizontal shift registers inside the LCD panel so that the 1H/1V transposed RGB signals are applied to the LCD panel. Because the LCD closes more as the difference in potential between the VCOM (common polar voltage: AC drive) and the R, G and B signals becomes greater, the display becomes darker; if the difference in potential is smaller, the element opens and the LCD become brighter. In addition, the brightness and contrast settings for the LCD can be varied by means of the serial data from the ASIC.

– 5 –

4. Lens drive block

4-1. Focus drive

The focus motor is a stepping motor which is microstep-driven by IC951. The 4 MHz clock signal (OSCIN) of the control signals (3-wire serial control (SDATA, SCLK, SENAB), VD) and SUB CPU that are output from the ASIC (IC101) port is input to IC951 so that IC951 can microstep control the focus motor. Detection of the standard focusing motor position is carried out by means of photointerruptor sensor inside the lens.

4-2. Zoom drive

The zoom motor is a stepping motor which is microstep-driven by IC951. The 4 MHz clock signal (OSCIN) of the control signals (3-wire serial control (SDATA, SCLK, SENAB), VD) and SUB CPU that are output from the ASIC (IC101) port is input to IC951 so that IC951 can microstep control the zoom motor. Detection of the standard zoom motor position is carried out by means of photointerruptor sensor inside the lens.

4-3. ND filter

ND filter control is carried out by the control signals (ND ON and ND OFF) that are output from the ASIC (IC101) port and input to IC951 so that IC951 can drive the ND filter. The 4 MHz clock signals (OSCIN) of the 3-wire serial control signals (SDATA, SCLK, SENAB) and SUB CPU allow IC951 to operate.

4-4. Iris drive

The drive method is a galvanometer type without braking coil. The aperture opening amout is controlled as follows: the output from the Hall sensor inside the lens is amplified by the Hall amplifier circuit inside the IC971 lens drive IC, and the difference between the current and target aperture determined by the resulting output and the exposure amout output from the ASIC (IC101) is input to the servo amplifier circuit (IC971) to keep the aperture automatically controlled to the target aperture. The lens aperture control signal is output from IC971 and is input to lens drive IN6B of IC951. IC951 functions as the driver for driving the lens. The 4 MHz clock signals (OSCIN) of the 3-wire serial control signals (SDATA, SCLK, SENAB) and SUB CPU allow IC951 to operate.

5. Video clip recording and playback

5-1. Recording

The signals from the camera block are input to the ASIC where they are processed, and the image data that is stored in the SDRAM built-in IC101 is input to the IC102 MPEG4 CODEC LSI. The CODEC LSI converts this data to encoded MPEG4 data, after which it is returned to the ASIC as streaming data, and the data is then written in sequence onto the SD card. At this time, the audio signals that are input to the built-in microphone are converted into digital data by the audio CODEC IC of IC181, and they are then input via the ASIC to IC102 (MPEG4 CODEC). The audio data is then encoded (AAC) by IC102, and then it is returned to the ASIC as streaming data and is then written in sequence onto the SD card together with the image signals described above.

5-2. Playback

The data is read from the SD card and input to IC102 as streaming data. The encoded data is decoded into image data by IC102 and then returned to the ASIC where it is displayed by the LCD or on a TV monitor. At this time, the audio data is also decoded by IC102, and it passes through the ASIC and is input to IC181 as digital data. D/A conversion is carried out at IC181, and the sound is then output to the speaker or to the LINE OUT terminal.

6. Audio CODEC circuit (IC181)

The audio signals from the microphone are converted into 16bit digital data. AD conversion is carried out at a maximum sampling frequency of 48 kHz. During audio playback, the 16-bit digital data is converted into analog signals and these drive the speaker or line out system. DA conversion is carried out at a maximum sampling frequency of 48 kHz.

4-5. Shutter drive

Reverse voltage is applied to the above aperture coil to operate the shutter. With normal operation, the OC_EN and OC_CONT signals that are output from the ASIC (IC101) are maintained at a low level and when the shutter operates, the OC_EN and OC_CONT signals switch to high, and after that the SHUTTER + signal that is output from the ASIC (IC101) becomes high and the shutter operates. It is input to lens drive IN6B of IC951 with low level. IC951 functions as the driver for driving the lens. The 4 MHz clock signals (OSCIN) of the 3-wire serial control signals (SDATA, SCLK, SENAB) and SUB CPU allow IC951 to operate.

– 6 –

1-3. PWA and VF1 POWER CIRCUIT

DESCRIPTION

1. Outline (PWA)

This is the main power circuit, and is comprised of the following blocks. Switching power controller (IC501) Analog 12 V power output (Q5001, L5001) Analog -6 V power output (Q5006, L5007) Analog 3.4 V power output (IC503) Digital 1.2 V power output (L5006) Digital 3.25 V power output (L5005) 5 V system power output (L5004) Digital 1.8 V power output (Q5004, L5014)

1-1. Switching Controller

This is the basic circuit which is necessary for controlling the power supply for a PWM-type switching regulator, and is provided with six built-in channels, only CH1 (analog 12 V power output), CH2 (analog -6 V power output), CH_M (digital 3.25 V power output), CH_SD (digital 1.2 V power output) and CH_SU (5 V system power output) are used. Feedback from 12 V (A) (CH1), -6 V (A) (CH2), 3.25 V (D) (CH_M), 1.2 V (D) (CH_SD) and 5 V (CH_SU) power supply outputs are received, and the PWM duty is varied so that each one is maintained at the correct voltage setting level.

1. Short-circuit Protection

If output is short-circuited for the length of time setting inside IC501, all output is turned off. The control signal (P ON) are recontrolled to restore output.

1-2. Analog 12 V Power Output

12 V (A) is output. Feedback for the 12 V (A) is provided to the switching controller (Pin (3) of IC501) so that PWM control can be carried out.

1-3. Analog -6 V Power Output

-6 V (A) is output. Feedback for the -6 V (A) is provided to the

switching controller (Pin (31) of IC501) so that PWM control can be carried out.

1-4. Analog 3.4 V Power output

+3.4 V (A) is output. +3.4 V (A) is output which dropped 3.4 V by 5V system power output at regulator IC503.

1-5. Digital 1.2 V Power Output

VDD1.2 is output. Feedback for the VDD1.2 is provided to the switching controller (Pins (9) of IC501) so that PWM control can be carried out.

1-6. Digital 3.25 V Power Output

VDD3 is output. Feedback for the VDD3 is provided to the swiching controller (Pin (13) of IC501) so that PWM control can be carried out.

1-7. 5 V System Power Output

+5 V is output. Feedback for the +5 V is provided to the swiching controller (Pin (17) of IC501) so that PWM control can be carried out.

1-8. Digital 1.8 V Power Output

VDD1.8 is output. Feedback for the VDD1.8 is provided to the swiching controller (Pin (1) of IC501) so that PWM control can be carried out.

1-9. Camera charging circuit

If the camera’s power is turned off, play mode and USB connection mode (card reader and pictbridge) setting while it is connected to the AC adaptor, the battery will be recharged. In the above condition, a CTL signal is sent from the microprocessor and recharging starts.

2. Outline (VF1)

This is the power circuit in the VF1 board, and is comprised of the following blocks. Backlight power output (IC514, Q5102, L5102)

2-1. Backlight Power Output

Regular current is being transmitted to LED for LCD backlight. Feedback for the voltage of R5124 and R5126 are provided to the controller (Pin (1) of IC514) so that PWM control can be carried out.

– 7 –

1-4. ST1 STROBE CIRCUIT DESCRIPTION

1. Charging Circuit

When UNREG power is supplied to the charge circuit and the CHG signal from microprocessor becomes High (3.3 V), the charging circuit starts operating and the main electorolytic capacitor is charged with high-voltage direct current. However, when the CHG signal is Low (0 V), the charging circuit does not operate.

1-1. Charge switch

When the CHG signal switches to Hi, IC541 starts charging operation.

1-2. Power supply filter

C5401 constitutes the power supply filter. They smooth out ripples in the current which accompany the switching of the oscillation transformer.

1-3. Oscillation circuit

This circuit generates an AC voltage (pulse) in order to increase the UNREG power supply voltage when drops in current occur. This circuit generates a drive pulse with a frequency of approximately 150-250 kHz, and drive the oscillation transformer.

2. Light Emission Circuit

When FLCLT signal is input from the ASIC expansion port, the stroboscope emits light.

2-1. Emission control circuit

When the FLCLT signal is input to the emission control circuit, Q5409 switches on and preparation is made to the light emitting. Moreover, when a FLCLT signal becomes Lo, the stroboscope stops emitting light.

2-2. Trigger circuit

The Q5409 is turned ON by the FLCLT signal and light emission preparation is preformed. Simultaneously, high voltage pulses of several kV are emitted from the trigger coil and applied to the light emitter.

2-3. Light emitting element

When the high-voltage pulse form the trigger circuit is applied to the light emitting part, currnet flows to the light emitting element and light is emitted.

Beware of electric shocks.

1-4. Oscillation transformer

The low-voltage alternating current which is generated by the oscillation control circuit is converted to a high-voltage alternating current by the oscillation transformer.

1-5. Rectifier circuit

The high-voltage alternating current which is generated at the secondary side of T5401 is rectified to produce a highvoltage direct current and is accumulated at electrolytic capacitor C5412.

1-6. Charge monitoring circuit

The functions programmed in the IC541 monitor oscillations and estimate the charging voltage. If the voltage exceeds the rated value, charging automatically stops. Then, the CHGDONE signal is changed to Lo output and a "charging stopped" signal is sent to the microcomputer.

– 8 –

1-5. SYA CIRCUIT DESCRIPTION

1. Configuration and Functions

For the overall configuration of the SYA block, refer to the block diagram. The SYA block centers around a 8-bit microprocessor (IC301), and controls camera system condition (mode). The 8-bit microprocessor handles the following functions.

1. Operation key input, 2. Clock control and backup, 3. Power ON/OFF, 4. Storobe charge control.

21 LCD ON1

22 PLLEN

23 USB TRIG

25 CHG

29~34

41~44

Signal

SCLK

ZCARD

BACKUP CTL

BL ON

HOT LINE

TH ON

NOT USED

ZAV_JACK

VDD2

VSS2

VF. LED (R)

VF. LED (G)

CAM_LED

CHG_LED

BAT CHG ON

LENS_4M

MRST

TRST

ZUSB_DET

BAT CHG CTL

P ON

ZBOOT_COMREQ

FLW_SR

AVREF ON

SCAN IN5~0

VSS3

VDD3

FLW_SI

FLW_SCK

FLW_SO

DC_IN

SCAN OUT3~0

BAT CHG ERR

TIME OUT

BAT CHG I

BAT_TEMP

BAT_OFF

ZSREQ

I/O

Outline

Serial data clock

SD card detection (L= card)

Backup battery charge control (L= charge)

LCD backlight control (H= ON)

Hot line from ASIC

Temperature sensor power ON/OFF (L= ON)

AV jack detection (L= AV jack detection)

Backup 3.2 V

GND

VF. LED (red) (H= lighting)

VF. LED (green) (H= lighting)

Cradle camera detection display LED drive (L= lighting)

Cradle charging display LED drive (L= lighting)

Start charging (H= start)

Lens driver 4M clock output

System reset output (L= reset)

T reset output (L= reset)

USB detection input (L= USB detection)

Charge current control

LCD start-up signal output (H= start up)

PLL ON/OFF control (H=ON)

Cradle USB trigger detection (H= trigger detection)

D/D converter ON/OFF control (H= ON)

Strobo condensor charge control signal (H= charge)

Boot/command request input from ASIC

FLW_SR Flash writer

SW 3.2 V ON/OFF control (L= ON)

Keyscan input 5~0

GND

Backup 3.2 V

FLW_SI Flash writer

FLW_SCK Flash writer

FLW_SO Flash writer

DC power connection detection input (L= DC power detection)

Keyscan output 3~0

IC524 Fault output detection (L= fault detection)

IC524 CHRG output detection (L= TIME OUT detection)

IC524 Charge current monitoring (AD conversion input)

Lithum ion battery temperature detection (AD conversion input)

Battery OFF detection signal input (L= OFF detection) Transmission clock for communication (SYA ↔ ASIC)

See next page →

– 9 –

51 SCAN IN6

IR_IN

RESET

XCIN

XCOUT

VSS1

XIN

XOUT

VDD1

BATTERY I

CHG_DONE I Strobo condensor charging completion signal input (H= charging completion)

INT_TEMP

ASIC SI

ASIC SO

I Cradle infrared remote control transmission data (asynchronous) input

O Serial data output to ASIC

I Serial data input to ASIC

Table 5-1. 8-bit Microprocessor Port Specification

Keyscan input 6

Reset input

Clock (32.768 KHz)

Clock

GND

Main clock (4MHz)

Main clock

Backup 3.2 V

UNREG SY voltage measurement input

Substrate temperature measurement input around ASIC (AD convertion input)

2. Internal Communication Bus

The SYA block carries out overall control of camera operation by detecting the input from the keyboard and the condition of the camera circuits. The 8-bit microprocessor reads the signals from each sensor element as input data and outputs this data to the camera circuits (ASIC) or to the LCD display device as operation mode setting data. Fig. 5-1 shows the internal communication between the 8-bit microprocessor, ASIC and SPARC lite circuits.

ASIC RESET

S. REQ

8-bit

Microprocessor

Fig. 5-1 Internal Bus Communication System

ASIC SO

ASIC SI

ASIC SCK

MRST

3. Key Operaiton

For details of the key operation, refer to the instruction manual.

SCAN OUT

SCAN IN

← LEFT

TELE

→ RIGHT

WIDE

TEST

↑ UP

REC

PLAY

↓ DOWN

1st SHUTTER

SET

2nd SHUTTER

ASIC

CAMERA

LCD LOTATION

PLAY

POWER ON

PANEL OPEN

Table 5-2. Key Operation

– 10 –

4. Power Supply Control

The 8-bit microprocessor controls the power supply for the overall system. The following is a description of how the power supply is turned on and off. When the battery is attached, a regulated 3.2 V voltage is normally input to the 8-bit microprocessor (IC301) by IC303, so that clock counting and key scanning is carried out even when the power switch is turned off, so that the camera can start up again. When the battery is removed, the 8-bit microprocessor operates in sleep mode using the backup lithum battery. At this time, the 8-bit microprocessor only carries out clock counting, and waits in standby for the battery to be attached again. When a switch is operated, the 8-bit microprocessor supplies power to the system as required. The 8-bit microprocessor first sets the P ON signal at pin (24) to high, and then turns on the DC/DC converter. After this, low signal is output from pin (17) so that the ASIC is set to the reset condition. After this these pins set to high, and set to active condition. If the LCD monitor is on, the LCD ON 1 signal at pin (21) set to high, and the DC/DC converter for the LCD monitor is turned on. Once it is completed, the ASIC returns to the reset condition, all DC/DC converters are turned off and the power supply to the whole system is halted.

ASIC,

memory

Power voltage

Power OFF

Power switch ON-

Auto power OFF

CAMERA

LCD finder

Play back

Table 5-3. Camera Mode

Note) 4 MHz = Main clock operation, 32 kHz = Sub clock operation

3.3 V 1.2 V

OFF

CCD

5 V (A)

+12 V etc.

OFF

8 bit

CPU

3.2 V

(ALWAYS)

32KHz OFF

4 MHz ON

MONITOR

5 V (L) etc.

LCD

– 11 –

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