Sanyo LCE-32R83DT-B Schematic

FILE NO.

SERVICE MANUAL

LED-LCD TV

LCE-32R83DT(B)

PRODUCT CODE No.

PRODUCT CODE No.
1 682 352 37: PAL/SECAM

-B/G, D/K, I

NTSC(AV)

INPUT

3

2

1

6

5

4

8

9

7

FREEZE

0

SLEEP

DISPLAY

ENTER

EXIT

MENU

MUTE

VOL CH

FAVORITE

TTX

FUNCTION

ZOOM

MIX

AUTO/STEREO

INDEX

PICTURE

SUBTITLE

SOUND

TEXT/USB

REFERENCE No.:SM0915243

CONTENTS

Safety precautions………………………………………………………………………..…

Alignment instructions …………………………….…….…………………………………

Software upgrade instructions ..................................................................................

Working principle analysis……………………………….………….…………...............

Block diagram…………………………………..………………………………….…………

IC block diagram………………………………………………………………………..……

Wiring diagram …………………………………………………………………………….

Troubleshooting flow chart ………………………………………………………………..……

Schematic diagram…………………………………………………………………………

APPENDIX-A: Assembly list

APPENDIX-B: Exploded View

Assembling the Stand

WALL MOUNTING INSTRUCTIONS

3

5

11

16

17

18

32

33

36

Attention: This service manual is only for service personnel to take reference with. Before

servicing please read the following points carefully.

Safety precautions

1. Instructions

Be sure to switch off the power supply before replacing or welding any components or
inserting/plugging in connection wire. Anti static measures must be taken (throughout the entire
production process!):
a) Do not touch here and there by hand at will;
b) Be sure to use anti static electric iron;
c) It’s necessary for the welder to wear anti static gloves.
Please refer to the part list before replacing components that have special safety requirements.
Do not replace with different components with different specs and type at will.

2. LCD servicing precautions

2.1 Screens are different from one model to another and therefore not interchangeable. Be sure to
use the screen of the original model for replacement.

2.2 Be sure to take proper measures in protecting yourself and the machine when testing

the system in the course of normal operation or right after the power is switched off. Please do not
touch the circuit or the metal part of the module that is in operation mode. Relevant operation is

possible only one minute after the power is switched off.

2.3 Do not use any adapter that is not identical with the TV set. Otherwise it will cause fire or
damage to the set.

2.4 Never operate the set or do any installation work in bad environment such as wet bathroom,
laundry, kitchen, or nearby fire source, heating equipment and devices or exposure to sunlight etc.
Otherwise bad effect will result.

2.5 If any foreign substance such as water, liquid, metal slices or other matters happens to fall into
the module, be sure to cut the power off immediately and do not move anything on the module lest
it should cause fire or electric shock due to contact with the high voltage or short circuit.

2.6 Should there be smoke, abnormal smell or sound from the module, please shut the power off
at once. Likewise, if the screen is not working after the power is on or in the course of operation,
the power must be cut off immediately and no more operation is allowed under the same
condition.

2.7 Do not pull out or plug in the connection wire when the module is in operation or just after the
power is off because in this case relatively high voltage still remains in the capacitor of the driving
circuit. Please wait at least one minute before the pulling out or plugging in the connection wire.

2.8 When operating or installing LCD please don’t subject the LCD components to bending,
twisting or extrusion, collision lest mishap should result.

2.9 As most of the circuitry in LCD TV set is composed of CMOS integrated circuits, it’s necessary
to pay attention to anti statics. Before servicing LCD TV make sure to take anti static measure and
ensure full grounding for all the parts that have to be grounded.

2.10 There are lots of connection wires between parts behind the LCD screen. When servicing or
moving the set please take care not to touch or scratch them. Once they are damaged the screen

would be unable to work and no way to get it repaired.
If the connection wires, connections or components fixed by the thermotropic glue need to
disengage when service, please soak the thermotropic glue into the alcohol and then pull them
out in case of dagmage.

2.11 Special care must be taken in transporting or handling it. Exquisite shock vibration may lead
to breakage of screen glass or damage to driving circuit. Therefore it must be packed in a strong
case before the transportation or handling.

2.12 For the storage make sure to put it in a place where the environment can be controlled so as
to prevent the temperature and humidity from exceeding the limits as specified in the manual. For
prolonged storage, it is necessary to house it in an anti-moisture bag and put them altogether in
one place. The ambient conditions are tabulated as follows:

Temperature Operation range +5 ~ +35 oC

Storage range -20 ~ +60 oC

Humidity Operation range 20% ~ 80%

Storage range 10% ~ 90%

2.13 Display of a fixed picture for a long time may cause a permanent after-image on the screen,
as commonly called “ghost shadow”. The degree of the after-image varies with the maker of LCD
screen. This phenomenon doesn’t represent failure. This “ghost shadow” may remain in the
picture for a period of time (several minutes). But when operating it please avoid displaying still
picture in high brightness for a long time.

3. Installation precautions

3.1 The front panel of LCD screen is made of glass. When installing it please make sure to put it in
place.

3.2 For service or installation it’s necessary to use specified screw lest it should damage the
screen.

3.3 Be sure to take anti dust measures. Any foreign substance that happens to fall down between
the screen and the glass will affect the receiving and viewing effect

3.4 When dismantling or mounting the protective partition plate that is used for anti vibration and
insulation please take care to keep it in intactness so as to avoid hidden trouble.

3.5 Be sure to protect the cabinet from damage or scratch during service, dismantling or
mounting.

Adjustment Instructions

1 Safety Instructions

1.1 Power supply must be cut off when replacing or welding any component or inserting / pulling out
connective lines;

1.2 Anti-electrostatic measures must be carried out during the whole producing processes!

a) Do not touch IC by hands at will;
b) Use anti-electrostatic iron;
c) Welder must wear anti-electrostatic glove;

1.3 Replacing any component with special safety requirement must refer to component list without
changing its specification and model at will.

1.4 Power supply voltage must be ~(100-240) V±10% 50 Hz.

2 Adjustment Equipments

VG-848 (YPbPr, VGA signal generator)
VG-849 (HDMI signal generator)
CA-210

3 Adjustment Processes

3.1 Power voltage test

According to the wiring diagram ‘9232ME7001JL’, connect power board assembly, data
processing assembly, IR/Key board assembly correctly, supply with power, press button standby
to turn on the TV set.

3.11 Model LC-32MEXX

Test voltage of X301 each pin on power board in turn shown as Table 1:

Table 1 Voltage of X301 each pin

X301

Min. (V) 0 11.3 0 4.85 4.85 4.85 3.25 4.85

Typical(V) 0 12.0 0 5.00 5.00 5.00 3.30 5.00

Max. (V) 0 12.6 0 5.35 5.35 5.35 3.35 5.07

Pin 1

2、3 4、5

6 7 8 9 10

3.12 Model LE-32/42MEXX and LC-39/46/50MEXX

Test voltage of X301 each pin on power board in turn shown as Table 2:

Table 2 Voltage of X301 each pin

X301

Min. (V) 11.3 0 11.3 0 4.85 4.85 4.85 3.25 4.85

Typical(V) 12.0 0 12.0 0 5.00 5.00 5.00 3.30 5.00

Max. (V) 12.6 0 12.6 0 5.35 5.35 5.35 3.35 5.07

Pin 1、2 3、4 5、6 7、8

9 10 11 12 13

3.13 Model LE-46/55MEXX

Test voltage of X301 each pin on power board in turn shown as Table 3:

Table 3 Voltage of X301 each pin

X301

Min. (V) 24.3 0 11.3 0 4.85 4.85 4.85 3.25 4.85

Pin 1、2 3、4 5、6 7、8

9 10 11 12 13

Typical(V) 24.0 0 12.0 0 5.00 5.00 5.00 3.30 5.00

Max. (V) 23.6 0 12.6 0 5.35 5.35 5.35 3.35 5.07

3.14 Model LC-29ME70/LE-32ME77 for domestic market, all-in-one model LE-29/32/39ME83,

model LC-24ME70/LC-24ME77

Test voltage of X301 each pin on power board in turn shown as Table 3(a):

Table 3(a) Voltage of X301 each pin

X301

Min. (V) 11.3 0 3.25 4.85 4.85

Typical(V) 12.0 0 3.30 5.00 5.00

Max. (V) 12.6 0 3.35 5.35 5.35

Pin 1、2 3、4

5 6 7

3.2 Adjustment flow as Fig. 1:

Check if DDC、FLASH has been written?

Produce data processing board on line.

General assembly and combined adjustment

White balance adjustment

Input central signal, check TV function (omitted channel, analog

parameters control, etc. ), check earphone, speakers output.

Input AV signal, check relevant functions.

Input HDMI signal (mode), check YPbPr functions.

Input VGA signal, check display and all functions

(such as analog parameter), H/V center, etc..

Input HDMI signal, check display and all functions

(such as analog parameter), H/V center, etc..

Input USB signal, check relevant functions.

Default settings before shipment

Check accessory and packing

Fig. 1 Adjustment flow chart

4 Adjustment Instructions

4.1 The unit adjustments

4.1.1 According to the wiring diagram “9232ME7001JL”, connect power/backlight board assembly,

data processing assembly, IR/Key board assembly correctly, supply with power, turn on the TV set.
Check display.

4.1.2 Factory menu instruction

a) Press key “INPUT”, press digital keys “2、5、8、0” in turn to enter into primary factory menu;
b) Press keys “” and “” to move cursor to each page of primary factory menu, then press

key “ENTER” to enter into submenu page;
c) Press keys “” and “” to move cursor upward or downward within any one page;
d) Press keys “” and “” to do adjustment when move cursor to one item;
e) Press key “MENU” to exit submenu page of factory menu sequentially; The cursor must

focus on the first item when pressing key “MENU” to exit some of the submenu page.

f) Factory menu item: Aging Mode to be used for aging the TV set when the option is “On”;

press any key on key board to exit aging mode during the aging process;

g) Factory menu item: Othersetting → Power on mode:

‘On’: to turn on the TV set with one step;
‘Off’: to turn on the TV set with two steps;
‘Last’: to keep the last power-off state when power on the TV set again;

4.2 White balance adjustment

4.2.1 Before adjustment
The TV set should be working above 30 minutes to be in a stabler state before adjustment. Use

CA-210 BBY channel to adjust white balance;

a) VGA channel adjustment

Input square signal (VG848 Timing: 854 (VESA 800

×600/60 Hz), enter into user menu

SETTING→Computer Settings→ AUTO ADJUST to make picture display fully; then input signal
(VG848 PAT: 914), enter into factory menu page ADC ADJUST to perform AUTO ADC until the

prompt “SUCCESS” displays.

b) YPbPr channel adjustment

Input signal (VG848 Timing: 968 (480i/60 Hz)，PAT: 918 (100% color bar + gray scale)) ,
enter into factory menu page ADC ADJUST to perform AUTO ADC until the prompt “SUCCESS”
displays.

c) Only Normal color temperature need adjusting for the model. Chromatic coordinates of bright
scale must be set as (△X=±5, △Y=±5), chromatic coordinates of dark scale must be set as (△X=±10,
△Y=±10). Chromatic coordinates of each model are listed as Table 4:

Table 4 Chromatic coordinates of each model

WARM NORMAL COOL

6500K（313、329） 9300K（285、293） 12000K（272、278）

d）BBY：Insignia-Dynex TV Spec Part of chromatic coordinates are listed as Fig. 2:

Fig.2 Chromatic coordinates of white balance

4.2.2 Four groups of white balance adjustments

4.2.2.1 DVI channel adjustment (HDMI,USB channel with the same adjustment method of this one)
Input signal (VG848 Timing: 854，PAT: 921 (16-gray-step)), enter into factory menu page Color

Temp, fix item G-GAIN, adjust items R-GAIN、B-GAIN to set chromatic coordinates of the reversed

th

scale as the date of NORMAL; fix item G-OFFSET, adjust items R-OFFSET、B-OFFSET to set

4
chromatic coordinates of the 4

th

scale as the date of NORMAL; adjust items R-GAIN、B-GAIN and

R-OFFSET、B-OFFSET repeatedly as above until chromatic coordinates of both gray scales are the

date of NORMAL;

Check if chromatic coordinates of WARM is (313、329), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

Check if chromatic coordinates of COOL is (272、278), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

4.2.2.2 VGA channel adjustment
Input signal (VG848 Timing: 854，PAT: 921 (16-gray-step)), enter into factory menu page Color

Temp, fix item G-GAIN, adjust items R-GAIN、B-GAIN to set chromatic coordinates of the reversed

th

scale as the date of NORMAL; fix item G-OFFSET, adjust items R-OFFSET、B-OFFSET to set

4
chromatic coordinates of the 4

th

scale as the date of NORMAL; adjust items R-GAIN、B-GAIN and

R-OFFSET、B-OFFSET repeatedly as above until chromatic coordinates of both gray scales are the

date of NORMAL;

Check if chromatic coordinates of WARM is (313、329), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

Check if chromatic coordinates of COOL is (272、278), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

4.2.2.3 YPbPr channel adjustment
Input signal (VG848 Timing: 968，PAT: 921 (16-gray-step)), enter into factory menu page Color

Temp, fix item G-GAIN, adjust items R-GAIN、B-GAIN to set chromatic coordinates of the reversed

th

scale as the date of NORMAL; fix item G-OFFSET, adjust items R-OFFSET、B-OFFSET to set

4
chromatic coordinates of the 4

th

scale as the date of NORMAL; adjust items R-GAIN、B-GAIN and

R-OFFSET、B-OFFSET repeatedly as above until chromatic coordinates of both gray scales are the

date of NORMAL;

Check if chromatic coordinates of WARM is (313、329), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

Check if chromatic coordinates of COOL is (272、278), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

4.2.2.4 AV channel adjustment（TV channel with the same adjustment method of this one）
Input signal (VG848 Timing: 969，PAT: 921 (16-gray-step)), enter into factory menu page Color

Temp, fix item G-GAIN, adjust items R-GAIN、B-GAIN to set chromatic coordinates of the reversed
4th scale as the date of NORMAL; fix item G-OFFSET, adjust items R-OFFSET、B-OFFSET to set

th

chromatic coordinates of the 4

th

scale is about 10nit; adjust items R-GAIN、B-GAIN and R-OFFSET、B-OFFSET repeatedly as

4

scale as the date of NORMAL and make sure the brightness of the

above until chromatic coordinates of both gray scales are the date of NORMAL;

Check if chromatic coordinates of WARM is (313、329), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

Check if chromatic coordinates of COOL is (272、278), if not, adjust items R GAIN / B GAIN /

R OFF/ B OFF to be up to the requirements and then save the date.

5 Function check

5.1 TV functions
Input central signal to RF port, enter into menu Channel first, then search for programs

automatically and check if any program is omitted; check the speakers output and the display.

5.2 AV port
Input AV signal, check the sound and the picture.

5.3 YPbPr/YCbCr port
Input YUV signal from VG848 with formats listed as Table 5 respectively, check the sound and

the display.

Table 5 YUV received signal formats

No. Definition

1 720×480i/59.94 Hz 15.73 59.94 13.50 CEA-770.2-C
2 720×480i/60 Hz 15.75 60 13.51 CEA-770.2-C
3 720×576i/50 Hz 15.62 50 13.50 ITU-R BT.656–4
4 720×480p/59.94 Hz 31.47 59.94 27.00 CEA-770.2-C
5 720×480p/60 Hz 31.50 60 27.03 CEA-770.2-C
6 720×576p/50 Hz 31.25 50 27.00 ITU-R BT.1358
7 1280×720p/50 Hz 37.50 50 74.25 SMPTE 296M
8 1280×720p/59.94 Hz 44.95 59.94 74.18 CEA-770.3-D

9 1280×720p/60 Hz 45.00 60.00 74.25 CEA-770.3-D
10 1920×1080i/50 Hz 28.12 50 74.25 SMPTE 274M
11 1920×1080i/59.94 Hz 33.72 59.94 74.18 CEA-770.3-C
12 1920×1080i/60 Hz 33.75 60.00 74.25 CEA-770.3-C
13 1920×1080p/50 Hz 56.25 50 148.50
14 1920×1080p/59.94 Hz 67.43 59.94 148.35
15 1920×1080p/60 Hz 67.50 60.00 148.50

H.- Freq.

(kHz)

V.- Freq.

(Hz)

Dot pulse Freq.

(MHz)

Note

5.4 VGA port
Input VGA signal from VG848 with formats listed as Table 6 respectively, check the sound and

the display. If H./V. of picture displays abnormally, enter into user menu Setup→VGA Setting→
AUTO to perform calibration automatically to display the picture fully.

Table 6 VGA received signal formats

No. Definition

1 720×400@70 Hz 31.47 70.08 28.32 VGA-T
2 640×480@60 Hz 31.50 60.00 25.18 VGA
3 640×480@72 Hz 37.90 72.00 31.50 VESA
4 640×480@75 Hz 37.50 75.00 31.50 VESA
5 800×600@56 Hz 35.16 56.25 36.00 VESA
6 800×600@60 Hz 37.90 60.00 40.00 VESA Guidelines
7 800×600@75 Hz 48.08 75.00 50.00 VESA
8 1024×768@60 Hz 48.40 60.00 65.00 VESA Guidelines

9 1024×768@70 Hz 56.50 70.00 75.00 VESA
10 1024×768@75 Hz 60.00 75.00 78.75 VESA
11 1280×768@75 Hz 60.30 75.00 102.25 VESA
12 1360×768@60 Hz 47.70 60.00 85.5 VESA
13 1280×1024@60 Hz 64.00 60.00 108.0 VESA (FHD panel)
14 1280×1024@75 Hz 80.00 75.00 135.0 VESA (FHD panel)

15 1920×1080@60 Hz 67.50 60.00 148.5 CEA-861(FHD panel)

H.- Freq.

(kHz)

V.- Freq.

(Hz)

Dot pulse Freq.

(MHz)

Note

5.5 HDMI port
Input HDMI/DVI signal from VG849 with formats listed as Table 5&6 respectively, check the

sound and the display.

5.6 USB port
Input USB signal, check the sound and the display.

6 Presetting before shipment

Enter into factory menu, select items Other Setting→SHIPMENT to perform presetting before
shipment automatically . The unit only responds the command ‘shut down’ after presetting. The step of
presetting before shipment must be done after factory adjustments completed. Main steps of
SHIPMENT are listed as below:

6.1 BBY Models for domestic market

1）Display guided menu of initial setup when turning on the TV set;

2）Reset default date of picture mode (TV channel picture mode: STANDARD, TV channel color
temperature: NORMAL; VGA channel picture mode: STANDARD, VGA channel color temperature:
WARM; other channels picture mode: COLORFUL, other channels color temperature: COOL); reset
sound mode as SANDARD and the volume as 20;

3）Clear up the date of channel and favorite list;

4）Menu language: simplified Chinese

6.2 SANYO Models for Middle East market

（1）Reset default date of picture mode (TV channel picture mode: ST ANDARD, TV channel color
temperature: NORMAL; VGA channel picture mode: STANDARD, VGA channel color temperature:
WARN; other channels picture mode: COLORFUL, other channels color temperature: COOL); reset
sound mode as SANDARD and the volume as 20;

（2）Clear up the date of channel and favorite list;

（3）Menu language: English

6.3 Models for domestic market or South Africa market

(1) Reset default date of picture mode (Picture mode of all channels: STANDARD, color
temperature of all channels: NORMAL, VGA channel color temperature: WARN ); reset sound mode
as SANDARD and the volume as 20;

（2）Clear up the date of channel and favorite list;
（3）Menu language: simplified Chinese for domestic market

English for South Africa market

7 Software Upgrading Instructions as Table 7

Table 7 Software Upgrading Instruction

Location Part No. Part model Software functions

N102 5272532007 EN25Q32B-104HIP Main Software Yes Upgrade with ALL100, etc.
N102 52725320 07 EN25Q32B-104HIP HDCP KEY Yes Upgrade with ALL100, etc.

Upgrading

before SMT

Upgrading method

8 Software (FALSH) upgrading methods

8.1 Execute ALL-100 upgrading file GSEEP.EXE;

8.2 Click menu Device, select FLASH model EN25Q32B shown as Fig. 3;
Note: real FLASH model depends on the real material, models shown by Fig. 3 are just for illustration.

Fig. 3 Device model selection interface

8.3 Click toolbar AUTO, enter into interface AUTO, make sure to tick off option Config when

upgrading Flash. Please refer to Fig. 4.

Fig. 4 AUTO upgrading interface

8.4 Click option Config Setting in AUTO interface, set option Protect as All Protect, and set
option SRWD as Enable, then click ‘OK’ to complete write-protect setup. Make sure the above both
options are reset when executing ALL-100 upgrading software again after exiting it. If there is no
option SRWD, please upgrade ALL-100 upgrading software. Please refer to Fig. 5.

Fig. 5 Config Setting interface

9 HDCP KEY upgrading methods

9.1 Connect to upgrading device;

9.2 Execute file ISP_ToolV1.04.exe which interface is shown as Fig. 6;

Location address:

0x3B0000

Fig. 6 ISP tool

9.3 Click button “Open” to load encrypted KEY file;

9.4 Click button “Run” to begin KEY upgrading. upgrading information will display in the information
frame after upgrading completed.

10 Software upgrading methods

10.1 Software upgrading methods from USB port (it is advise to use the method preferentially)

a) Copy file offered by RD department to the root directory of U disk. Note that the file name must
be MERGE.bin and be kept in the root directory of U disk.

b) Insert U disk to USB port, switch to non-USB channel (such as TV, AV channel, etc.), enter
into factory menu, choose “software upgrading USB”, then click “OK” to begin upgrading;

c) Click “Confirm upgrading” with left button when upgrading confirmation menu displays. Note
that U disk must not be pulled out or the unit must not be cut off during the upgrading process.

10.2 ISP（connected by VGA）upgrading method

a) Connect the unit and PC with upgrading connected board and VGA cable.

Information frame

b) Open upgrading tool ISP_Tool(V4.5.0.5), select label Device to make configuration within red
frame shown as Fig. 7;

Fig. 7 Device configuration dialog

c) Select label Config to make configuration shown as Fig. 8;

Fig. 8 Config configuration dialog

Note: I2C speed is set as about 60% commonly and should not be set too fast. If it is not easy to
connect successfully, please set I2C speed slower.

d) Select label Read, open bin file whose file path can display completely in the label Auto,

e) Select label Auto, select items Read File, Erase Device (sub-item File Area of Erase Device
had better be selected), Program and Exit ISP, then click button “Connect”, a dialog shown as Fig. 9
will display if connection is successful, in which device type identified by the system automatically will
display and option “Flash_0” in the static frame “SpiFlash_X” will be ticked off. If device type or
“Flash_0” is not identified correctly, the connection is failed, then ISP tool will repeat identification
automatically until device type and “Flash_0” are identified correctly, if not, please check hardware
connection.

Fig. 9 Successful connect interface

f) Click button “Run” to begin software upgrading after successful connection . Please refer to
Fig. 10;

Fig. 10 Software upgrading interface

g) Successful software upgrading interface is shown as Fig. 11;

Fig. 11 Successful software upgrading interface

10.3 Software upgrading method from USB port (it is advised to use the method if the picture could
not display because of wrong panel parameters)

a) Copy file offered by RD department to the root directory of U disk. Note that the file name must
be MERGE.bin and kept in the root directory of U disk.

b) Insert U disk to USB port, keep pressing any key on the key board of the unit except key
“Standby” or “Input”, connect to power supply, switch on power switch of the unit, then IR indicato r
light begins twinkling to show the unit is in the process of upgrading, unloose the key you press, the
unit will reset automatically after upgrading process completed.

Note that U disk must not be pulled out or the unit must not be cut off during the upgrading
process.

Working principle analysis of the unit

RF signal from antenna is sent into Tuner chip N401 to be processed by
HF-amplifier and mixer to get digital IF signal DIF, then DIF signal is sent to
main chip N101（MST6E182VG）.

HDMI signal is sent to HDMI switch chip N201 to be switched by
three-way-signal-selection switch and then sent to main chip N101
（MST6E182VG）.

Video and audio signals from AV, YPbPr , VGA, USB are sent to main chip
N101（MST6E182VG）directly.

Main chip N101（MST6E182VG）is a special large scale IC with full functions,
such as HDMI interface processing, video decoding, video switch selection,
A/D and D/A transformation, interleaved/successive scan processing, mode
transformation, OSD and low-voltage difference output processing, etc.;
furthermore, it also has functions of audio selection and audio processing,
MCU, etc.; external video signal is processed by main chip N101
（MST6E182VGC）, then 4 pairs of difference signals and one pair of clock
signals are outputted to LCD to display; external audio signal processed by
main chip N101（MST6E182VG） is sent to sound amplifier N402 to be
amplified and then sent to speakers.

USB

182VG

HDMI 2

Block Diagram

TUNER

SPI FLASH

Panel

LVDS

AV

YPbPr

VGA

HDMI 1

MST6E

SPEAKER

AMP

HP

IC Block Diagram

1、 MST6M181VG/MST6M182VG

PIN DIAGRAM (MST6M181VG/MST6M182VG)

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

A RXCKP RXCKN NC NC HWRESET GPIO7 GPIO6 GND USB1_DMUSB0_DPUSB0_DM A

B RX1N RX0P RX0N NC NC NC NC IRIN GPIO8 SAR0 PWM0 USB1_DP DDCR_CK SCZ SDO B

C RX2N RX2P RX1P NC NC NC NC GPIO9 SAR2 SAR1 PWM1 GND DDCR_DA SCK SDI C

D DDCD_CK ARC

E SOGIN0 BIN0P HSYNC0

F RIN0P GIN0M GIN0P VSYNC0 GND

G GND GND GND

H SOGIN1 BIN1P

J RIN1P GIN1M GIN1P AVDD_33

K CVBS2 CVBS1 NC

L CVBS0 VCOM AUVAG AUVRP

DDCD_DAHOTPLUG

A

AVDD_AL

IVE

AVDD_D

MPLL

NC CEC BYPASS

AVDD_25

AVDD_ME

AVDD_AU

MPLL

AVDD_MODAVDD_RE

AVDD_M

OD

25

F

VDDP VDDC VDDC FLK2 GCLK6 RLV2P L

AVDD_126DVDD_D

VDDC VDDC GND GND GND

VDDC VDDC GND GND GND MVREF

AVDD_D

DR

DR

AVDD_D

DDCA_CKDDCA_DAGPIO10 GND LEDON HCON DPM D

DR

AVDD_DDRSCAN_BL

GND SAR3 OPT_N GCLK4 G

GND GND GND

K

SCAN_BL

K1

GSP/

VST

GSP_R/

GCLK1

VGH_OD

D

GOE/

POL

GCLK2

WPWM OPT_P F

SOE FLK3 H

GSC/

GCLK3

GCLK5

FLK J

VGH_EVE

N

E

K

M CVBSOUT AUL0 AUL3 GND

N AUR0 AUL1 AUR3 AUOUTL1

P AUR1 AUL2 AUOUTR1 GND PGA_COM GND GND

R AUR2 AUOUTL0 XOUT GND GND VIFM GND

T AUOUTR0 XIN TAGC GND VIFP GND

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16

AVDD_AU

33

AVDD_PG

A

VDDP

GND NC NC RLV1M RLV1P RLV0M RLV0P RLV3M RLV3P N

I2S_OUT

_SD

I2S_OUT

_MCK

I2S_OUT

_WS

AVDD_DDRAVDD_D

SPDIFI LLV5M LLV4M LLV3P LLV2M LLV1M RLV4M RLV4P P

I2S_OUT

SPDIFO LLV3M LLVCKM LLV0M LLV0P T

LLV5P LLV4P LLVCKP LLV2P LLV1P RLV5M RLV5P R

_BCK

DR

RLVCKM RLVCKP RLV2M M

MST6M181VG/MST6M182VG

PIN DESCRIPTION

Analog Interface

Pin Name Pin Type Function Pin

HSYNC0 Schmitt Trigger Input

VSYNC0 Schmitt Trigger Input

BIN0P Analog Input Analog Blue Input from Channel 0 E3

SOGIN0 Analog Input Sync On Green Input from Channel 0 E2

GIN0P Analog Input Analog Green Input from Channel 0 F3

GIN0M Analog Input Reference Ground for Analog Green Input from Channel 0 F2

RIN0P Analog Input Analog Red Input from Channel 0 F1

BIN1P Analog Input Analog Blue Input from Channel 1 H3

SOGIN1 Analog Input Sync On Green Input from Channel 1 H2

GIN1P Analog Input Analog Green Input from Channel 1 J3

GIN1M Analog Input Reference Ground for Analog Green Input from Channel 1 J2

RIN1P Analog Input Analog Red Input from Channel 1 J1

HSYNC / Composite Sync for VGA Input from channel 0 E4

w/ 5V-tolerant

VSYNC for VGA Input from channel 0 F4

w/ 5V-tolerant

Analog Video Input/Output Interface

Pin Name Pin Type Function Pin

CVBS2 Analog Input CVBS (Composite) Video Input Channel 2 K1

CVBS1 Analog Input CVBS (Composite) Video Input Channel 1 K2

CVBS0 Analog Input CVBS (Composite) Video Input Channel 0 L1

VCOM Analog Input CVBS Input Reference Ground L2

CVBSOUT Analog Output CVBS (Composite) Video Output Channel M1

Analog Audio Input/Output Interface

Pin Name Pin Type Function Pin

I2S_OUT_WS I/O w/ 5V-tolerant Word Select Output; 4mA driving strength /

Universal Asynchronous Receiver 2 (UART2_RX)

I2S_OUT_SD I/O w/ 5V-tolerant Audio Serial Data Output; 4mA driving strength /

Universal Asynchronous Transmitter 2 (UART2_TX)

SPDIFI Input w/ 5V-tolerant S/PDIF Audio Input /

Pulse Width Modulation Output; 4mA driving strength
(PWM3)

T8

P8

P9

SPDIFO Output S/PDIF Audio Output; 4mA driving strength T9

MST6M181VG/MST6M182VG

PIN DESCRIPTION

Analog Interface

Pin Name Pin Type Function Pin

I2S_OUT_MCK Output w/ 5V-tolerant Audio Master Clock Output R8

I2S_OUT_BCK Output w/ 5V-tolerant Audio Bit Clock Output R9

AUL0 Analog Input Audio Line Input Left Channel 0 M2

AUR0 Analog Input Audio Line Input Right Channel 0 N1

AUL1 Analog Input Audio Line Input Left Channel 1 N2

AUR1 Analog Input Audio Line Input Right Channel 1 P1

AUL2 Analog Input Audio Line Input Left Channel 2 P2

AUR2 Analog Input Audio Line Input Right Channel 2 R1

AUL3 Analog Input Audio Line Input Left Channel 3 M3

AUR3 Analog Input Audio Line Input Right Channel 3 N3

AUVRP Analog Output Positive Reference Voltage for Audio ADC L4

AUVAG Analog Output Reference Voltage for Audio Common Mode L3

AUOUTL1 Analog Output Main Audio Output Left Channel 1 N4

AUOUTR1 Analog Output Main Audio Output Right Channel 1 P3

AUOUTL0 Analog Output Main Audio Output Left Channel 0 R2

AUOUTR0 Analog Output Main Audio Output Right Channel 0 T2

Mini-LVDS Interface

Pin Name Pin Type Function Pin

LLV5M Output Mini-LVDS L-Link Channel 5 Negative Data Output P10

LLV5P Output Mini-LVDS L-Link Channel 5 Positive Data Output R10

LLV4M Output Mini-LVDS L-Link Channel 4 Negative Data Output P11

LLV4P Output Mini-LVDS L-Link Channel 4 Positive Data Output R11

LLV3M Output Mini-LVDS L-Link Channel 3 Negative Data Output T11

LLV3P Output Mini-LVDS L-Link Channel 3 Positive Data Output P12

LLV2M Output Mini-LVDS L-Link Channel 2 Negative Data Output P13

LLV2P Output Mini-LVDS L-Link Channel 2 Positive Data Output R13

LLV1M Output Mini-LVDS L-Link Channel 1 Negative Data Output P14

LLV1P Output Mini-LVDS L-Link Channel 1 Positive Data Output R14

LLV0M Output Mini-LVDS L-Link Channel 0 Negative Data Output T14

LLV0P Output Mini-LVDS L-Link Channel 0 Positive Data Output T15

LLVCKM Output Mini-LVDS L-Link Negative Clock Output T12

LLVCKP Output Mini-LVDS L-Link Positive Clock Output R12

RLV5M Output Mini-LVDS R-Link Channel 5 Negative Data Output R15

RLV5P Output Mini-LVDS R-Link Channel 5 Positive Data Output R16

MST6M181VG/MST6M182VG

PIN DESCRIPTION

Analog Interface

Pin Name Pin Type Function Pin

RLV4M Output Mini-LVDS R-Link Channel 4 Negative Data Output P15

RLV4P Output Mini-LVDS R-Link Channel 4 Positive Data Output P16

RLV3M Output Mini-LVDS R-Link Channel 3 Negative Data Output N14

RLV3P Output Mini-LVDS R-Link Channel 3 Positive Data Output N15

RLV2M Output Mini-LVDS R-Link Channel 2 Negative Data Output M16

RLV2P Output Mini-LVDS R-Link Channel 2 Positive Data Output L16

RLV1M Output Mini-LVDS R-Link Channel 1 Negative Data Output N10

RLV1P Output Mini-LVDS R-Link Channel 1 Positive Data Output N11

RLV0M Output Mini-LVDS R-Link Channel 0 Negative Data Output N12

RLV0P Output Mini-LVDS R-Link Channel 0 Positive Data Output N13

RLVCKM Output Mini-LVDS R-Link Negative Clock Output M14

RLVCKP Output Mini-LVDS R-Link Positive Clock Output M15

TCON Interface

Pin Name Pin Type Function Pin

POL Output Polarity Control Single E15

SOE Output Source Output Enable H15

GSP/
VST

GCLK6 Output Gate Clock for GIP Panel L15

GCLK5 Output Gate Clock for GIP Panel K15

GCLK4 Output Gate Clock for GIP Panel G16

GSC/
GCLK3

GOE/
GCLK2

GSP_R/
GCLK1

Output Gate Start Pulse for LTD Panel /

Vertical start pulse for GIP Panel

Output Gate Shift Clock for LTD Panel /

Gate Clock for GIP Panel

Output Gate Clock for GIP Panel /

Gate Output Enable for LTD Panel

Output Right Gate Start Pulse for LTD Panel /

Gate Clock for GIP Panel

H14

J15

E16

J14

SCAN_BLK1 Output Scan Backlight Control Signal 1 F14

SCAN_BLK Output Scan Backlight Control Signal E14

OPT_N Output The Output Pin to Indicate Reverse State G15

OPT_P Output The Output Pin to Indicate Reverse State F16

FLK3 Output Gate Modulation Signal H16

FLK2 Output Gate Modulation Signal L14

FLK Output Gate Modulation Signal J16

MST6M181VG/MST6M182VG

PIN DESCRIPTION

Analog Interface

Pin Name Pin Type Function Pin

WPWM Output PWM Output for Wavy Noise F15

HCON Output H Inversion Control Signal on DPC D15

DPM Output Power Sequence Control Signal D16

LEDON Output LED On D14

VGH_ODD Output VGH Odd for GIP Panel K14

VGH_EVEN Output VGH Even for GIP Pane K16

DVI/HDMI Interface

Pin Name Pin Type Function Pin

RXCKN DVI/HDMI Input Negative DVI/HDMI Input for A Link Clock Channel A3

RXCKP DVI/HDMI Input Positive DVI/HDMI Input for A Link Clock Channel A2

RX0N DVI/HDMI Input Negative DVI/HDMI Input for A Link Data Channel 0 B3

RX0P DVI/HDMI Input Positive DVI/HDMI Input for A Link Data Channel 0 B2

RX1N DVI/HDMI Input Negative DVI/HDMI Input for A Link Data Channel 1 B1

RX1P DVI/HDMI Input Positive DVI/HDMI Input for A Link Data Channel 1 C3

RX2N DVI/HDMI Input Negative DVI/HDMI Input for A Link Data Channel 2 C1

RX2P DVI/HDMI Input Positive DVI/HDMI Input for A Link Data Channel 2 C2

ARC DVI/HDMI Output Audio Return Channel D2

Serial Flash Interface

Pin Name Pin Type Function Pin

SCK

SDI

SDO Input w/ 5V-tolerant SPI Flash Serial Data Output B16

SCZ

IRIN Input w/ 5V-tolerant IR Receiver Input B9

GPIO Interface

Output

Output

Output

SPI Flash Serial Clock C15

SPI Flash Serial Data Input C16

SPI Flash Chip Select B15

Pin Name Pin Type Function Pin

GPIO10 I/O w/ 5V-tolerant

GPIO9 I/O w/ 5V-tolerant

GPIO8 I/O w/ 5V-tolerant

GPIO7 I/O w/ 5V-tolerant

General Purpose Input/Output; 4mA driving strength

General Purpose Input/Output; 4mA driving strength

General Purpose Input/Output /
Universal Asynchronous Receiver 0 (UART0_RX)

General Purpose Input/Output; 4mA driving strength
For Power Management Only

D12

C9

B10

A10

MST6M181VG/MST6M182VG

PIN DESCRIPTION

Analog Interface

Pin Name Pin Type Function Pin

GPIO6 I/O w/ 5V-tolerant

PWM1 Output w/ 5V-tolerant Pulse Width Modulation Output; 4mA driving strength C12

PWM0 Output w/ 5V-tolerant Pulse Width Modulation Output; 4mA driving strength B12

SAR3 Analog Input SAR Low Speed ADC Input 3 G14

SAR2 Analog Input SAR Low Speed ADC Input 2 C10

SAR1 Analog Input SAR Low Speed ADC Input 1 C11

SAR0 Analog Input SAR Low Speed ADC Input 0 B11

General Purpose Input/Output /
Word Select Output; 4mA driving strength (I2S_OUT_WS) /
Universal Asynchronous Transmitter 0 (UART0_TX)

A11

USB Interface

Pin Name Pin Type Function Pin

USB0_DP Analog I/O USB Non Inverting Data Input/Output for Port 0 A14

USB0_DM Analog I/O USB Inverting Data Input/Output for Port 0 A15

USB1_DP Analog I/O USB Non Inverting Data Input/Output for Port 1 B13

USB1_DM Analog I/O USB Inverting Data Input/Output for Port 1 A13

VIF Interface

Pin Name Pin Type Function Pin

VIFM Analog Input Negative Video IF Input R6

VIFP Analog Input Positive Video IF Input T6

TAGC Analog Output Tuner Automatic Gain Control Output T4

PGA_COM Analog Input VIF PGA Negative Source P5

Misc. Interface

Pin Name Pin Type Function Pin

HWRESET Schmitt Trigger Input

w/ 5V-tolerant

DDCD_DA I/O w/ 5V-tolerant HDCP Serial Bus Data / DDC Data of DVI/HDMI D3

DDCD_CK Input w/ 5V-tolerant HDCP Serial Bus Clock / DDC Clock of DVI/HDMI D1

DDCR_DA I/O w/ 5V-tolerant DDC Data for ROM C14

DDCR_CK Input w/ 5V-tolerant DDC Clock for ROM B14

Hardware Reset; active high A9

HOTPLUGA I/O w/ 5V-tolerant Hot-plug control for DVI/HDMI D4

DDCA_DA I/O w/ 5V-tolerant DDC Data for Analog port D11

DDCA_CK I/O w/ 5V-tolerant DDC Clock for Analog port D10

MST6M181VG/MST6M182VG

PIN DESCRIPTION

Analog Interface

Pin Name Pin Type Function Pin

XIN Crystal Oscillator Input Crystal Oscillator Input T3

XOUT Crystal Oscillator

Output

BYPASS For External Bypass Capacitor D7

CEC I/O Consumer Electronics Control D6

MVREF Input Reference Voltage for DDR SDRAM Interface K13

Crystal Oscillator Output R3

Power Pins

Pin Name Pin Type Function Pin

AVDD_33 3.3V Power Analog 3.3V Power J4

AVDD_25 2.5V Power Analog 2.5V Power H6

AVDD_126 1.26V Power Analog 1.26V Power H7

AVDD_AU25 2.5V Power Audio 2.5V Power J6

AVDD_AU33 3.3V Power Audio 3.3V Power M5

AVDD_DMPLL 3.3V Power Crystal Power K4

AVDD_REF 2.5V Power Demod ADC Power K6

AVDD_PGA 2.5V Power Demod PGA Power N5

AVDD_MOD 3.3V Power MOD Power K5, L5

AVDD_MEMPLL 3.3V Power PLL Power J5

AVDD_DDR 1.8V Power DDR Power D9, E13, G8, M10, M11

DVDD_DDR 1.26V Power DDR 1.26V Power H8

AVDD_ALIVE 3.3V Power Alive Domain IO Power H4

VDDC 1.26V Power Digital Core Power J7, J8, K7, K8, L7, L8

VDDP 3.3V Power Digital Input/Output Power L6, M6

GND Ground Ground A12, C13, D13, F13, G1-G3, G13,

H9-H11, J9-J11, K9-K11, M4, N6, P4,
P6, P7, R4, R5, R7, T5, T7

No Connects

Pin Name Pin Type Function Pin

NC No connect A5, A6, B4-B7, C4-C7, D5, K3, N8, N9

2、 IT6633

Pin Diagram

TXPWR5V

CHPD

CSDA

CSCL

CRXCM

CRXCP

CPWR5V

CRX0M

49

50

51

52

53

54

55

56

33343536373839404142434445464748

32

NC

31

REXT

30

ARX2P

29

ARX2M

28

NC

27

ARX1P

26

ARX1M

25

VSS

CRX0P

VSS

CRX1M

CRX1P

VCC

CRX2M

CRX2P

NC

57

58

59

60

61

62

63

64

24

ARX0P

23

ARX0M

22

VCC

21

ARXCP

20

ARXCM

19

ASCL

18

ASDA

17

RESET

16151413121110987654321

Figure 1. IT6633 pin diagram

IT6633

Pin Description

TMDS High Speed Differential Input Pins (All these pins provide ±8kV HBM ESD Protection)

Pin Name Direction Description Type Pin No.
ARX2P Input Channel 2 positive input of Port A TMDS 30
ARX2M Input Channel 2 negative input of Port A TMDS 29
ARX1P Input Channel 1 positive input of Port A TMDS 27
ARX1M Input Channel 1 negative input of Port A TMDS 26
ARX0P Input Channel 0 positive input of Port A TMDS 24
ARX0M Input Channel 0 negative input of Port A TMDS 23
ARXCP Input Clock channel positive input of Port A TMDS 21
ARXCM Input Clock channel negative input of Port A TMDS 20
BRX2P Input Channel 2 positive input of Port B TMDS 14
BRX2M Input Channel 2 negative input of Port B TMDS 13
BRX1P Input Channel 1 positive input of Port B TMDS 11
BRX1M Input Channel 1 negative input of Port B TMDS 10
BRX0P Input Channel 0 positive input of Port B TMDS 8
BRX0M Input Channel 0 negative input of Port B TMDS 7
BRXCP Input Clock channel positive input of Port B TMDS 5
BRXCM Input Clock channel negative input of Port B TMDS 4
CRX2P Input Channel 2 positive input of Port C TMDS 63
CRX2M Input Channel 2 negative input of Port C TMDS 62
CRX1P Input Channel 1 positive input of Port C TMDS 60
CRX1M Input Channel 1 negative input of Port C TMDS 59
CRX0P Input Channel 0 positive input of Port C TMDS 57
CRX0M Input Channel 0 negative input of Port C TMDS 56
CRXCP Input Clock channel positive input of Port C TMDS 54
CRXCM Input Clock channel negative input of Port C TMDS 53

TMDS High Speed Differential Output Pins

Pin Name Direction Description Type Pin No.
TX2P Output Channel 2 positive output of output port TMDS 36
TX2M Output Channel 2 negative output of output port TMDS 37
TX1P Output Channel 1 positive output of output port TMDS 39
TX1M Output Channel 1 negative output of output port TMDS 40
TX0P Output Channel 0 positive output of output port TMDS 42
TX0M Output Channel 0 negative output of output port TMDS 43

IT6633

TXCP Output Clock channel positive output of output port TMDS 45
TXCM Output Clock channel negative output of output port TMDS 46

DDC, HPD and PWR5V Control Pins

Pin Name Direction Description Type Pin No.
ASCL I/O Port A DDC bus clock line 5V-Tol. 19
ASDA I/O Port A DDC bus data line 5V-Tol. 18
BSCL I/O Port B DDC bus clock line 5V-Tol. 3
BSDA I/O Port B DDC bus data line 5V-Tol. 2
CSCL I/O Port C DDC bus clock line 5V-Tol. 52
CSDA I/O Port C DDC bus data line 5V-Tol. 51
TXSCL I/O Output Port DDC bus clock line 5V-Tol. 47
TXSDA I/O Output Port DDC bus data line 5V-Tol. 48
TXHPD Input HPD signal of the HDMI Sink 5V-Tol. 44
AHPD Output HPD signal to be sent back to Source connected to Port A LVTTL 16
BHPD Output HPD signal to be sent back to Source connected to Port B LVTTL 1
CHPD Output HPD signal to be sent back to Source connected to Port C LVTTL 50
TXPWR5V Output When ‘1’, indicates that the selected input port has a valid

LVTTL 49

PWR5V input and TMDS clock
APWR5V Input PWR5v of input port A for detection 5V-Tol 15
BPWR5V Input PWR5v of input port B for detection 5V-Tol 6
CPWR5V Input PWR5v of input port C for detection 5V-Tol 55

Other Control and Configuration Pins

Pin Name Direction Description Type Pin No.
RESET Input Reset signals for logic blocks (active-high) LVTTL 17
PCSCL Input Serial programming Clock for chip programming (5V-tolerant) Schmitt 34
PCSDA I/O Serial programming Data for chip programming (5V-tolerant) Schmitt 33
PCADR0 Input Control of serial programming device address:

LVTTL 35
‘0’: 0x94
‘1’: 0x96
(default to ‘0’: 0x94 by internal weak pulled-down resistor of
100kΩ)

REXT Analog External resistor for auto-calibration. Must be tied to VSS via a

Analog 31

500Ω precision resistor.

NC Must be left unconnected 28, 32, 64

IT6633

Power and Ground Pins

Pin Name Description Type Pin No.
VCC Chip power supply (3.3V) Power 12, 22, 38, 61
VSS Chip ground Ground 9, 25, 41, 58

SSTIMER

OC_ADJ

PLL_FLTP

VR_ANA

NC

AVSS

PLL_FLTM

BST_A

GVDD_OUT

PVDD_A

OUT_A

RESET

PVDD_A

STEST

PDN

VR_DIG

OSC_RES

DVSSO

DVDD

MCLK

FAULT

SCLK

SDIN

LRCLK

AVDD

SDA

SCL

DVSS

GND

VREG

BST_B

PVDD_B

PVDD_C

OUT_C

PVDD_D

BST_D

PGND_AB

OUT_B

PGND_CD

OUT_D

AGND

PGND_AB

PVDD_B

PGND_CD

PVDD_D

BST_C

PVDD_C

GVDD_OUT

P0075-01

PHP Package

(TopView)

TAS5707

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15 16

17

18 19 20

21 22

23

24

25

26

27

28

29

30

31

32

48

47

46

45 44

43 42 41 40 39 38 37

36

35

34

33

3、 TAS5707, TAS5707A

48-TERMINAL, HTQFP PACKAGE (TOP VIEW)

TAS5707, TAS5707A

PIN FUNCTIONS

PIN

NAME NO.

AGND 30 P Analog ground for power stage
AVDD 13 P 3.3-V analog power supply
AVSS 9 P Analog 3.3-V supply ground
BST_A 4 P High-side bootstrap supply for half-bridge A
BST_B 43 P High-side bootstrap supply for half-bridge B
BST_C 42 P High-side bootstrap supply for half-bridge C
BST_D 33 P High-side bootstrap supply for half-bridge D
DVDD 27 P 3.3-V digital power supply
DVSSO 17 P Oscillator ground
DVSS 28 P Digital ground
FAULT 14 DO Backend error indicator. Asserted LOW for over temperature, over

GND 29 P Analog ground for power stage
GVDD_OUT 5, 32 P Gate drive internal regulator output
LRCLK 20 DI 5-V Pulldown Input serial audio data left/right clock (sample rate clock)
MCLK 15 DI 5-V Pulldown Master clock input
NC 8 – No connection
OC_ADJ 7 AO Analog overcurrent programming. Requires resistor to ground.
OSC_RES 16 AO Oscillator trim resistor. Connect an 18.2-kΩ 1% resistor to DVSSO.
OUT_A 1 O Output, half-bridge A
OUT_B 46 O Output, half-bridge B
OUT_C 39 O Output, half-bridge C
OUT_D 36 O Output, half-bridge D
PDN 19 DI 5-V Pullup Power down, active-low. PDN prepares the device for loss of power

PGND_AB 47, 48 P Power ground for half-bridges A and B
PGND_CD 37, 38 P Power ground for half-bridges C and D
PLL_FLTM 10 AO PLL negative loop filter terminal
PLL_FLTP 11 AO PLL positive loop filter terminal
PVDD_A 2, 3 P Power supply input for half-bridge output A
PVDD_B 44, 45 P Power supply input for half-bridge output B
PVDD_C 40, 41 P Power supply input for half-bridge output C
PVDD_D 34, 35 P Power supply input for half-bridge output D
RESET 25 DI 5-V Pullup Reset, active-low. A system reset is generated by applying a logic low

SCL 24 DI 5-V I2C serial control clock input
SCLK 21 DI 5-V Pulldown Serial audio data clock (shift clock). SCLK is the serial audio port input

SDA 23 DIO 5-V I2C serial control data interface input/output
SDIN 22 DI 5-V Pulldown Serial audio data input. SDIN supports three discrete (stereo) data

TYPE 5-V TERMINATION

(1)

TOLERANT

(2)

DESCRIPTION

current, over voltage, and under voltage error conditions. De-asserted
upon recovery from error condition.

supplies by shutting down the noise shaper and initiating PWM stop
sequence.

to this pin. RESET is an asynchronous control signal that restores the
DAP to its default conditions, and places the PWM in the hard mute
state (tristated).

data bit clock.

formats.

TAS5707, TAS5707A

PIN FUNCTIONS (continued)

PIN

NAME NO.

SSTIMER 6 AI Controls ramp time of OUT_X to minimize pop. Leave this pin floating

STEST 26 DI Factory test pin. Connect directly to DVSS.
VR_ANA 12 P Internally regulated 1.8-V analog supply voltage. This pin must not be

VR_DIG 18 P Internally regulated 1.8-V digital supply voltage. This pin must not be

VREG 31 P Digital regulator output. Not to be used for powering external circuitry.

TYPE 5-V TERMINATION

(1)

TOLERANT

(2)

DESCRIPTION

for BD mode. Requires capacitor of 2.2 nF to GND in AD mode. The
capacitor determines the ramp time.

used to power external devices.

used to power external devices.

Wiring Diagram

Panel

Pｏｗｅｒ　ｂｏａｒｄ　ａｓｓｅｍｂｌｙ

Ｋｅｙ　ｂｏａｒｄ　ａｓｓｅｍｂｌｙ

Ｍａｉｎ　ｂｏａｒｄ　ａｓｓｅｍｂｌｙ

ＩＲ　ｂｏａｒｄ　ａｓｓｅｍｂｌｙ

Troubleshooting flow chart

1. No raster, no picture, no sound.

Yes No

Press button POWER of remote control or unit to
turn on the TV set, then check if C333(5V) are
normal or not?

Yes No

Is the voltage of

No No

X301-6# on main
board high level?

Yes Yes Yes No

Check
backlight
board

Check
N101and its
power circuits

No raster, no picture, no sound

Is the voltage of R324
on main board high
level?

Check
N301and its
power circuits

Does power indicator light up?

Check 12V_STB

Disconnect power
board from data
processing board, then
test 12V_STB again.

Check main
board N303and
its power circuits

Check power
board

2. No picture, but sound is normal.

r

p

p

Yes No

Check if current channel that
OSD displays is normal or not?

HDMI

USB

Check if
N102(KEY)
is normal or
not?

Check if 5V
supplied for USB
channel is
normal or not?

Check N101 and its power circuits

No picture, but sound is normal.

Are LOGO and OSD normal?

TV/AV/VGA/
YPbP

Check if signal
input is normal or

Switch to TV
channel, check
power supply,
I2C BUS and
pin12/13 output
of TUNER chip
are normal or
not?

Check LVDS
connection

Check if power voltage of
panel backlight and backlight
control pin X301-6# (3V) are
normal or not?

No Yes

Power board

roblem

has

PANEL has

roblem.

3. No sound, but the picture is normal.

p

p

No Yes

No

Check power 12/24V supplied
for C348 is normal or not?

Yes

Check if there is signal inputted to
power amplifier N402, check if MUTE
and power of N402 are normal or not?

No sound, but the picture is normal.

Check if there is output from X402?

Connection to speakers or
s

eakers have problem.

Check V309
and its power

Check if power

Yes

amplifier N402 and
power of control
circuits are normal or
not?

No
Yes

No

Check if output of N101-P8/R9/R8/T8 are normal or
not and check if the voltage of N101-J16 is high level?

Check if power amplifier
N402 is normal or not?

Check current channel.

TV channel

USB channel

YPbPr ,VGA，
AV channel

Check if there is

ut from AVOUT ?

out

Check if DIF output
circuits of TUNER is

无

Check if file
format is

Check if there is
signal inputted to
corresponding
terminal of N101?

HDMI channel

Check if HDMI
N102(KEY) is
normal or not?

ABCDEFGH

1

002:A1

2

HDMI_HPD002:A2
HDMI_RXC-

002:A1

HDMI_RXC+

002:A1

HDMI_RX0-

002:A1

HDMI_RX0+

002:A1

HDMI_RX1-

002:A1

HDMI_RX1+

002:A1

HDMI_SDA

002:A1

HDMI_RX2-

002:A1

HDMI_RX2+

002:A1

HDMI_SCL

002:A1

002:B3
002:B4

002:B4

3

002:B4
002:B3

002:D5

002:D3

002:D5

002:D5
002:B4
002:B5

002:E4
002:E4

4

002:H5
002:H4

R102=100K,C158=0,R116=100K,C159=0

or R102=300,C158=10u,R116=300,C159=10u

CEC

VGA_HS
VGA_B+

VGA_G+

VGA_R+
VGA_VS

YPBPR_PB002:D1

YPBPR_Y002:D1

YPBPR_PR002:D1

AV_V

AVOUT_V

AV_L

AV_R
VGA_L
VGA_R

YPBPR_L002:D1
YPBPR_R002:D2

AVOUT_L
AVOUT_R

HPOUT_L
HPOUT_R

R133

200

R103 33
R104 33
R105 33
R106
R107 33

R108 33
R109 33
R110 33
R111
R112 33

R134 33

R113 33
R114

120ohm

L101

R101

100K

R102

100K

10u

C158

6.3V

NC

50V

50V

2.5V_PGA

1.8V_DDR21.2V

G13

L8

K8

GNDN6GND

L7

VDDC

VDDCJ8VDDC

VDDCK7VDDCH8VDDC

G3

G1

G2

GND

GND

T5

P4

R5

R4

GND

GND

GND

GND

GNDP6GNDT7GNDH9GND

GND

J11

GND

F13

K10

K9

K11

A12

GND

GND

GND

GND

GND

H10

J10

H11

R7

J9

GND

GND

GNDP7GND

GND

1.26V

D6

CEC

D5

HOTPLUGD

C7

RXCKN_D

B7

RXCKP_D

C6

RX0N_D

B6

RX0P_D

A6

RX1N_D

C5

RX1P_D

C4

DDCDD_DA

A5

RX2N_D

B5

RX2P_D

B4

DDCDD_CK

D4

HOTPLUGA

A3

RXCKN_A

A2

RXCKP_A

B3

RX0N_A

B2

RX0P_A

B1

RX1N_A

C3

RX1P_A

D3

DDCDA_DA

C1

RX2N_A

C2

RX2P_A

D1

DDCDA_CK

D2

ARC

E4

180p

180p

C116

C117

E3
E2
F3
F2
F1
F4
H3
H2
J3
J2
J1
K3
K1
K2
L1
L2
M1
M2
N1
N2
P1
L3
M4
P2
R1
M3
N3
N4
P3
R2
T2

HSYNC0
BIN0P
SOGIN0
GIN0P
GIN0M
RIN0P
VSYNC0
BIN1P
SOGIN1
GIN1P
GIN1V
RIN1P
VSYNC1
CVBS2
CVBS1
CVBS0
VCOM
CVBSOUT
AUL0
AUR0
AUL1
AUR1
AUVAG
AUREFM
AUL2
AUR2
AUL3
AUR3
AUOUTL1
AUOUTR1
AUOUTL0
AUOUTR0

20p

C125

XINR3XOUTP5PGA-COMR6VIFMT6VIFPT4RFAGC

T3

0

R118

G101

24MHz

R117

1M

50V

20p

C126

50V

B_ODD0/LVA4P

B_ODD1/LVA4M

B_ODD2/LVA3P

B_ODD3/LVA3M

P10

R10

P11

R11

T11

RXE3+

RXE3-

RXEC+

VCC_PANEL

B_ODD4/LVACLP

B_ODD5/LVACKM

B_ODD6/LVA2P

B_ODD7/LVA2M

G_ODD0/LVA1P

G_ODD1/LVA1M

P12

T12

R12

P13

R13

P14

RXEC-

RXE2+

RXE2-

RXE1+

RXE1-

RXE0+

G_ODD2/LVA0P

G_ODD3/LVA0M

G_ODD4/LVB4P

G_ODD5/LVB4M

R14

T14

T15

R15

RXE0-

RXO3+

RXO0-

RXO1-

47n

C103

1n

C104

47n

C105

68

C106

47n
47n

C107

47n

C108
C109

1n
47n

C110

68

C111

47n
47n

C112

47n

C147

47n

C113

68

C114

47n

2.2u

C118

2.2u

C119

2.2u

C120

2.2u

C121
C115

10u
100n

C122

3A

2.2u

C123

2.2u

C124

50V

100K

R115

C101

180p

50V

100K

R116

C102

180p

10u

C159

6.3V

N101

MST6M182VG

G_ODD6/LVB3P

G_ODD7/LVB3M

R_ODD1/LVBCKM

R_ODD2/LVB2P

R_ODD3/LVB2M

R_ODD4/LVB1P

R_ODD5/LVB1M

N14

N15

RXO2+

RXO2-

RXOC-

M14

M15

RXO1+

RXO1-

RXO3-

M16

RXO0+

RXE0-

R_ODD6/LVB0P

L16

RXO0-

R_ODD0/LVBCKP

R16

P16

P15

RXO3-

RXOC+

RXOC-

RXO2-

G8

J7

D9

H7

E13

M11

M10

N5

VDDC

AVDD_DDR

AVDD_DDR

AVDD_DDR

AVDD_DDR

AVDD_1P2

AVDD_DDR

DDR1 2.5V
DDR2 1.8V

R_ODD7/LVB0M

GPIO21/TCON21/VGH_ODD_49

GPIO20/TCON20/VGH_EVEN_48

GPIO19/TCON19/GCLK6_47

GPIO18/TCON18/GCLK5_46

GPIO17/TCON17/GCLK4_45

GPIO16/TCON16/WPWM_44

GPIO15/TCON15/SCAN_BLK1_43

GPIO14/TCON14/SCAN_BLK_42

GPIO13/TCON13/LEDON_41

GPIO12/TCON12/DPM_40

GPIO11/TCON11/HCON_39

K14

K16

L15

K15

G16

F15

F14

E14

D14

D16

D15

G15

RXE1-

RXE2-

RXEC-

RXE3-

H6

K6

J6

J5

AVDD_25

AVDD_PGA

AVDD_REF

AVDD_AU25M5AVDD_AU33

2.5V 3.3V

GPIO define
MST6M161LG/MST6M181VG
MST6M182VG

GPIO10/TCON10/OPT_N_38

GPIO9/TCON9/OPT_P_37

GPIO8/TCON8/FLK3_36

GPIO7/TCON7/FLK2_35

GPIO6/TCON6/FLK_34

GPIO5/TCON5/SOE_33

F16

H16

L14

J16

H15

J15

AVDD_33_PMAVDD_33ADC2P5

L5

J4

K4

H4

AVDD_33

AVDD_MODK5AVDD_MODM6AVDD_MODL6AVDD_MOD

AVDD_PLL

PMGPIO_GPIO10/GPIO66

SAR3_GPIO14/INT_GPIO65

GPIO4/TCON4/GCLK3_32

GPIO3/TCON3/GCLK2_31

GPIO2/TCON2/GCLK1_30

E16

J14

H14

AVDD_DVI

AVDD_DMPLL

MVREF

DVDD_NODIE

VRP

GND_EFUSE

TESTPIN

SAR2_GPIO13/GPIO73
SAR1_GPIO12/GPIO74
SAR0_GPIO11/GPIO75

PWM0_GPIO20/GPIO26
PWM1_GPIO21/GPIO25

PM1_GPIO6/GPIO67
PM4_GPIO7/GPIO68
PM5_GPIO8/GPIO69
PM6_GPIO9/GPIO70

GPIO0/TCON0/POL_28

GPIO1/TCON1/VST_29

E15

SCZ
SDO
SDI
SCK

USB1_DP
USB1_DM
USB0_DP
USB0_DM

DDCA_DA
DDCA_CK

IRIN

HWRESET

DDCR_CK/GPIO63
DDCR_DA/GPIO64

NC/GPIO62
GPIO26/GPIO61
GPIO27/GPIO60

NC/GPIO59
GPIO23/GPIO58
GPIO25/GPIO57
GPIO24/GPIO56
GPIO22/GPIO56

GPIO30/LCK_74

GPIO29/LDE_75

GPIO28/LHSYNC

GPIO27/LVSYNC

N10

N11

N12

N13

K13
D7
L4

D13
C13

C10
C11
B11
B15
B16
C16
C15

B13
A13
A14
A15

D11
D10

B9
A9

B12
C12
D12
A11
A10
B10
C9

G14
B14
C14
N9
P9
T9
N8
P8
R9
R8
T8

2.2u
10u

100n

C127
C129
C128

33

R119

TCON2
TCON4
HP_DETE
AMP_RESET
HDMI_EN
HDMI_RESET

001:G4
001:G5

002:G5

004:F4

002:E1

MVREF 001:H2

AMP_STB
LED

KEY
SPI_CZ
SPI_DO
SPI_CK
SPI_DI

USB_D+ 002:B6
USB_D-

VGA_SDA_TXD

VGA_SCL_RXD

003:B5

IRIN
RESET

001:G5;003:B2

PWM
CFG_PWM1 001:G5
FLASH_WP 001:G4
PANEL_ON 003:D6
POWER_ON
BL_ON 003:B2
MUTE_PHOUT

EOP_PWON
TUNER_SCL
TUNER_SDA

SDIN

004:F4

SCLK

004:F3
004:F3

MCLK
LRCLK

004:F3

002:B3

004:E2
003:B5
003:B4
001:G3
001:G4
001:H4
001:H4

002:B6

002:B3
002:B3

001:H5

003:B2;003:D3;003:D5;003:H2

002:H3

002:G3

004:B4;004:F4
004:B4;004:F4

1.2V

6.3V

10u

C130

C131

L102

120ohm

250mA

001:E4

001:E4

001:E3

CHIP CONFIG

100n

C132

3A

TCON2

TCON4

CFG_PWM1

PWM001:E3;003:B2

C133

100n

100n

001:E2

001:E2

FLASH_WP001:E3

POWER ON LOW

100n

C136

SPI_CZ

SPI_DO

100n

R120

4.7K

R121

4.7K

R122

4.7K

R123

4.7K

C137

1K

R124

120ohm

120ohm

L103

3.3V AVDD_33_PM3.3V_STB

L104

L105

3.3V_STB 3.3V_STB

4.7K

R126

10K

R125

AVDD_33

120ohm

3A

6.3V

2.5V_PGA2.5VADC2P52.5V

3A

100n

3A

C141

C143

5272532007 OR 5273206001

EN25Q32B-104HIP

1

CS

2

DO/DQ1

3

WP/DQ2

4

VSS

100n

10u

C138

1.8V_DDR2

N102

C139

100n

6.3V

NC/DQ3

DI/DQ0

5V_STB

100K

R127

10V

10u

VCC

CLK

2.2u

C140

C144

C145

100n

C142

100n

C146

100n

8

7

6

5

D101

LBAV99LT1G

10K

R128

47K

R129

C151

100n

SPI_CK

SPI_DI

C150

2.2u

10V

V101

BC857AW

R130

100

C152

120ohm

1.8V_DDR2

1K

R131

1K

R132

10u

6.3V

001:E2

001:E3

1n

C153

1n

C154

L107

3A

100n

C155

RESET

C156

001:E3

100n

MVREF

C157

100n

001:E2

1

5

9

7

5

AGC

VIFP

VIFM

X101

004:D3

004:D4

004:D4

3

1

2

PHB-2x15-2.0

4

2

5

7

3

4

6

8

6

8

10

RXO0+

RXO1+

15

11

13

9

11

13

14

12

10

14

16

12

RXO2+

RXOC+

RXO3+

21

17

19

23

25

27

29

17

18

18

RXE0+

19

20

20

RXE1+

21

22

22

RXE2+

23

24

24

RXEC+

25

26

26

RXE3+

27

29

28

30

28

30

K101 K102 K103 K104 K105 K106

15

16

TITLE: DWG NO.

MAIN CHIP 9232ME8302DL

6

DRAWN BY

APPROVED BY

REV.

Sheet to

1

A1.0

4

XOCECO

XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.

ABCDEFGH

HDMI
X201

001:A2;002:A2

CEC

4.7K

4.7K

R212

R209

3K

001:A2;002:A1

CEC

4.7K

4.7K

R213

R210

3K

HDMI2_RX2+

HDMI2_RX2­HDMI2_RX1+

HDMI2_RX1­HDMI2_RX0+

HDMI2_RX0­HDMI2_RXC+

HDMI2_RXC-

HDMI2_SCL
HDMI2_SDA

HDMI2_HPD

HDMI2_BPWR5V

HDMI1_RX2+

HDMI1_RX2­HDMI1_RX1+

HDMI1_RX1­HDMI1_RX0+

HDMI1_RX0­HDMI1_RXC+

HDMI1_RXC-

HDMI1_SCL
HDMI1_SDA

HDMI1_HPD

HDMI1_APWR5V

HDMI2_HPD

HDMI2_SDA

HDMI2_SCL

HDMI2_RXC-

HDMI2_RXC+

HDMI2_BPWR5V

HDMI2_RX0-

HDMI2_RX0+

HDMI2_RX1-

HDMI2_RX1+

HDMI2_RX2-

HDMI2_RX2+

HDMI1_APWR5V

HDMI1_HPD

HDMI_RESET

001:E5

1

1

2

3

2

3

4

5

6

7

8

9

10

11

12

HDMI2HDMI1

13

14

15

16

17

18

19

HDMI
X202

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

HDMI2_5V

R204

R201

1.5K

HDMI1_5V

R205

R202

1.5K

R224

1K

R225

1K

3.3V_HDMI

R226

33K

R227

33K

1M

R229

49

50

51

52

53

54

55

56

57

58

59

60

61

62

63

64

NC

CRX2M

1M

R228

1

BHPD

2

BSDA

3

BSCL

4

BRXCM

5

BRXCP

6

BPWR5V

7

BRX0M

8

BRX0P

9

VSS

10

BRX1M

11

BRX1P

12

VCC12

13

BRX2M

14

BRX2P

15

APWR5V

16

AHPD

R231

R230

100

R232

CRX2P

RESET18ASDA19ASCL20ARXCM21ARXCP22VCC_2223ARX0M24ARX0P25VSS_2526ARX1M27ARX1P28NC_2829ARX2M30ARX2P31REXT32NC_32

17

NC

4.7K

10K

HDMI1_SCL

HDMI1_SDA

CRX1P

VCC_61

HDMI1_RXC+

HDMI1_RXC-

CRX1M

CRX0P

VSS_58

IT6633E-P

HDMI1_RX0+

HDMI1_RX0-

CRX0M

N201

CRXCP

CPWR5V

HDMI1_RX1+

HDMI1_RX1-

CRXCM

CSDA

CSCL

R243

HDMI1_RX2+

HDMI1_RX2-

CHPD

TXPWR5V

1%

499

3.3V_AMP

TXSDA

TXSCL

TXCM

TXCP

TXHPD

TX0M

TX0P

VSS_41

TX1M

TX1P

VCC_38

TX2M

TX2P

PCADR0

PCSCL

PCSDA

48

47

46

45

44

43

42

41

40

39

38

37

36

35

34

33

120ohm

L201

R253

R254

R255

3A

R249

22

R250

0

R251

22

22

R252

6.3V

3.3V_HDMI

4.7K

R256

0

0

0

3.3V_HDMI

10u

16V

100n

C208

4.7K

R257

C210

16V

4.7K

R258

100n

C211

R259

16V

4.7K

100n

C213

16V

100n

C217

HDMI_EN

001:E5

HDMI_HPD 001:A2

001:A3

HDMI_SDA

001:A3

HDMI_SCL

HDMI_RXC-

HDMI_RXC+

HDMI_RX0-

HDMI_RX0+

HDMI_RX1-

HDMI_RX1+

HDMI_RX2-

HDMI_RX2+

TUNER_SCL

TUNER_SDA

001:A2

001:A2

001:A2

001:A2

001:A3

001:A3

001:A3

001:A3

001:E3;004:B4;004:F4

001:E3;004:B4;004:F4

R

BU

YPBPR

G

RCA-386A-02

X209

R

W

YPBPR AUDIO

RCA-286A-02

X210

EOP_PWON001:E3

YPBPR_PR

75

R268

YPBPR_PB

75

R269

YPBPR_Y

75

R270

R265

10K

12K

R274

R266

10K

12K

R275

3.3V 3.3V_STB

4.7K

R271

R273

1K

001:A3

001:A3

001:A3

YPBPR_R

YPBPR_L

R278

4.7K

V204

BC847AW

001:A4

001:A4

R279

1K

5V_USB

10K

R281

V205

BC847AW

5V_BH3547

BC857AW

V206

1K

R282

5V_USB

10K

L202

5V_BH3547

120ohm

3A

N202

C201

2.2u

25V

R233

470u
C203

AV IN

10V

100K

R234

100K

10u

C204

C202

2.2u

25V

R238

75

16V

C205

R235

10K

R236

10K

R237

100n

0

12K

R240

12K

R241

75

R242

V201

BC857AW

R244
220

820

R239

12V_AMP

R245

1.5K

220

R246

4

5V_STB

TXD

4

R203

R208

4.7K

4.7K

5

10

15

VGA

5

89

234

12 13 14

5289000155 & 5986A00911

HC1038-15F-3.08

JY-3541L-01-030

VGA AUDIO

1

67

11

X203

L

R

G

X204

R211

22K

R206

10K

R207

10K

22K

R214

GND

RXD

3

2

R217

100

R218

100

R219

100

R220

100

R22175R22275R223

12K

R215

12K

R216

NC

NC

1

X205

75

001:A4

VGA_L

VGA_R 001:A4

VGA_SCL_RXD

VGA_SDA_TXD

001:A3

VGA_VS

VGA_HS 001:A3

001:A3

VGA_B+

VGA_G+

001:A3

VGA_R+

001:A3

001:E3

001:E3

R

W

AV OUT

Y

RCA-389B-01

X206

@pinCo

@pinCo

@pinCo

6

1

OUT1

2

MUTE

3

IN1

4

GND

5V_USB

33K

R247

V202

BC847AW

R248

120K

001:A4

AV_R

AV_L 001:A4

001:A3

AV_V

NC

BH3547F

100n

C207

10V

220u
C206

10u

C209

VCC

OUT2

BIAS

IN2

8

7

6

5

6.3V

USB

16V

100n

C212
100u

10V

C215

1u

10V

C216

1u

10V

AVOUT_V

UBA-100/W

C214

X207

6.3V

001:A3

GG

10u

C218

AVOUT_R

AVOUT_L

MUTE_BH3547

1

2

34

5V_USB

100n

R260

R261

001:A4

001:A4

002:G3;002:G4

C219

5.1

5.1

USB_D-

USB_D+

HP OUT

001:E3

001:E3

ST-113

X208

002:D4;002:G4

L

G2

R

G5

MUTE_BH3547

002:D4;002:G3

100n

C220

100n

C221

MUTE_BH3547

10V

100u
C223

1K

R262

10V

100u
C224

1K

R263

3.3V

10K

R264

1n

50V

C222

DRAWN BY

10V

V203

BC847AW

1u

C225

R267

100

R272

1

2

3

4

OUT1

MUTE

IN1

GND

R277

10K

47K

R276

APPROVED BY

52302B1531

D201

MMBD1204

N203

BH3547F

3.3V_AMP

R280

4.7K

VCC

OUT2

BIAS

IN2

HP_DETE

MUTE_PHOUT

POWEROFF_MUTE

8

7

6

5

001:E4

16V

C226
100u

10V

C228

1u

10V

C229

1u

10V

100n

C227

001:E3

004:E2

120ohm

10u

6.3V

L203

3A

C230

HPOUT_R

HPOUT_L

5V_BH3547

001:A4

001:A4

TITLE: DWG NO.

INTERFACE 9232ME8302DL

REV.

Sheet to

XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.

A1.0

2

XOCECO

4

ABCDEFGH

1

5V_STB

1K

R302

V301

BC847AW

2

POWER_ON

7

BL_ON

6

PWM

5

GND

4

GND

3

12V_STB

2

12V_STB

1

TJC3S-07A

X301

5283070024 BBY

PWM wave: C306=NC,R310=0

12V_STB

1u

47K

R301

C302

16V

R305

1K

C303

V303

BC847AW

1u

C304

C306

470u

1u

35V

4.7K

R311

47K

R312

R310

10K

3

3.3V_STB

GND

KEY

X302

1

2

4.7K

R303

R304

1K

10n

C305

4

R314

5V_USB

R316

V304

BC847AW

2K

R315

10n

C308

R317

10K

R318

1K

V305

BC847AW

4.7K

10K

R319

10K

5V_USB

1K

R320

KEY

POWER_ON 001:E3;003:D3;003:D5;003:H2

5V_STB

4.7K

R322

BL_ON

001:E3

5V_STB

4.7K

R323

R321

4.7K

001:E2

001:E3;001:G5

PWM

001:E3;003:B2;003:D5;003:H2

POWER_ON

12V_STB

10u

C309

R325

0

12V_STB

16V

10u

C310

12V_STB

R328

R329

16V

100K

33K

C311

16V

NC

16V

100n

C313

C312

16V

10u

10u

R333

R334

16V

16V

100K

33K

C318

50V

10n

C317

50V

10n

10u

10u

C314

R330

R332

C315

N303

MP1494

2

IN

6

EN/SYNC3SW

7

VCC

150K

1

AAM8FB

GND

4

22K

Vout=0.8*[1+R343/R344]

N302

MP1496

1

SS

2

IN

3

SW

4

GND

Vout=0.8*[1+(R347+R348)/R350]

N301

MP1496

1

SS

2

IN

3

SW

4

GND

BST

EN/SYNC

EN/SYNC

VCC

BST

R366

33

5

8

FB

7

VCC

6

5

BST

8

FB

7

6

5

C322
100n

16V

R338

C325

33K

100n

L301

NR6045T4R5M

R342
200K

16V

0

R340

16V

NR6045T4R5M

R341

75K

16V

0

R339

R343

R344

L303

53.6K

10K

100n

100n

C328

C329

5.09V

5V_STB

22u

C332

47K

R347

0

R348

22u

C331

47K

R345

6.8K

R346

NC

10V

10u

6.3V

C335

75K

R350

1.3V 650mA

1.2V

1u

10V

6.3V

C334

10K

R349

C336

100n

16V

5V_STB

R351

0

R352

0

10u

C339

D303

B240-13-F

NC

5V_USB 2.5V

10V

10u

C337

C340

100n

Vout=1.25*(1+R355/R360)

5V_USB

10V

10u

C338

C341

100n

Vout=1.25*(1+R356/R361)

N306

AP1117-ADJ

IN OUT

10V

16V

C343

100n

R359

Vout=1.25*(1+R359/R362)

N304

AP1117-ADJ

IN OUT

16V

442

R360

442

R355

N305

AP1117-ADJ

IN OUT

16V

909

R361

442

R356

365

215

R362

3.37V 150mA

10V

10V

C345

100u

10V

C346

100u

3.3V_STB

C347

100u

16V

100n

1.8V_DDR2

16V

100n

16V

100n

C351

V310

BC847AW

2.5V 150mA

C349

10u

C352

C350

6.3V

AO3401A

S

1u

47K

10V

R363

C353

4.7K

R364

R365

4.7K

1.86V 200mA

V311

3.3V

D

G

16V

C354

100n

001:E3;003:B2;003:D3;003:D5

POWER_ON

5.10V

5V_STB

001:E3;003:B2;003:D3;003:H2

POWER_ON

R324

L302

16V

C324

100n

NC

R326

100K

0

33K

R327

Vout=0.8*[1+(R345+R346)/R349]

NR6045T4R5M

10u

C330

10V

5V_USB

10u

C333

10V

47K

4.7K

V308
BC847AW

1u

C344

V309

AO3401A

S

16V

12V_AMP

G

D

C348

100n

16V

X303

LED

1

GND

2

IR_POWER

3

IRR

5

4

5V_STB

100n

BC847AW

V302

C301

2.2K

R308

100

4.7K

220

R306

R307

R309

50V

R313

4.7K

22p

C307

IRIN

LED

001:E3

001:E2

001:E3

PANEL_ON

R331

4.7K

R335

4.7K

1u

C316

12V_STB

47K

R336

R337

4.7K

V306
BC847AW

10V

1u

C320

V307

AO3401A

S

16V

G

FOR 12V PANEL

VCC_PANEL

D

16V

C323

C321

100n

100n

16V

004:F3

PDN

R353

4.7K

R354

4.7K

C342

1u

12V_STB

R357

R358

10V

TITLE: DWG NO.

POWER&CONNECTOR 9232ME8302DL

6

DRAWN BY

APPROVED BY

REV.

Sheet to

4

A1.0

4

XOCECO

XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.

ABCDEFGH

1

L417

3.3V 3.3V_AMP
120ohm

3A

L407

3.3V
120ohm

3A

C411

10u

3.3V_TUNER

16V

6.3V

C413

100n

C417

100n

16V

1u

C419

10V

10V

C421

100u

NC

3.3V_AMP

1K

R421

C434

100n

C435

100n

10K

NC

R423

R424

18.2K

C436

4.7u

16V

100n
C437

R425 47

R426

R427

R428

R429 47

4.7K

R419

4.7K

R420

R422

4.7K

R430

0

10u

6.3V

C438

47

47

47

3.3V_AMP

BC847AW

V403

4.7K

R431

13

14

15

16

17

18

19

20

21

22

23

24

C439

100n

R432

470

C440

47n

C441

4.7n

R433

470

C442
47n

C443

4.7n

10

11

12

VR_ANA

PLL_FLTM

AVDD

A_SEL

MCLK

OSC_RES

DVSSO

VR_DIG

PDN

LRCLK

SCLK

SDIN

SDA

SCL

PLL_FLTP

RESET26STEST27DVDD28DVSS29GND30AGND31VREG32GVDD+OUT33BST_D34PVDD_D_3435PVDD_D3_536OUT_D

25

3.3V_AMP

10u

6.3V

C445

C444

100n

9

AVSS

GND_49

8

PBTL

TAS5711

R434

7

OC_ADJ

49

N402

C446

100n

100

6

SSTIMER

C447

R435

22K

C448

2.2n

C449

1u

39n

C450

4

5

BST_A

GVDD_OUT

1u

39n

12V_AMP

C452

100n

3

PVDD_A_2

PVDD_A_3

C451

1n

C453

12V_AMP

C454

100n

1

2

OUT_A

PGND_AB_48

PGND_AB_47

OUT_B

PVDD_B_45

PVDD_B_44

BST_B

BST_C

PVDD_C_41

PVDD_C_40

OUT_C

PGND_CD_38

PGND_CD_37

1n

C455

48

47

46

45

44

43

42

41

40

39

38

37

R436

C456

330p

39n

C457

39n

C458

18

R438

C462

C460

100n

C461

100n

L418

NR6045T150M

1.9A

18

R437

C459

330p

L419

NR6045T150M

1.9A

L420

NR6045T150M

1.9A

18

330p

12V_AMP

1n

C463

12V_AMP

1n

C464

NR6045T150M

18

R439

C466

330p

1u

50V

C465

1u

C467

1u

C468

L421

1.9A

50V

50V

1u

C469

50V

X403

1

L+

2

L-

3

R-

4

R+

5283040024 BBY

D404

LL4148

C433

100u

D405

10K

R414

4.7K

PDN003:G5

LRCLK

SCLK

SDIN

AMP_RESET

12V_AMP

1K

R416

BZV55-B9V1

BC847AW

V402

3.3V_AMP

R413

R415

0

10K

R417

4.7K

R418

001:E2

001:B5

001:B5

001:B5

POWEROFF_MUTE002:H3

AMP_STB

D403

LL4148

BC857AW

3.3V_AMP

4.7K

R410

D402

LL4148

001:E4

001:E3;004:B4

001:E3;004:B4

V401

R411

2.2K

001:E4

10V

R412

2.2K

MCLK

001:E4

001:E4

TUNER_SDA

TUNER_SCL

001:E4

3.3V_TUNER

531A3A51H0

2

3.3V_TUNER

531A3000H0

C405

4.7p

ADD NOTCH FILTER C401=68pF,C403=47pF

L402=220nH,L403=220nH,C402=120pF,C404=150pF

NOT ADD NOTCH FILTER C401=10nF,C403=10nF

3

GND

L402=NC,L403=NC,C402=NC,C404=NC

@pinCo1@pinCo

@pinCo1@pinCo

@pinCo

X401

X402

IF-10S

NF-12

GND

NC

180nH

L401

LBAV99LT1G

D401

C401

68p

50V

C403

47p

50V

L402

220nH

50V

120p

C402

001:E3;004:F4

001:E3;004:F4

50V

L403

220nH

150p

C404

TUNER_SCL

TUNER_SDA

47nH

50V

22nH

50V

L404

50V

3.3V_TUNER

L406

8.2nH

L405

1n

4.7p

C406

C407

16V

50V

10p

C409

1u

4

L408

15nH

L409

15nH

C408

16V

R401

R402

33

33

3.3V_RFA

C414

3.3V_RFB

C415

3.3V_RFB

100n

C410

50V

10n

10n

39p

1
2
3
4
5
6

C412

50V

50V

RF_2
Open_D
VCC3
Det1
Det2
SCL

50V

39p

C416

3.3V_RFA

150nH

24

25

GND

RF_1

VCC23

SDA

Xtal_l

7

G401

16MHz

33p

C418

150nH

L410

23

22

TF1n

TF1p

N401

R620D

VCC10

Xtal_O

8

9

50V

50V

L411

20

21

TF2p

VDD_PLL

DVSS

10

11

19

TF2n

VCC18

AVSS

IF_AGC

IF_P

IF_N

12

33p

C420

C423

100n

16V

C424

16V

R403

100

R404

100

C422

100n

330p

50V

R405

1.8K

R406

100

L412

1uH

L413

1uH

C425

6.8n

50V

50V

56p

2.2uH

C426

2.2uH

18
17
16
15

CP

14
13

R407

10K

16V

22n

C427

CLOSE TO 6M182

L414

L415

33p

50V

CLOSE TO 6M182

5V_USB

R409

C428

10K

120ohm

C431

C429
100n

16V

C430

510

R408

100n

16V

100n

L416

3A

16V

C432

2.2u

10V

AGC

VIFP

VIFM

5

TITLE: DWG NO.

TUNER& 9232ME8302DL

6

DRAWN BY

APPROVED BY

REV.

Sheet to

4

A1.0

4

XOCECO

XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.

X901

POWER SOURCE MENU VOL-VOL+ CH+ CH-

1

2

S907 S906 S905 S903 S904 S901 S902

R906

1K

R905

1K

R904

1.5K

R903

2.4K

R902

4.3K

R901

10K

Key board

LED1

GPR2503/P322

X911

1

2

3

4

R911

120

R913

47

C911

100n

HRM538BB5117

N911

Vcc

GND

Vout

10u

C912

IR board

Power board

Backlight board

APPENDIX-A: Main assembly 9232ME8321 LCE-32R83DT(B)

NAME NO. MAIN COMPONENT AND IT'S NO.

Main processing
board

IR board
Key board
Power board
Remote control
Panel assembly

N101
N401

XI6ME02501H0

XI635ME01701
XI635ME01710
XI6ME0332010
XI6011301001 RC-1310-0A
XI6377321301 DT32K83 V02

N102
N402
N201

MST6E182VG_LF_Z1 (5270182005)
R620D (5270620002)
EN25Q32B-104HIP (5272532007)
TAS5707 (5275707001)
IT6633E-P(5276633001)

APPENDIX-B: Exploded view (LCE-32R83DT(B))

PART LIST OF EXPLODED VIEW

NO. DESCRIPTION

1 Panel assembly
2
3
4 IR assembly
5
6 Interface baffle (down)
7
8
9

10 Back cover assembly
11 Wall mounting bracket
12 Speaker assembly
13 Pedestal standing pole

14 Pedestal faceplate assembly

15 Key board assembly

Interface baffle (right)
Light guided pole

Main board assembly

Power / Backlight assembly
Power cord clip
Power cord bracket

Note: Design and specification are subject to change without notice.

PART LIST

XI6ME02501H0

Main b

11

XI58B0042900

Wall mounting bracket

4

17

XI5944041160

User manual

1

LCE-32R83DT(B) ver.1.0

REF.No. PARTS No. DESCRIPION Q'TY REMARK

1
2
3
4
5
6
7
8
9
10

XI6377321301
XI581008513A
XI570032201A
XI635ME01701

XI5810A85220
XI6ME0332010
XI572011201C
XI58B0A45610
XI623ME00906

Panel assembly 1 DT32K83 V02
Interface baffle (right)
Light guided pole

1
1

IR assembly 1

oard assembly

1

Interface baffle (down) 1
Power / Backlight assembly
Power cord clip
Power cord bracket

1
1
1

Back cover assembly 1

12
13
14
15
16
17

XI6170987000
XI58D003031A
XI6150112000
XI635ME01710
XI6011301001
XI5944041160

Speaker assembly 1
Pedestal standing pole 1
Pedestal faceplate assembly 1
Key board assembly 1
Remote control
User manual

Only the parts in above list are used for repairing.
Other parts except the above parts can't be supplied.

1
1

Appendix: Installing the Stand

If the stand is provided, please read these instructions thoroughly before attempting this installation.

Safety Precautions:

1.Please read these instructions thoroughly prior to attempting this installation.

2.Be sure to handle this product very carefully when attempting assembly. If you are unsure of your

capability, or the use of tools necessary to complete this activity, refer to a professional installer or

service personnel. The manufacturer is not responsible for any damages or injuries that occur due to

mishandling or improper assembly/installation.

3.When using a table or bench as an aid to assembly, be sure to put a soft cushion or covering to prevent

accidental scratching or damage to the unit's finish.

4.The speaker is not intended to support the weight of this display. Do not move or handle this product

from the speaker; which can cause damage to the display not covered under the manufacturer's

warranty.

To install the stand:

1. Remove the stand from the box and place it on a table or bench.

You must pay attention to the direction of the stand. The wide portion of the stand should go towards

the front of the TV.

2. Lay your TV flat (screen down) on the edge of a table or bench. Make sure that you put down a soft

cushion or cloth so that your TV is not scratched.

3. Attach the stand column to the back of the TV, align the holes in the TV back with the holes in the stand

column, then secure the stand column to the TV with the screws provided.

4. Align the stand to the stand column, align the holes in the stand column with the holes in the stand, then

secure the stand to the stand column with the screws provided.

Secure with
three screws (T4x10BT)

Stand column

Stand

S

ecure with

one screw (T4x14BT)

NOTE:

1.Appearance of this product in illustrations may differ from your actual product, and is for comparative
purposes only.

2.Design of this accessory or display products are subject to change without notice.

WALL MOUNTING INSTRUCTIONS

Safety Precautions:

1. Be sure to ask an authorized service personnel to carry out setup.

2. Thoroughly read this instruction before setup and follow the steps below precisely.

3.The wall to be mounted should be made from solid materials. Only use accessories supplied by the manufacturer.

4.Very carefully handle the unit during setup. We are not liable for any damage or injury caused by mishandling or improper installation.

5.Be sure to place the unit on a stable and soft platform which is strong enough to support the unit.

6.Do not uplift the speaker when moving the display. The appearance of the unit may different from the actual ones.

7.Design and specifications are subject to change without notice.

8. Retain these instructions for future reference.

Note: All the wall mounting parts are

optional and may be unavailable in

your model.

Below we will show you how to mount the
Display on the wall using our company’s
wall mounting components.

Take out these
parts from the
box

Combination Screw

Fig.1

1. There are three options of wall mounting
ho ld er with different specifications
:200200,200400,200600. Please check your
wall mounting holder for its specification.

Wall Mounting Holder

Wall Mounting Connector

Expansion Bolt

Wood Screw

Wall mounting fix-hole c ent er

X

8

200 27

Rea r wall mounting hole center

Fig.2

2. Due to the wall mounting fix-groove leaning to the
right side, the whole unit will lean to right side after
installation, please carefully measure the position of
the holes you want to drill, refer to the parameters
on Fig.2 when drilling the holes.

Note: The "X" in Fig.2 represents a data. It may be

200mm or 400mm or 600mm.

(Unit:mm)

Wall

Fig.3 a

3a. Screw 4pcs expansion bolts to fix the

wall mounting holder on the wall.

Wall

Fig.3 b

3b. If your wall is a wooden structure, please

fix the wall mounting holder on the wall
with 16pcs wood screws.

Fig.4

4. Use the 4pcs combination screws to fix
the wall mounting connector to the rear
of the display unit.(Caution:the direction
of the connectors should be strictly
confirm to the diagram illustrated above).

Fig.5

5. Put the back of the display unit close to the wall
mounting holder, insert the four wall mounting
connectors into the four calabash-shaped holes on
the wall mounting holder. (Fig.5)

Fig.6

6. Let the display unit slowly slide down to
the end of the calabash-shaped hole.
(Fig.6)

8. If you want to dismount the unit do the above steps in reverse order.

7. Push rightwards carefully until the wall
mounting connectors fully slide into the
right fix-grooves and be sure the mounting
is secure.

Fig.7

April 2013